BSI Standards PublicationMechanical standardization of semiconductor devices Part 6-12: General rules for the preparation of outline drawings of surface mounted semiconductor device pa
Trang 1BSI Standards Publication
Mechanical standardization
of semiconductor devices
Part 6-12: General rules for the preparation
of outline drawings of surface mounted semiconductor device packages – Design guidelines for fine-pitch land grid array (FLGA)
Trang 2National foreword
This British Standard is the UK implementation of EN 60191-6-12:2011 It isidentical to IEC 60191-6-12:2011 It supersedes BS EN 60191-6-12:2002which is withdrawn
The UK participation in its preparation was entrusted to Technical CommitteeEPL/47, Semiconductors
A list of organizations represented on this committee can be obtained onrequest to its secretary
This publication does not purport to include all the necessary provisions of acontract Users are responsible for its correct application
© BSI 2011ISBN 978 0 580 70310 2ICS 31.080.01
Compliance with a British Standard cannot confer immunity from legal obligations.
This British Standard was published under the authority of the StandardsPolicy and Strategy Committee on 31 August 2011
Amendments issued since publication
Amd No Date Text affected
Trang 3Management Centre: Avenue Marnix 17, B - 1000 Brussels
© 2011 CENELEC - All rights of exploitation in any form and by any means reserved worldwide for CENELEC members
Ref No EN 60191-6-12:2011 E
English version
Mechanical standardization of semiconductor devices -
Part 6-12: General rules for the preparation of outline drawings of surface
mounted semiconductor device packages - Design guidelines for fine-pitch land grid array (FLGA)
(IEC 60191-6-12:2011)
Normalisation mécanique des dispositifs à
semiconducteurs -
Partie 6-12: Règles générales pour la
préparation des dessins d'encombrement
des boîtiers des dispositifs à
semiconducteurs à montage en surface -
Lignes directrices de conception pour les
boîtiers matriciels à plots et à pas fins
(FLGA)
(CEI 60191-6-12:2011)
Mechanische Normung von Halbleiterbauelementen - Teil 6-12: Allgemeine Regeln für die Erstellung von Gehäusezeichnungen von SMD-Halbleitergehäusen -
Konstruktionsleitfaden für Land-Grid-Array (FLGA)
Feinraster-(IEC 60191-6-12:2011)
This European Standard was approved by CENELEC on 2011-07-13 CENELEC members are bound to comply with the CEN/CENELEC Internal Regulations which stipulate the conditions for giving this European Standard the status of a national standard without any alteration
Up-to-date lists and bibliographical references concerning such national standards may be obtained on application to the Central Secretariat or to any CENELEC member
This European Standard exists in three official versions (English, French, German) A version in any other language made by translation under the responsibility of a CENELEC member into its own language and notified
to the Central Secretariat has the same status as the official versions
CENELEC members are the national electrotechnical committees of Austria, Belgium, Bulgaria, Croatia, Cyprus, the Czech Republic, Denmark, Estonia, Finland, France, Germany, Greece, Hungary, Iceland, Ireland, Italy, Latvia, Lithuania, Luxembourg, Malta, the Netherlands, Norway, Poland, Portugal, Romania, Slovakia, Slovenia, Spain, Sweden, Switzerland and the United Kingdom
Trang 4Foreword
The text of document 47D/784/CDV, future edition 2 of IEC 60191-6-12, prepared by SC 47D, Mechanical standardization for semiconductor devices, of IEC TC 47, Semiconductor devices, was submitted to the IEC-CENELEC parallel vote and was approved by CENELEC as EN 60191-6-12 on 2011-07-13
This European Standard supersedes EN 60191-6-12:2002
EN 60191-6-12:2011 includes the following significant changes with respect to EN 60191-6-12:2002: a) scope is expanded so that this standard include the square type FLGA The title of this standard has been changed accordingly: “Rectangular type” has been deleted from the title;
b) ball pitch of 0,3 mm has been added;
c) datum is changed from the body datum to the ball datum;
d) combination lists of D, E, MD, and ME have been revised
Attention is drawn to the possibility that some of the elements of this document may be the subject of patent rights CEN and CENELEC shall not be held responsible for identifying any or all such patent rights
The following dates were fixed:
– latest date by which the EN has to be implemented
at national level by publication of an identical
national standard or by endorsement (dop) 2012-04-13
– latest date by which the national standards conflicting
with the EN have to be withdrawn (dow) 2014-07-13
Annex ZA has been added by CENELEC
Trang 5Annex ZA
(normative)
Normative references to international publications with their corresponding European publications
The following referenced documents are indispensable for the application of this document For dated references, only the edition cited applies For undated references, the latest edition of the referenced document (including any amendments) applies
EN 60191-6 -
Trang 6CONTENTS
1 Scope 5
2 Normative references 5
3 Terms and definitions 5
4 Terminal position numbering 6
5 Nominal package dimension 6
6 Outline drawings and principle dimensions 7
7 Dimensions 10
Figure 1 – Flange-type FLGA 6
Figure 2 – Rectangle-type FLGA 6
Figure 3 – Flange-type FLGA 7
Figure 4 – Rectangle-type FLGA 8
Figure 5 – Mechanical gauge drawing e 9
Figure 6 – Pattern of terminal position area f 9
Table 1 – Group 1: Dimensions appropriate to mounting and interchangeability 10
Table 2 – Group 2: Dimensions and tolerances 14
Table 3 – Combination list of D, E, MD, and ME – e = 0,80mm pitch 15
Table 4 – Combination list of D, E, MD, and ME – e = 0,65 mm pitch 16
Table 5 – Combination list of D, E, MD, and ME – e = 0,50 mm pitch 17
Table 6 – Combination list of D, E, MD, and ME – e = 0,40 mm pitch 18
Table 7 – Combination list of D, E, MD, and ME – e = 0,30 mm pitch 19
Trang 7MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES – Part 6-12: General rules for the preparation of outline drawings
of surface mounted semiconductor device packages –
Design guidelines for fine-pitch land grid array (FLGA)
1 Scope
This part of IEC 60191 provides standard outline drawings, dimensions, and recommended variations for all fine-pitch land grid array packages (FLGA) with terminal pitch of 0,8 mm or less
2 Normative references
The following referenced documents are indispensable for the application of this document For dated references, only the edition cited applies For undated references, the latest edition
of the referenced document (including any amendments) applies
IEC 60191(all parts), Mechanical standardization of semiconductor devices
IEC 60191-6, Mechanical standardization of semiconductor devices – Part 6: General rules for
the preparation of outline drawings of surface mounted semiconductor device packages
3 Terms and definitions
For the purposes of this document, the terms and definitions given IEC 60191 series and the following apply
NOTE Flange-type FLGA, shown in Figure 1, is generally cut by singulation press, thus resulting in larger dimensional errors than the singulation by dicing saw
Trang 8Figure 1 – Flange-type FLGA
Figure 2 – Rectangle-type FLGA
4 Terminal position numbering
When a package is viewed from the terminal side with the index corner in the bottom left corner position, terminal rows are lettered from bottom to top starting with A, then B, C,,,, AA,
AB, etc,, whereas terminal columns are numbered from left to right starting with 1 Terminal
positions are designated by a row-column grid system and shown as alphanumeric identification, e.g., A1, B1
The letters I, O, Q, S, X and Z shall not be used for naming the terminal rows
5 Nominal package dimension
A nominal package dimension is defined as “the package width (E) × length (D)”, which is
expressed in the tenths place in millimeter
IEC 1163/11
IEC 1164/11
Trang 96 Outline drawings and principle dimensions
The FLGA outline is shown in Figures 3 and 4
NOTE For footnotes relating to this figure, see Figure 4
Figure 3 – Flange-type FLGA
Trang 10NOTES relating to Figures 3 and 4:
a Datum S is defined as the seating plane on which a package free stands by contact of the balls
b The hatched zone is an index-marking area, where whole index mark will be basically contained in 1/16 of the body size, In case it is physically difficult, index mark can extend more than 1/16 but no more than a quarter of the body size
c True positional tolerances of terminals, x1 and x2, are applied to all terminals
d The terminal diameter b is the maximum diameter of individual balls as measured in the plane parallel to the seating plane
e An array of terminal-existence areas with regard to the datum S, A, and B is shown in the mechanical gauge drawing in Figure 5
f The array of terminal-existence areas with regard to the datum S is shown in Figure 6
Figure 4 – Rectangle-type FLGA
Trang 11NOTE The symbols in this figure are explained in IEC 60191-6
Trang 12E x D A package nominal dimension is defined as “the package width (E) x
length (D), which is expressed in the tenths place in millimeter -
Package length D
(1) Range of Dnom: from 1,5 to 21,0
(2) Interval of DnomFor square FLGA with Dnom ≥ 15,0, Dnom is an integer
For other FLGA, the number in the tenths place of Dnom is either 0 or
Trang 13For square FLGA with Enom ≥ 15,0, Enom is an integer
For other FLGA, the number in the tenths place of Enom is either 0 or
-A = 0,30
0,40 0,50 0,65 0,80 1,00 1,20 1,70 2,00
Trang 14For C-FLGA:
e min nom max
0,80 0,45 0,50 0,55 0,65 0,35 0,40 0,45 0,50 0,25 0,30 0,35 0,40 0,20 0,25 0,30
For P-FLGA and T-FLGA
e min nom max
0,80 0,35 0,40 0,45 0,65 0,30 0,35 0,40 0,50 0,20 0,25 0,30 0,40 0,15 0,20 0,25 0,30 0,12 0,15 0,18
Trang 15ME x (MD -1) (ME -1) x (MD -1)
(ME +1) x MD
ME x (MD +1) (ME +1) x (MD +1)
MD ≤( Dnom - bmax – vD -X1 - x2 - 2u)/ e+1
ME ≤( Enom - bmax – vE - x1 - x2 - 2u)/ e+1
u = 0,11 Numbers of matrices in ME and MD are shown in Table 3
“u” denotes edge clearance
e y
0,80 0,10 0,65 0,10 0,50 0,08 0,40 0,08 0,30 0,05
Trang 16Table 2 – Group 2: Dimensions and tolerances
Trang 17Table 3 – Combination list of D, E, MD, and ME – e = 0,80mm pitch
Trang 18Table 4 – Combination list of D, E, MD, and ME – e = 0,65 mm pitch
Trang 19Table 5 – Combination list of D, E, MD, and ME – e = 0,50 mm pitch
Trang 20Table 6 – Combination list of D, E, MD, and ME – e = 0,40 mm pitch
Trang 21Table 7 – Combination list of D, E, MD, and ME – e = 0,30 mm pitch
Trang 24BSI is the national body responsible for preparing British Standards and other
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