2 Definitions 2.1 SEM inspe tion lot a SEM inspection lot is d efined as a n mber of wafer of the same ty pe which are selected f om the same difusion, oxid tion and metal sation ru and
Trang 100013:1985
Trang 2This Bri sh Stan ard, ha ing
b en pre ared u der the
directonof the Electronic
Comp nents Stan ards
Commi e , was published
u derthe authoriy of the
Bo rdofBSI an comes
into fecton
3 Aug ust1 8
© BSI1 -1 9
The folowing BSI references
relate to the work on this
The prep ration of this British Stand rd was undertaken b the Electronic
Components Stand rds Commit e , upon which the fol owing bodies were
represented:
Association of Control Man facturer TACMA ( BEAMA)
Association of Franchised Distributor of Electronic Components
British Industrial Measuring and Control App ratus Man facturer ’
Association
British Stand rds Society
Control and Automation Man facturer ’ Association ( BEAMA)
Dep rtment of Industry Computer Sy stems an Electronic
Dep rtment of Tra e
Electronic Components Industry Federation
Electronic Eng ine ring Association
Eng ine ring Eq uipment User ’ Association
Ministry of Defence
National S perv ising Inspectorate
Post Ofice
Scientific Instrument Man facturer ’ Association
Society of British Aerosp ce Comp nies Limited
Telecommu ication Eng ine ring and Man facturing Association ( TEMA)
Am endm ents is ued sinc publ cation
Amd No Date of is ue Comments
Trang 33.2.1 W afer sample selection f om a metal isation ru 2
Trang 4Chart 1 — Sample selection fom non-g las iv ated d ev ices 10
Chart 2 — Sample selection fom g las iv ated d ev ices 1
Chart 3 — Sample selection fom g las iv ated d ev ices 1
Chart 4 — Sample selection fom g las iv ated d ev ices 13
Chart 5 — Sample selection fom g las iv ated
Chart 6 — Sample selection for multi lev el sy stems 15
Trang 5National foreword
This British Stand ard has be n prep red u d er the d irection of the Electronic
Components Stand rds Commit e It is identical with CENELEC Electronic
Components Commit e ( CECC)0 013:19 4 “ Ha r monized system o qua liy
a ss s ment f r ele tr onic components: B a sic spe ifica tion: Sca nning ele tr on
micr os ope inspe ton o s micond ucto d ic ”
This stand rd is a harmoniz d specification within the CECC sy stem
Term inolog y and conventions The text of the CECC specification has be n
a prov ed as suita le for publ cation as a British Stand rd without d ev iation
Some terminolog y and certain conv entions are not identical with those used in
British Stand rds; at ention is drawn especialy to the folowing
The comma has be n used as a decimal marker In British Stand rds it is cur ent
practice to use a ful point on the b selne as the decimal marker
N T The last p rt ( beg in ing “an co ies”) of p rag ra h4 of the foreword is not a plica le for this
Bri sh Stan ard
A British Stand rd d oes not purport to includ e al the neces ary prov isions ofa
contract User of British Stand ard s are responsible for their cor ect a plcation
Compl anc with a British Standard does not ofitself confer imm unity
f om leg al o l g ations
Sum m ary of pag es
This d ocument comprises a f ont cov er, an inside font cov er, p g es i to iv ,
theCECC title p g e, p g ei , p g es1 to15 and a b ck cov er
This stand ard has be n up ated ( se copy right d te) and ma hav e ha
amend ments incorporated This wi l be indicated in the amendment ta le on the
inside f ont cov er
Trang 8The CENELEC Electronic Components Commit e ( CECC) is composed of those member cou tries of the
European Commit e for Electrotech ical Stand rd ization ( CENELEC) who wish to take p rt in a
harmoniz d Sy stem for electronic components of as es ed q ual ty
The object of the Sy stem is to faci itate international tra e b the harmonization of the specifications and
q ual ty as es ment procedures for electronic components, and b the g rant of an international y recog niz d
Mark, or Certificate, of Conformity The components produced u der the Sy stem are thereb ac epted b
al member cou tries without further testing
This specification has be n formaly a prov ed b the CECC, and has be n prep red for those cou tries
taking p rt in the Sy stem who wish to is ue national harmoniz d specifications for SCANNING
ELECTRON MICROSCOPE INSPECTION OF SEMICONDUCTOR DICE It should be rea in
conju ction with the cur ent reg ulations for the CECC Sy stem
Pr face
This b sic specification was prep red b the ESA/SCCG It was sponsored a ministrativ ely b CECC W G5
who mad e not contribution to the tech ical contents
The text of this specification was cir ulated to the CECC for v oting in the document indicated below and
was a prov ed b the Presid ent of the CECC for publcation as a CECC Specification
Trang 91 Scope
1.1 General
This specification des ribes the equipment and proced ures to be used for the s anning electron mic os ope
( SEM) inspection of dis rete semiconductor dev ices and integ rated cir uits
W hen SEM inspection is pres ribed in a detai specification, it shal be used in conjunction with the
relev ant Appendix of the a propriate CECC g eneric specification,wherein the specific ac ept/reject c iteria
wi be pres ribed
1.2 Alternative standards
W here the config uration of a p rticular component is not in ac ord nce with the ex mples shown in this
specification or where cur ent in-house inspection drawing s or stand ards ( ac epted in the PID) are to be
used, it shal be the man facturer’s responsibi ty to obtain the formal interpretation f om the ONS, or its
d esig nated representativ e, of any dev iation
2 Definitions
2.1
SEM inspe tion lot
a SEM inspection lot is d efined as a n mber of wafer of the same ty pe which are selected f om the same
difusion, oxid tion and metal sation ru and f om which a defined n mber of wafer shal be ex mined
with the SEM
2.2
o ide steps
oxid e steps are defined as any sloped or a rupt chang e in thick es of si con ox ide, si con nitrid e and / or
any other insulating lay er on a semiconductor or integ rated cir uit
2.3
m ulti- level m etalisation system
a multi lev el metal sation sy stem consists of two or more lay er of metal or any other conductiv e material
which are sep rated fom each other b an insulating material
2.4
m ulti- la ered- m etal
multi lay ered -metal is d efined as two or more lay er of metal or any other cond uctiv e material used for
inter on ections that are not isolated fom each other b a g rown or d eposited insulating material
2.5
critical areas
c itical areas shal be de med to be those areas where, b v irtue of d esig n, an inc eased pos ibi ity of fai ure
is prob ble Such areas shal be clearly identified b the man facturer b the prov ision of an enlarg ed
photog ra h of the complete die
ex mples of c itical areas are:
— v ery smal d istances betwe n conductor
— v ery nar ow cond uctor
— v ery hig h and ste p oxide steps
— v ery smal contact windows
Trang 103 Requir ments
3.1 Equipm ent
3.1.1 Scanning ele t ron micr s ope
The s an ing electron mic os ope used for this inspection shal me t the folowing req uirements:
3.1.2 Conductive fi m deposition
There shal be a faci ity for the deposition of a conductiv e fi m ov er the sample dice b v apour d eposition or
sput ering , if required
3.2 Sam ple sele tion
3.2.1 Wafer sample s le tion f om a metal isation run
W afer sample selection shal be ma e after the metal isation proces in ac ord nce with Fig ure 2
Thewafer of more than one SEM inspection lot shal be placed in sep rate sections of the wafer-holder I
one SEM inspection lot has les wafer than there are places on the wafer-holder,the wafer shal be placed
sy mmetricaly fom the outsid e to the centre of the wafer-holder One wafer fom the ed g e an one nearest
the centre of the wafer-hold er shal be taken as samples
In case of smal SEM inspection lots, it is permis ible to break wafer an to place the pieces in the
desig nated sections of the wafer-hold er prov ided they are big enoug h for die selection ac ording to3.2.3
Up to die selection, the selected wafer shal be handled throug hout al proces ing steps in such a manner
that they retain their tracea i ty
3.2.2 Wafer sample s le tion f om a pr cured lot
Selection of wafer samples f om a procured lot shal be ma e as folows:
— Lot siz smal er than10 wafer
One wafer per metal isation ru to be selected at random
— Lot siz of10 wafer or more
Two wafer per metal sation run to be selected at rand om
3.2.3 Die sample s le t ion
From each wafer selected in ac ord ance with3.2.1 or3.2.2, thre dice shal be selected( 1) as in
Fig ure 3or( 2) as in Fig ure 4
3.2.3.1 Non-gla ssiva ted d evic s
Dice f om non-g las iv ated dev ices shal be selected and ex mined in ac ord nce with Chart1
3.2.3.2 Gla ssiva ted d evic s
For the selection of dice f om g las iv ated d ev ices, there are two pos ibi ities:
1) Selection after etching of the metal isation structure, but before g las iv ation:
— I SEM inspection lots consist of20 or more wafer , the selection and ex mination shal be in
ac ord nce with Chart2 The wafer f om which the dice are selected shal not be used for further
proces ing
— I SEM inspection lots consist of les than20 wafer , the sample dice ma be selected an ex mined
in ac ord ance with either Chart2 or3 W afer fom which seg ments are detached for dice selection
ma be used for further production
—Ma nification : X 50 to X 200 0
—Acceleration v oltag e : 1 kV to25kV
—The specimen hold er shal be so constructed that the specimen ma be ex mined throug h a ti t
ang le rang ing f om0° to7 ° ( se Fig ure 1)
—It shal be pos ible to rotate the specimen throug h3 0° ov er the ful rang e of tit ang le
—The chamber for the specimen shal be so constructed that a specimen measuring at
Trang 11I, during the g las iv ation proces , the temperatures used are hig her than any temperature used
during the metal isation proces , min s5 °C, the u g las iv ated sample dice shal be ex osed , in a
suita le atmosphere ( nitrog en), to the temperature/time characteristic of the g las iv ation proces
2) Selection after g las iv ation:
Die samples shal be selected and ex mined in ac ord ance with Chart 4 and the g las iv ation shal be
etched awa without d amag ing the metal isation of the dice This can be done when etching awa the
g las iv ation fom the contact p d s of the dev ices
For procured wafer ( se 3.2.2), sample selection and ex mination shal be in ac ord nce with Chart5
3.2.3.3 Muli-level meta llsa tion systems
Each metal isation lay er shal be ev aluated b detaching a seg ment ( se Fig ure 4)f om the a propriate
wafer sample ( se Chart6) The selection of wafer and d ie samples an d ie ex mination shal be in
ac ord nce with Chart6 It is permit ed to use the remainder of the wafer sample fom which the seg ment
is d etached for further proces ing
I, after breaking any seg ment, the temperatures used for further proces ing of the wafer are hig her than
any temperature used during the metal sation proces , min s5 °C, the seg ments for each metal sation
lay er shal be ex osed , in a suita le atmosphere ( nitrog en), to the temperature/time characteristic of the
further proces ing
3.3 Die sam ple preparation
3.3.1 Deposition o a conduct ive fi m
To obtain the req uired resolution it ma be neces ary to coat the die samples with a conductiv e fi m ( for
ex mple g old, p la ium/ g old or carbon) W hen cov ering the edg es and sides of the die with this fi m, care
shal be taken to ensure g ood electrical contact betwe n the fi m and the SEM specimen hold er
3.3.2 Mounting on spe imen holder
The die shal be fit ed flat and wel -g rou d ed to the specimen holder The mou ting shal be done in such
a wa that contamination is red uced to a minimum I the die is mou ted b means of a cond uctiv e a hesiv e
or other conductiv e material, special care shal be taken not to obs ure features to be ex mined
3.4 Die sam ple ex m ination, g eneral requirem ents
3.4.1 G eneral
All four edg e directions shal be ex mined on each d ie for each ty pe of contact wind ow step an for each
ty pe of other oxide step ( The word “ oxid e” shal be interpreted as any insulating material used on the
semiconductor d ie, whether SiO
x, SiN
x,etc) A sing le window ( or other ty pe of oxide step) ma be v iewed if
metal sation cov er the entire window ( or other ty pe of oxid e step) extend ing up to and ov er each edg e an
onto the top of the oxide at each edg e Other windows ( or other ty pe of oxid e step) on the die shal be
ex mined to me t the requirement that al four directional edg es of each ty pe of wind ow ( or other ty pe of
oxide step) shal be ex mined on each die Viewing for g eneral metal sation d efects, such as pe l ng and
v oid ing shal be such as to prov ide for the best ex mination for those defects
3.4.2 Viewing angle
Specimens shal be v iewed at whatev er ang le is a propriate to ac urately as es the qual ty ofthe
metal sation Contact windows are normal y v iewed at an ang le of4 ° to6 ° Metal sation thick es ,
a hesion, an etching d efects are normaly v iewed at an ang le of6 ° or g reater
3.4.3 Viewing dire tion
Specimens shal be v iewed at whatev er direction is a propriate to ac urately as es the qual ty of the
metal sation This shal include lo king at metal sation at the edg es of contact wind ows and other ty pes
ofoxid e steps ( se 3.4.1) in directions that prov ide u sha owed v iews of each edg e This ma mean that
the v iewing ang le is perpendicular to an edg e, or in l ne with an edg e, or at some obl q ue ang le,whichev er
best resolv es any q uestion of defects at the oxide step
Trang 123.4.4 Magnificat ion
The mag nification rang es shal be betwe n X 50 0 andX 200 0 for ex mination of oxide steps and
betwe nX 10 0 andX60 0 for ex mination for g eneral metal sation d efects, such as pe lng and v oiding
W hen dice are subjected to reinspection, such reinspection shal be ac omplshed within the specified
mag nification rang e, but at any mag nification within that rang e that is d eemed a propriate
3.5 Die sam ple ex m ination, detai requirements
3.5.1 Dis ret e s miconduct or devic s
3.5.1.1 Oxid e steps
Inspect the metal sation at al ty pes of oxid e steps In the case of r and /or power transistor with
interdig itated or mesh structures, as a minimum, each b se-emit er stripe p ir on each en of each p t ern
an ev ery fourth b se-emit er stripe p ir within each p t ern shal be inspected Particular at ention shal
be directed to lateral etching defects an u der ut etching at b se and emit er oxid e steps.Documentation
shal be as specified in Section4
3.5.1.2 Gener a l meta llsa tion
Inspect al g eneral metal isation on each die for defects such as pe l ng and v oiding Document in
ac ord ance with Section4
3.5.2 Int egrated circuits
3.5.2.1 Oxid e steps
Inspect the metal sation at al ty pes of oxide steps Document in ac ord nce with Section4
3.5.2.2 Gener a l meta llsa tion
Inspect at least25 per ent of the g eneral metal isation on each die for d efects, such as pe lng or v oiding
Document in ac ord nce with Section4
3.5.3 Multi-lay ered-metal interconne t ion syst ems
Multi Lay ered -Metal is d efined as two or more lay er of metal or any other material used for
inter onnections that are not isolated f om each other b a g rown or d eposited insulating material
Theterm “ underly ing lay er” shal refer to any lay er below the top lay er of metal Each lay er of metal shal
be ex mined The princip l cur ent-car y ing lay er shal be ex mined with the SEM; the other lay er
( e.g b r ier or a hesion) ma be ex mined using either the SEM or an optical mic os ope, at the
man facturer’s option The g las iv ation ( if any ) and each suc es iv e lay er of metal shal be strip ed b
selectiv e etching with suita le reag ents, lay er b lay er, to ena le the ex mination of each lay er.Normal y
each suc es iv e lay er of metal wi l be strip ed in sequence to ex ose the next u d erly ing lay er for
ex mination It ma be impractical to remov e the diferent lay er on a sing le die, lay er b lay er In this
case, an ad ditional d ie ( dice) immed iately ad jacent on the slce to the orig inal die shal be strip ed to me t
the req uirement that al lay er shal be ex osed and ex mined Specimen ex mination shal be in
ac ord nce with3.5.1 or3.5.2 whichev er is a plca le
3.6 Spe im en after ex mination
No SEM-nspected specimen shal be used for further proces ing The specimens of each ac epted SEM
inspection lot shal be stored at the man facturer’s plant for a period of, at least,24 months.They shal be
delv ered to the ord erer upon req uest
3.7 Ac eptanc requirem ents
3.7.1 G eneral
Rejection of d ice shal be b sed upon lot proces oriented defects Rejection shal not be b sed upon
workmanship and other ty pe defects such as s ratches, smeared metal isation, to l ng marks, etc In the
ev ent that the presence of such defects obs ures the d etaied features being ex mined, an ad ditional die
shal be ex mined which is immed iately a jacent to the die with the obs ured metal sation
3.7.2 Single wafer ac eptanc basis
The metal isation on a sing le wafer shal be judg ed ac epta le only if al sample dice f om that wafer are