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Mason Exam 2 Review Exam Format same as Exam 1 ~10 True/False: covering concepts and theory ~10 Multiple Choice: covering concepts and theory from lecture notes Matching, fill in the b

Trang 1

ECE 410, Spring 2008 Professor A Mason

Exam 2 Review

Exam Format (same as Exam 1)

~10 True/False: covering concepts and theory

~10 Multiple Choice: covering concepts and theory from lecture notes

Matching, fill in the blank, etc type questions are possible substitutes for the above

~5 Problems: calculation problems that combine concepts learned in homework and class to test your overall understanding of the material

Honor Pledge

You will be required to sign an honor pledge stating that you did not cheat or witness any

cheating Your exam will not be graded unless the honor pledge is signed!

Calculators

Calculators will probably be allowed at the exam However, you can not store any information

or equations in calculators Simple function calculators are preferred

Exam Coverage

All lecture notes and all topics covered in lecture since Exam 1

Lecture Notes Ch7, Ch 11, Ch 12, Ch 13, Advanced Digital (slides 1-25); Homeworks 5-9 Textbook chapters 7, 8 (parts), 11, 12, 13

The exam will not cover material exclusive to lab assignments

List of Topics

• stick diagrams

• the following for inverters, multi-input gates, and transmission gates

o voltage transfer characteristics & gate switching threshold (midpoint voltage)

o transient response; rise and fall times; propagation delays

o power consumption & activity coefficients

o transistor sizing for performance; beta scaling

• multi-cell layout; signal & power routing

• digital functional blocks

o buffers; multiplexers; decoders (active high/low); encoders

o latches & flip flops, especially CMOS DFF; flip flop timing & transistor sizing

o tri-states & C2MOS DFF

o registers, shift/rotate, barrel shifters & counters (state machines not on exam)

• adders: half adder, full adder, ripple-carry adders

• carry look-ahead adders; Manchester carry generation (pass gate circuits)

• multiplier & ALU basics (Booth encoding not on exam)

• types of memory; volatility; static vs dynamic

• SRAM cells, cell analysis & arrays; multi-port SRAM

• DRAM cells, cell analysis & arrays

• ROM/PROM/EPROM/EEPROM/PLA basic operation and structure

• pseudo-nMOS, dynamic/domino, differential, pass-gate logic structure

• STI, LDD, SOI, BiCMOS technologies

Trang 2

ECE 410, Spring 2008 Professor A Mason

Equations Sheet

The following equations will be provided for you on the exam Only the following equations and constants will be provided and you will be responsible for knowing what each variable means and when to use each equation

I = Q / t

Cox = ε ox /t ox Q c = -C G (V G -V tn )

OX

n

k' =μ , β n = μ n Cox (W/L) R n = 1 / β n [(VDD-Vtn)],

R p = 1 / β p [(VDD-|Vtp|)]

( − 1)

= V D V T

S

D I e

⎟⎟

⎜⎜

=

i

D A T

n

N N

0 2

=

A D A D R

N N N N q

V

⎛ + Ψ

+

=

R D

A

D A

j

V N

N

N

N

q

A

C

0

2

0

2

=

A

R p

qN

V x

0

2

=

D

R n

qN

V x

C SB = C j A Sbot + C jsw P Ssw C DB = C j A Dbot + C jsw

Dsw

C GS = ½ C G C GD = ½ C G

P

tf 2.2 τ= τ

n, tr = 2.2 p

tp = 0.35(τ + τ )

D AM: t h = (Cs / I L )(Δ

equations

Triode n OX [2 (

2 L GSV tn V DSV DS

) SD SD

tp

OX n

I =

2

μ

Saturati

(Active)

) (

OX n

L

W C

) (

OX n

L

W C

Consta

0.026 eV, at room temperature

= 8.62x10-5 eV/K, Boltzman’s constant

, thermal voltage

nts

kT =

k

V T = 0.026 V

q=1.6x10-19 C (coulombs)

n i = 1.45x1010cm-3, Si at room temperature

ε0 = 8.85x10-14 F/cm

ε OX = (3.9) 8.85x10-14 F/cm

εsi = (11.8) 8.85x10-14 F/cm

Quadratic Equation:

ax2 + bx + c = 0Æ

a ac b

b±

x

2 4

2 −

=

DeMorgan’s Rules

(a * ’ = a’ + b’

(a + b)’ = a’ * b’

Useful Logic Properties

x

0 * x = 0

x * x’ = 0

* a = a a + a = a

oven

+bc + a'b = a + b

= a

b)

1 + x = 1 0 + x =

1 * x = x

x + x’ = 1

a

ab + ac = a (b+c)

s whic propertie h can be pr

(a+b)(a+c) = a a

a + ab +ac

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