Interface Solutions I2C-bus potx

Sinking Input Sourcing Input Sinking Output Sourcing Output The current capacity of the PIC is of 25mA TTL Logic A Basic Output Open Collector Output Open Collectors withexternal pull-up

Interface Solutions

I2C-bus

NPN

Reduced models of the operation modes

Modes of Operation

Sinking vs Sourcing

• 'Sink' means that the chip 'sinks' current

down into itself.

• 'Source' is just the reverse, the I/O pin is the

actual source of the current.

The LED will light when the PIC pin is low.

The LED will light when the PIC pin is high.

Sinking Input Sourcing Input

Sinking Output Sourcing Output

The current capacity of the PIC is of 25mA

TTL Logic

A Basic Output Open Collector Output

Open Collectors withexternal pull-up

An open collector may be used with higher

Open Collector Output

Open Collectors withexternal pull-up

Tristate Gate

Current Controlled vs Voltage Controlled Devices

• JFET – Junction Field Effect Transistor

• MOSFET – Metal Oxide Semiconductor Field Effect Transistor

n-Channel DMOSFET

p-Channel DMOSFET

FET

MOSFET circuit symbols

TRISTATE OUTPUTS

Input/Output Voltage Designations

• VOL – the logic LOW output voltage.

• VOH – the logic HIGH output voltage.

• VIL – the logic LOW input voltage.

• VIH – the logic HIGH input voltage.

Input/Output Current Designations

• IOL – the logic LOW output current.

• IOH – the logic HIGH output current.

• IIL – the logic LOW input current.

• IIH – the logic HIGH input current.

TTL Gate Sinking the Input Current from Two Gate Inputs TTL Gate Sourcing Current to Two Gate Inputs

Interfacing Logic Families

• TTL to CMOS

– Pull-up resistor

Xem chương 1

two different power supplies

Interfacing Logic Families

• CMOS to TTL

– No problem with voltages

– But concerns on currents

Interfacing Logic Families

• CMOS to TTL

the negative value indicates current leaving the gate

High Sink Current for Driving 2 TTL Loads

Interface Solutions

I2C-bus

Wired AND connection using diodes and a resistor

The addresses of most I2C devices are fixed and documented in the respective datasheet Some I2C devices allow a few bits

MSB is fixed for all devices For Ex 1010EPROM

Solving Address Conflict When Sharing I2C Bus

Slave Address Conflict Solved With I2C Multiplexor

Slave Address Conflict Solved With Bidirectional I2C Buffer

-1 Strobe In/Out Control-0 Yes

2 Data0 Out Data-0 No

3 Data1 Out Data-1 No

4 Data2 Out Data-2 No

5 Data3 Out Data-3 No

6 Data4 Out Data-4 No

7 Data5 Out Data-5 No

8 Data6 Out Data-6 No

9 Data7 Out Data-7 No

16 Reset In/Out Control-2 No

17 Select-Printer In/Out Control-3 Yes

18-25 Ground - -

-PC-to-I2C (2)

PC-to-I2C (2)

PC-to-I2C (2)

PC-to-I2C (2)

PC-to-I2C (2)

PC-to-I2C (2)

I2C PC-interface

http://www.pvv.org/~asgaut/i2c/i2c.html

Pic code for I2C Master/Slave communication

www.botdream.com

Master Synchronous Serial Port (MSSP) module of 16F877

(I2C) bus operation

24LC16B EEPROM connection to PIC 16F877

EEPROM SPEC:

1.Microchip 24LC16B (16K Bits or 2KBytes)

2.8 Internal blocks (256 Bytes for each block)

I2C ADDRESS SPEC:

1 I2C Spec code for EEPROM SELECTION: 1010 must be the highest 4 Bits in the Higher Address

2 3-bit Block Code (from 000 to 111) follows the EEPROM SELECTION bits

baud100EQU 0x31 ;100KHZ standard speed

org 0x0000

goto START

org 0x05

START

;i2c operation INITIALIZATION

;PORTC setup - SDA and SCL both as inputs

movwf SSPSTAT ;100KHZ (no slew rate control)

;selection with I2C mode

;Give 24LC16B time to write the data

Master Synchronous Serial Port (MSSP) module of 16F877

(I2C) bus operation

;subroutine I2CSTART

I2Cstart

banksel SSPCON2bsf SSPCON2, SEN ;START

banksel PIR1

Swait btfss PIR1, SSPIFgoto Swait

bcf PIR1, SSPIFReturn

;subroutine i2cblock for write

i2cSend

banksel SSPBUFmovwf SSPBUFbanksel PIR1

cwait btfss PIR1, SSPIFgoto cwait

bcf PIR1, SSPIFReturn

;SUBROUTINE I2CSTOP

i2cStop

banksel SSPCON2bsf SSPCON2, PENbanksel PIR1

Pwait btfss PIR1, SSPIFgoto Pwait

bcf PIR1, SSPIF

ACK???

(I2C) bus operation

; 1 instruction cycle for 20MHz clock is 0.2 us

;100us delay needs 500 instruction cycles

R10ms call delay100usdecfsz Kount10msgoto R10msreturn

;END

CBLOCK 0x20

Kount100us Kount10ms ENDC