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A LOW POWER TIME-INTERLEAVED PIPELINE ADC DESIGN FOR 802.11bBLUETOOTH DUAL-MODE RECEIVER

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A LOW POWER TIME-INTERLEAVED PIPELINE ADC DESIGN FOR 802.11b/BLUETOOTH DUAL-MODE RECEIVER by Bo Xia Texas A&M University AMSC Abstract: ADC is one of the most challenging blocks in the m

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TEXAS A&M UNIVERSITY

Department of Electrical Engineering

College Station, Texas 77843-3128 TEL (409) 845-7498 FAX (409) 845-7161

sanchez@ee.tamu.edu http://amesp02.tamu.edu/

S E M I N A R

Room 119A ZEC

Monday, September 22, 2003, 3:00 p.m 3:50 p.m

A LOW POWER TIME-INTERLEAVED PIPELINE ADC DESIGN

FOR 802.11b/BLUETOOTH DUAL-MODE RECEIVER

by

Bo Xia Texas A&M University

AMSC

Abstract: ADC is one of the most challenging blocks in the multi-standard receiver design

due to the various data rates and modulation formats adopted in different standards Although ΣΔ ADC with adjustable OSR has been reported for the multi-standard applications, it is difficult to apply ΣΔ ADC to the wide-band receivers, such as 802.11b receivers Time-interleaved Nyquist-rate ADC, on the other hand, is able to provide consistent dynamic range over a wide frequency band while the overall ADC sampling rate can be configured by the number of the interleaved ADCs in operation Using this principle, a configurable time-interleaved pipeline ADC with online digital calibration is designed for 802.11b/Bluetooth (BT) dual-mode receiver The circuit is fabricated in IBM 0.25 BiCMOS technology In the measurement, the ADC achieves 60dB and 64dB dynamic range over 802.11b and BT signal bandwidth, respectively, and consumes 14.8mW in the BT receiving mode and 20.2mW in the 802.11b receiving mode

Bo Xia received his Bachelor degree in Electrical Engineering from Shanghai Jiao Tong

University, China, in 1997 He is now working towards his Ph.D degree in Electrical Engineering at Texas A&M University From 1997 to 1998, Mr Xia worked as a staff engineer in Hewlett Packard Co., Ltd Since 1998, he has been a research assistant in the Analog and Mixed Signal Center, Texas A&M University He held an internship at AGERE, Allentown, Pennsylvania from July 2002 till September 2002 His research includes RF transceiver systems and circuits design, ADC and AGC circuits design Mr Xia is a co-recipient of the Best Student Paper Award on IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2002

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