As an example of dynamic stiffness, consider the power supply from Figure 7-4. This system is a PI voltage controller feeding a current modulator that creates current to power the load. The modulator is a subsystem that pulses voltage to an inductor to create current. Current from the modulator is fed to the main capacitor, which
R(s) = 0 GC(s)
GPC(s)
GP(s)
D(s) + C(s)
+
+ _
Figure 7-3. Simple loop (Figure 7-2) drawn to emphasize disturbance response.
_
UC(s) +
IC(s)
IC(s) IACT(s)
UERR(s)
Controller
ILOAD(s)
Main capacitor
(C) Current +
modulator
To load UF(s)
Figure 7-4.Power supply.
smooths the output voltage. The current from the modulator is summed with the load current to feed the main capacitor. With ideal operation, the current from the modulator (IF) would be equal to and opposite in sign to the load current (ILOAD) to maintain the voltage across the capacitor at a ®xed level. Unfortunately, the load current is a disturbance to the voltage controller, and, as we have discussed, perfect disturbance response is impractical; the feedback current cannot exactly offset dynamic changes in the load current.
The model in Figure 7-5 represents the power supply from Figure 7-4. The model for the current modulators is assumed to be an ideal low-pass ®lter for this discussion.
The direction of the load current is shown pointing into the summing junction so that when the load draws power, the load current is negative. This sign allows the tradi- tional sign (positive) for a disturbance.
Using theG/(1GH) rule, the disturbance response is the forward path from the disturbance to the voltage output (GP(s) or 1/Cs) divided by 1 plus the loop gain (1GP(s)GC(s)GPC(s)):
TDIST s UF s
ILOAD s 1=Cs
1 1=Cs 1KI=sKPLPF s 7:4
Equation 7.4 can be multiplied, numerator and denominator, byCs2. To make the form more recognizable, ideal power conversion (GPC(s)1) is assumed. These steps are combined in Equation 7.5:
TDIST s UF s
ILOAD s s
Cs2KPsKIKP 7:5
Equation 7.5 can be plotted for a typical system as shown in Figure 7-6 [57, 58, 70, 87, 99]. Note that disturbance response is very good (low) at high frequencies because of the main capacitor. The response is also very good at low frequencies; the integrator will remove all the disturbance at DC. In the midrange, the disturbance response is at its worst; this is typical.
KI s
+
_ KP
1 Cs GP(s) GPC(s)
GC(s)
UF(s) ILOAD(s)
+ +
UC(s)
IC(s)
+ +
IACT(s) LPF
IC(s)
Figure 7-5. Model of power supply.
7.1 DISTURBANCES 3131
Larger capacitance will provide better (lower) disturbance response at high fre- quencies. This can be seen by noticing that theCs2term will dominate the denomi- nator when the frequency is high (i.e., whensis large). So
TDIST HIGH FREQ s s Cs2 1
Cs 7:6
Figure 7-7 shows a plot of Equation 7.6 against the disturbance response shown in Figure 7-6 in dashed lines. Notice that increasing the value of capacitance improves (reduces) the disturbance response in the higher frequencies; this is intuitive. Notice also that the disturbance response from the capacitance improves as frequency increases. The s in the denominator of Equation 7.6 implies that the disturbance response improves with higher frequency, as the 20dB/decade slope of 1/Csin Figure 7-7 indicates.
In the medium-frequency range, theKPsterm dominates the numerator of Equation 7.5. Equation 7.5 can be rewritten as
TDIST MED FREQ s s KPs 1
KP 7:7
Frequency UF
ILOAD
Disturbance response low at high freq.
because of capacitor Disturbance
response low at low freq.
because of integrator
Figure 7-6. Typical disturbance rejection (Equation 7.5).
Frequency UF
ILOAD
1 Cs Increasing C
Figure 7-7. Effect ofCon disturbance response is in the higher frequencies.
As Equation 7.7 illustrates, a larger proportional gain helps in the medium frequencies. Equation 7.7 is plotted in Figure 7-8.
In the lowest-frequency range, s becomes very small so that the term KIKP
dominates Equation 7.5, which reduces to
TDIST LOW FREQ s s
KIKP 7:8
Equation 7.8 is plotted in Figure 7-9.
Larger proportional gain improves the low-frequency disturbance response, as does larger integral gain. Recall also from Section 3.5 that the zone-based tuning approach showed that larger proportional gain allows larger integral gains. So increasing KP
improves medium- and low-frequency disturbance response directly (Equations 7.7 and 7.8) and also indirectly helps low-frequency disturbance response by allowing largerKI(Equation 7.8).
Figure 7-10 combines all three approximations (Equations 7.6±7.8) across the valid frequency ranges of each. Notice that the straight-line approximations combine to closely parallel the actual disturbance response.
Recall that a smaller plant gain (here, a larger capacitor) requires proportionally larger KPto maintain the same loop gain. In the case of tuning where the primary limitation on raisingKPis the phase lag of the loop, raisingCallowsKPto be raised proportionally. So raising C improves the high-frequency disturbance response directly but improves the rest of the frequency spectrum indirectly by allowing a higher value of KP. This does not always apply, because in some systems phase lag may not be the primary limitation onKP.KPcan also be limited by noise generated by the feedback, by resolution, which is a form of noise, or by resonance. In these cases, KPcannot be raised in proportion to the falling plant gain, so raising capacitance will not always allow an improvement in the disturbance response in the medium and low frequencies.
Frequency UF
ILOAD
1 KP
Increasing KP
Figure 7-8.Disturbance response is improved in the medium frequencies by higherKP.
7.1 DISTURBANCES 3133