Cautions on Using AnA, A2AS and AnU

Một phần của tài liệu type acpu (common instructions) programming manual ib-66250c (Trang 57 - 62)

2) Program the reset of M9011 and D9011 as shown below

3.8 Cautions on Using AnA, A2AS and AnU

This section gives the cautions to be exercised when AnA, A2AS and AnU is used.

3.8.1 The number of steps used in instructions

(1) The number of steps increases by one every time a device assigned as shown below (device extended by AnA, A2AS and AnU) is used in each instruction.

Range Device Name

AnA A2AS, AnU

Internal relay M, L, S 2048 to 8191

Timer T 256 to 2047

Counter C 256 to 1023

Link relay B 400 to FFF 400 to 1FFF

Data register D 1024 to 6143 1024 to 8191

Link register W 400 to FFF 400 to 1FFF

Annunciator F 256 to 2047

Index register Z 1 to 6

Index register V 1 to 6

If index qualification is performed to the extension device with the extension index register, the number of steps increases only one.

Example

• When basic devices only are used:

• When extension devices are used:

D0 W010………. 5 steps

Total 6 steps

T0……….. 1step T0

+ D0 W010 LD

+

T300……….…………1+1=2 steps

D0 W800………..5+1=6 steps

Total 8 steps

D2000Z1 D300 …. 5+1=6 steps

Total 7 steps

Extension device Extension device T300

+ D0 W800 LD +

T1000………..1+1=2 steps D2000 W010Z1……5+1+1=7 steps

Total 9 steps

Extension device

T0……….1 step Extension device Extension device

T1000

+ D2000 W010

LD + Z1

T0

+ D2000 D300

LD + Z1

(2) If index qualification is used in a 1-step sequence instruction (such as LD, OUT), the number of steps increases one.

Example

• When index qualification is not used:

• When index qualification is used:

REMARK

Even when index qualification is used in a 1-step sequence instruction (such as LD, OUT) with index registers (Z1 to Z6, V1 to V6) extended by AnA, A2AS and AnU, the number of steps increases only one.

Example

LD X0 ………....1 step OUT Y40 ……….…..1 step

Total 2 steps

LD X0Z………1+1=2 steps

OUT Y40……….1 step

Total 3 steps

Index qualification

( )

X000

Y040

LD X0Z3………..1+1=2 steps OUT Y40V6…………1+1=2 steps

Total 4 steps

( )

X000

Y040 V6 Z3

( )

X000

Y040 Z

3.8.2 Instructions of variable functions

The following instructions vary in content of processing when used in the dedicated instructions blocks for the AnA, A2AS and AnU. For details, refer to the AnSHCPU/

AnACPU/AnUCPU Programming Manual (Dedicated Instructions).

Instruction Normal In the Extension instruction Blocks PRC Comment output MELSECNET/MINI-S3 support

instruction FROM

DFRO TO DTO

Special function module Device memory access

MELSECNET/MINI-S3 support instruction

LEDA

LEDB Unusable Dedicated instruction start LEDC LED comment display Device specification DXNR NOT exclusive logical sum operation 32-bit constant specification LEDR LED and annunciator clear Dedicated instruction termination SUB Unusable 16-bit constant specification

REMARK

The dedicated instruction block of AnA, A2AS and AnU is as shown below.

Instructions other than those mentioned above cannot be used in the dedicated instruction blocks.

X010

LEDA

LEDR The instructions mentioned above vary in function if used in this section.

Specifies an dedicated instruction.

3.8.3 Set values for the extension timer and counter

Set values for the timer and counter, shown below, (extended by the AnA, A2AS and AnU) used for the OUT instruction devices should be set with the devices (D, W or R) specified by parameters. For details, refer to the A2A(S1)/A3ACPU User's Manual, the A2U(S1)/A3U/A4UCPU User's Manual or the ACPU (Fundamentals) Programming Manual A2ASCPU(S1) Usds Manual.

Timer T 256 to 2047 Counter C 256 to 1023

Example

• When the set value device for T256 is specified at D370 with parameters:

3.8.4 Cautions on using index qualification

(1) Check device numbers when index qualification is used

The AnA, A2AS and AnU does not check device numbers when index qualifi-cation is used in order to increase the speed of operation processing.

Because of this, error occurred in the result of index qualification is not detected as operation error. When error occurred in the result of index qualification, data of the devices other than specified change.

Exercise great care in writing programs which contain index qualification.

( )

M9038 K

MOV 1000 D370 D370 T256

Set value device is not necessary.

X000

Example:

When T256 and GO are input, the set value device (D370) for T256 is displayed automatically.

(2) Turn-on/off instruction operations at index qualification

When the turn-on/off instructions (PLS, PLF, SETF , RSTF , P) are designated with index qualification when an AnA, A2AS or AnU is used, the instructions are executed only when the execution condition for the turn-on/off execution instruction is established.

Example 1

When M1, M2 and M4 are ON, and M3 is OFF in the circuit shown below:

M1Z SET F1Z F1Z

Number of

scans Device No. ON/OFF state Execution condition

Execution/no

execution state Device No. ON/OFF state

1st scan M1 ON *2 *2 F1 *2

2nd scan M2 ON ON → ON

(not established) No execution F2 OFF

3rd scan M3 OFF ON → OFF

(not established) No execution F3 OFF

4th scan M4 ON OFF → ON

(established) Execution F4 ON

Example 2

When M1, M2 and M4 are ON, and M3 is OFF in the circuit shown below:

Cautions on the PLS circuit with an index in the FOR-NEXT loop.

The PLS is output only corresponding to the device that turns ON first.

For the subsequent devices, the PLS is not output even if the condition is satisfied.

M1Z

SET F1Z INC Z M9036

RST Z

=K4 Z

M9036

M1Z

RST Z FOR K4

Z is cleared.

SET F1Z Execution/no execution of SETF (1 + Z)

INC Z NEXT

*1

M9036

Z+1 is executed.

M1Z SET F1Z F1Z FOR instruction

Device No. ON/OFF state Execution condition

Execution/no

execution state Device No. ON/OFF state

1st M1 ON *2 *2 F1 *2

2nd M2 ON ON → ON

(not established) No execution F2 OFF

3rd M3 OFF ON → OFF

(not established) No execution F3 OFF

4th M4 ON OFF → ON

(established) Execution F4 ON

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