Slide bổ sung điện tử từ trường lecture 5 bjts circuits

BE BB DC load line :... Q1 and Q2 cannot be conducting at same time.If Q1 ON than Q2 OFF, and vice versa... BJT’s biasing schemes1.. Two power supply version bias 5.. Constant current bi

Lecture 05

• Large-signal operation

• BJT circuits at DC

i BE

BE

S c cc

c C cc

o

v V

v

e I R V

R i V

BE v

BE B

B

DC load line :

CE C

C

B CE

CB C

CC

A CE

CA C

CC

Q V

R I

V

Q V

R I

V

>

→ +

×

=

→ +

×

=

Leg room (small)

head room (small)

BJT operate as a switch

Switch on Æ saturation mode

Switch off Æ cut-off mode

Switch off:

CC C

C B

Switch on:

V V

v C = 0 2 ≈ 0

I I

mA m

I I

mA m

I I

mA k

I

V V

V

B B

sat C B

sat C B

sat C

sat CE C

) ( (min)

min

) ( (max)

) (

) (

0653

0 150

8 9

196

0 50

8 9

8

9 1

2 0 10

2 0

β β

k I

R

B

96 1

3 4 7

0

=

Example 5.4 (DC analysis)

V k

I V

mA I

I I

mA mA

I I

mA k

R

V I

V V

V

C C

C E

B

E C

E

E E

E

3 5 7

4 10

01 0

99 0

1 1 100 100

1 3

3

3 3

3 3 7

0 4

I V

mA I

I I

mA mA

I I

mA k

R

V I

V V

V

C C

C E

B

E C

E

E E

E

48 2 7

4 10

016

0

584

1 6

.

1 1 100 100

6

1 3

3

3 5

3 5 7

0 6

Assume BJT in saturation mode :

mA I

I I

mA I

mA m

I

V I

V V

V V

V V

V

C E

B C

E

E E

sat CE E

C E

64 0

96

0 7

4

5 5 10

6

1 3

3

3 5

5 5 2

0 3 5

3 5 7

0 6

) (

= +

=

=

−

=

mA I

mA I

mA I

V V

cc C

C E B BE

10 0

0 0 0

I I

V k

m V

R I

V

mA m

I I

mA k

I

V V

C C

C

E C

E E

05 0

4 5 10

1 6

4 10

6 4 65

.

4 101 100

65

4 2

7 0 10

7 0

mA I

I k V

I k V

B C

B

B BE

B

3 4

043

0

7 0 100

100 5

mA I

impossible V

V m

k V

V I

I

mA k

I V

V

I e

l R

V V

V

C E

C

E E

B B

B EB

E

0 5

0

) (

38 5

3 4 10

3 4

3

4 1

7 0 5 7

0

0 arg

=

k R

V k

k

k V

V

BB

BB

3 33 50

//

100

5 50

100

50 15

=

=

= +

=

mA I

R I

I V

R I V

R I V

R I V

B

E B

B BE

BB B BB

E E BE

BB B BB

0128

0

) (

+

=

+ +

=

β

Reverse bias

forward bias

V

mA I

I

mA k

I

V V

V

V

V V

V R

I V

R I I

C C

C B C

62 7 7

2

82 2

85 2 2

3 9 15

3 9 7

0

6 8

) (

15

2

2

2 2

1 1

1 2 1

with

Q1 and Q2 cannot be conducting at same time.

If Q1 ON than Q2 OFF, and vice versa.

Assume Q1 on and Q2 off :

BJT’s biasing schemes

1 self-bias

2 Base fixed bias

3 Collector-feedback bias

4 Two power supply version bias

5 Constant current bias

1

) ( 10 38

KT V

e I i

o T

S C

T V BE V

1.Temperature change ÆCollector biasing current change 2.Device change Æ biasing current change

Why we need good biasing scheme?

BE BB

R R

V V

β

+ +

BE BB

E

R

V

V I

Constrains:

Insensitive to T and β

CC BB

V R

I

V V

1 3 1

R R

R

R R

R R

2 1

1 Q

β

Suggestion:

CC

E V I

R

R + ) × 0 1 × = ( 1 2

1 Self-Bias (emitter feedback bias)

BE CC

E

R

V

V I

The rule of thumb :

CC CB

CE

CC C

C

CC BB

V orV

V

V R

I

V V

3 1 3

1 3 1

)

=

=

Example 5.13 design the following self bias circuit

BE BB

E

R

V

V I

The rule of thumb :

k m

I R

k m

I

V R

V V

V

V V

E C

E

E E

BE E

B

4 1

99 0

4 12

3

3 1

3 3

3 3 4

4 12

3 1

3 1

R V

V

a R

R

V I

R R

CC B

CC E

) ( 4

) ( 12 1

1 0 ) (

1 0 ) (

2

2 1

2 1

⇒

=

×

× +

L L

2 Base fixed bias

B

V

R V

R R

3 Collector-feedback bias (a)

=

+ +

=

1

B

R C

BE CC

C B

E

BE B

B C

E CC

R

V V

I I

I

V R

I R

I V

R R

CE

C C C

I I

V

R I I

T

Good biasing scheme

= +

=

+ +

+ +

+

=

1

) (

) (

B

R E

C

BE CC

C B

E

E C B

BE B

B C

C B

CC

R R

V

V I

I I

R I

I V

R I R

I I

CE

E C

I I

V

I I

T

Good biasing scheme

4 Two-power supply version

+

1

B

R E

BE EE

E

EE E

E BE

B B

R

V

V I

V R

I V

R I

BE BB

R R

V V

Constrains:

5 Constant current bias by Current mirror

R

V V

V I

I

R

V V

V I

BE EE

CC f

BE EE

CC f

− +

β β

β

β β

≈ +

=

) 2 (

) 2 (

) 2 (

2

1 2

1

2 1

2 1

2 1

1

REF

B C

C

B B

C REF

B B

B

B B

C REF

I I

I I

I I

I I

I I

I I

I

Q Q

I I

I I

Q