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Analysis and design of linear circuits

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Problem 4-4 a Find the voltage gain vO'vS and current gain iO'ix b Validate your answers by simulating the circuit in OrCAD.. The gain is reduced for Circuit 2 because the source resisto

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http://www elsolucionario.blogspot.com

LIBROS UNIVERISTARIOS

Y SOLUCIONARIOS DE MUCHOS DE ESTOS LIBROS

LOS SOLUCIONARIOS CONTIENEN TODOS LOS EJERCICIOS DEL LIBRO RESUELTOS Y EXPLICADOS

DE FORMA CLARA VISITANOS PARA

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Problem 4-4

(a) Find the voltage gain vO'vS and current gain iO'ix

(b) Validate your answers by simulating the circuit in OrCAD

in Figure P4-4

Solution:

(a) The solution is presented in the

following MATLAB code

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Solution:

The solution is presented in the following MATLAB code

clear all

syms vs is ie io B Rs Re Rc vA

% Write a KCL expression at node A

Eqn1 = '(vA-vs)/Rs + vA/Re - B*ie';

% Write additional equations relating the variables in the circuit

Eqn2 = 'ie -vA/Re';

Eqn3 = 'io + B*ie';

Eqn4 = 'is -(vs-vA)/Rs';

% Solve the equations

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Problem 4-7

(a) Find the voltage vO

(b) Validate your answer by simulating the circuit in

% Use node-voltage analysis

Eqn1 = '(vx-10)/2.2e3 + vx/1.5e3 + (vx-vo)/1e3 + 1e-3*vx';

Eqn2 = '-1e-3*vx + (vo-vx)/1e3 + vo/3.3e3';

% Solve the equations for vo

1 kΩ B A

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Problem 4-8

(a) Find an expression for the current gain iO'iS

(b) Find an expression for the voltage gain v

% Write additional equations relating the circuit parameters

Eqn2 = 'vo + mu*vx';

Eqn3 = 'is - (vs-vx)/R1';

Eqn4 = 'vo - io*RL';

% Solve the equations

2 V

)μ1

(

μ

R R

R K

++

=

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Solution:

The solution is presented in the following MATLAB code

clear all

syms vs vx Rs g Ro vo

% Write a node-voltage equation

Eqn1 = '(vo-vs)/Rs - g*vx + vo/Ro';

% Write additional equations relating the parameters in the circuit

O

O S O

V

R R R

gR

R R

gR

K

++

+

=

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Problem 4-10

(a) Find an expression for the voltage gain vO'vS

(b) Let R

in Figure P4-10

S= 10 kΩ, RL = 10 kΩ and μ = 100 Find the voltage gain vO'vS as a function of RF

What is the voltage gain when RF is an open circuit, a short circuit, and for RF

(c) Simulate the circuit in OrCAD by varying R

% Write a node-voltage equation

Eqn1 = '(vA-vs)/Rs + (vA-mu*vx)/Rf';

% Write other equations relating the circuit parameters

Eqn2 = 'vA - (vx + mu*vx)';

Eqn3 = 'vo - mu*vx';

% Solve the equations

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(c) The OrCAD circuit and simulation results are shown below

Vs 1V

RL 10k

0

R1

10k

+

-+ -

F V

)μ1

(

μ

R R

R K

++

=

(b)

10000101

100

F

F V

(c) The OrCAD results are presented above With R

equal to 100/101, 0, and 0.4975, respectively

F as an open circuit or short circuit, the

voltage gain values approach the correct values For RF= 100 Ω, we have KV = 0.4975, which agrees with the calculations in Part (b)

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clear all

syms vs Rs Rp r is vT RT isc

Eqn1 = 'is - (vs-r*is)/Rs';

Eqn2 = 'vT - r*is';

Eqn3 = 'isc - r*is/Rp';

% Solve the equations

rV v

+

=

S

S T

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Problem 4-12

Find RIN in Figure P4-12

iS

r@iSR

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Problem 4-13

Find RIN in Figure P4-13

iS

SR

syms is ix vin R Rin B

Eqn1 = 'ix - (is + B*ix)';

Trang 16

S O T

β

R R

v R v

+

=

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Problem 4-16

The circuit parameters in Figure P4-16 are RB = 50 kΩ, RC = 4 kΩ, β = 120, Vγ = 0.7 V, and VCC

= 15 V Find iC and vCE for vS = 2 V Repeat for vS

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Problem 4-17

The circuit parameters in Figure P4-16 are RC = 3 kΩ, β = 100, Vγ = 0.7 V, and VCC = 5 V

Select a value of RB such that the transistor is in the saturation mode when vS

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Problem 4-19

Two OP AMP circuits are shown in Figure P4-19 Both claim to produce a gain of either ± 10

(a) Show that the claim is true

(b) A practical source with a series

resistor of 1 kΩ is connected to the input

of each circuit Does the original claim

still hold? If it does not, explain why?

Solution:

(a) The solution is presented in the

following MATLAB code

The gain is reduced for Circuit 2 because the source resistor is in series with the OP AMP's input

resistor, which effectively increases the value of R1 used to compute the gain for the inverting

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Problem 4-20

Suppose the output of the practical source shown in Figure P4-19 needs to be amplified by – 100 and you can use only the two circuits shown How would you connect the circuits to achieve this? Explain why

as requested

Answer:

Presented above in the Solution

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Problem 4-21

(a) Find vO in terms of vS

(b) Validate your answer by simulating the circuit in OrCAD

(a) Find the Thévenin equivalent of the input circuit and then analyze the circuit as an inverting

OP AMP The solution is presented in the following MATLAB code

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% No current flows into the OP AMP, so the voltage at the positive

% input terminal is vs and the circuit is configured as a non-inverting

% amplifier The load resistor does not affect the output voltage

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% The circuit is connected as a non-inverting amplifier

% Perform voltage division to find the voltage at the positive input terminal syms vs vo io vp

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% Set v1=1, and solve for v2 in terms of vo

% Evaluate the expression for vo for the saturation limits

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Problem 4-29

The switch in Figure P4-29 is open, find vO in terms of the

inputs vS1 and vS2 Repeat with the switch closed

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% The circuit is connected as a non-inverting amplifier with a modified input

% Determine the voltage at the positive input terminal in terms of vs1 and vs2

% Use node-voltage analysis

2 S 1 1 S 2 3

4

3

O

R R

v R v R R

R

R

v

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Solution:

With the switch closed, the OP AMP's positive terminal is connected to ground and the circuit is connected as an inverting amplifier with a gain of −R/R = −1 The input signal is vS, so we have

vO = −vS With the switch open, the input signal appears at the positive terminal, because no

current flows into the OP AMP If vP = vS, then vN = vS, and the voltage vS appears on both sides of the top left resistor Since there is no voltage drop across the resistor, there is no current through it and there is no current flowing into the OP AMP Therefore, there is no current

flowing through the top right resistor and it does not cause a change in voltage The output

voltage must also match, so vO = vS

Answer:

The claim is false With the switch closed, vO = −vS, and with the switch open, vO = vS

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=

O S

S T

I R

v n V

V v

e I

(b) Using MATLAB plot vO versus vS for RS = 10

kΩ, IO = 10–14 A and VT = 0.025 V Plot your results

on a semilog plot for 10–6 V ≤ vS≤ 100 V

% Write a node-voltage equation at the negative input terminal of the OP AMP

% Note that the vp = vn = 0, because the positive terminal is grounded

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% Write two node-voltage equations

% Note that vp = vn = 0, because the positive input terminal is grounded syms vs vo vA R R1 R2 R3

Eqn1 = '(0-vs)/R + (0-vA)/R1';

Eqn2 = 'vA/R1 + vA/R2 + (vA-vo)/R3';

% Solve the equations

% Based on the results in Part (a), if all of the resistor values are equal,

% then the gain will be -3

RR

R R R R R R v

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'2R regardless of the load That

is, show that the circuit is a voltage-controlled current source

Eqn3 = '(vp-vo)/R + vp/2/R + io';

% Solve the equations

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% Turn on vs1 and ground vs2

% The signal from vs1 passes through two inverting amplifiers

K1 = -R2/R1;

K2 = -R1/R2;

Kvs1 = K1*K2;

% Turn on vs2 and ground vs1

% Analyze each path for vs2 separately

% First path is through both OP AMPs

% One is a non-inverting amplifier and the other is an inverting amplifier K3 = (R1+R2)/R1;

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Problem 4-36

(a) Find vO in terms of the inputs vS1 and vS2

(b) (D) Redesign the circuit using only one OP AMP

(a) The signal vS1 experiences an inverting amplifier followed by an inverting summer The

signal vS2 experiences just the inverting summer The following MATLAB code provides the required steps to solve the problem

subtractor circuit in Figure 4-40 as a model, we set v1 = vS2 and v2 = vS1, to have the correct

signs for the gains To get K1 = −10, choose R1 = 1 kΩ and R2= 10 kΩ We can solve for R3

100001000

3 4 4

3 4 1

2 1

R R

R

R R

R

R R

R R

K

as follows:

(c) Simulate the circuit designed in Part (b) in OrCAD and verify the gain terms The following

two simulations show the results for two inputs sets: (1) vS1 = 1 V and vS2 = 0 V and (2) vS1 = 0

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V and vS2 = 1 V Since the circuit is linear, the two results are sufficient to demonstrate it has the correct gain response

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The solution is presented in

the following MATLAB code

Eqn1 = '(vp-v1)/10e3 + (vp-5)/10e3';

Eqn2 = vn/10e3 + (vn-v2b)/50e3';

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10 k Ω +

The circuit is a combination of a non-inverting amplifier and an inverting summer with three

inputs The input to the non-inverting amplifier is v1 and it has a gain of 2, so its output is 2v1

The three inputs to the inverting summer are v1 + 2 V, v1, and the output of the non-inverting

amplifier, 2v1 The gains associated with the inverting summer are −1, −1, and −2, respectively The following MATLAB code completes the calculations

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+ -

vo +

The circuit is a combination of an inverting summer followed by a non-inverting amplifier The

two inputs to the inverting summer are vS and vO The input to the non-inverting amplifier is the output of the inverting summer The following MATLAB code develops the solution

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Problem 4-41

Design an OP AMP amplifier with a voltage gain of !10 and an input resistance greater than 10

kΩ using standard 5% resistance values less than 300 kΩ

R2 150k V1

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OPAMP

+

OUT

-R1 10k

0

0

R2 10k

R3 10k R4

10k

Vo

Answer:

Presented above

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R2 15k

R3 5k

R4 5k

V1 1Vdc

0 0

V2 1Vdc

0

Vo

Answer:

Presented above

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R2 100k

R3 10k

R4 100k

V1 1Vdc

V2 1Vdc

0

Vo

Answer:

Presented above

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Problem 4-45

Using no more than two OP AMPs, design an OP AMP circuit with inputs v1, v2, and v3 and an

output vO = – 3v1 + 2v2 ! 5v3

Solution:

There are three signals summed together One signal has a positive gain and the other two have

negative gains To achieve this combination, send signal v2 through an inverting amplifier with

a gain of −1 and then to an inverting summer with a gain of −2 along that input path Send the other two signals directly to the inverting summer with gains of −3 and −5, respectively The following circuit meets the specifications

R2 10k V2

1Vdc

0 0

15k R5 10k R6 6k V3

1Vdc

V1 1Vdc

0

0

Answer:

Presented above

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Problem 4-46

Design the interface circuit in Figure P4-46

so that 10 mW is delivered to the 100-Ω

load Repeat for a 100-kΩ load Verify your

designs using OrCAD

We need output voltages of 1 V and 31.6228 V Since the input voltage is 2 V, we can use a

voltage divider and a buffer to produce 1 V at the output For an output voltage of 31.6628, we can use a non-inverting amplifier with a gain of 15.8114 The required designs are shown below Other correct designs are possible

Note: For the second circuit, we have

to adjust the maximum and minimum output values for the OP AMP

P2

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Problem 4-47

Design the interface circuit in Figure P4-47 so that the output is v2 = 150v1 + 1.5 V

v

Interface circuit

Two signals are combined together, both with positive gains We need to use an inverting

summer to combine the signals and then an inverting amplifier to get the correct gains The

input signal v1 has a gain of 150 and the input voltage of 1.5 V has a gain of 1 The following design meets the specifications

-R3 150k R4

950

R5 150k

-R7 10k

R8 10k

0

V2

R6 50

R9 50k

0

Answer:

Presented above

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Problem 4-48

(a) Design a circuit that can produce vO =1000vX+5V using two OP AMPs

(b) Repeat using only one OP AMP

1Meg 5V

0 0

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Problem 4-49

A requirement exists for an OP AMP circuit with the input-output relationship

vO = 5vS1− 2v

Two proposed designs are shown in Figure P4-49 As the project engineer, you must

recommend one of these circuits for production Which of these circuits would you recommend

for production and why? Hint: First, verify that the circuits perform the required function

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Problem 4-50

A requirement exists for an OP AMP circuit to deliver 12 V to a 1-kΩ load using a 4-V source as

an input voltage Two proposed designs are shown in Figure P4-50 Some characteristics of the

OP AMP that must be used in the design are

The OP AMPs have open-loop gains and input resistances that make the ideal OP AMP

assumptions reasonable The output voltage range includes 12 V, so both approaches are

acceptable with respect to the desired output voltage Circuit 1 uses suspiciously low resistor values, which may increase the required output current beyond the OP AMPs operating range The following MATLAB code calculates the output current for each design

The output current for Circuit 1 is greater than the maximum value that the OP AMP can

produce, so Circuit 1 does not meet specifications Circuit 2 meets all of the specifications Answer:

Circuit 2

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Problem 4-51

A particular application requires that an instrumentation interface deliver vO =200vTR −5V ±2

% to a DAC The solution currently in use requires two OP AMPs and is constantly draining the supply batteries A young engineer designed another tentative solution using just one OP AMP shown in Figure P4-51 As her supervisor, you must determine if it works Does her design meet the specifications?

clear all

format short eng

% Find the Thevenin equivalent of the constant voltage input

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Problem 4-52

The analog output of a five-bit DAC is 3.90 V when the input code is (1, 1, 0, 0, 1) What is the full-scale output of the DAC? How much does the analog output change when the input LSB changes?

The following MATLAB code confirms these calculations

The full-scale output voltage is vO,MAX

When the LSB changes, the output change is v

= 4.836 V

O,MIN = 0.156 V

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Problem 4-53

The full-scale output of a six-bit DAC is 10.5 V What is the analog output when the input code

is (0, 1, 0, 1, 0, 1)? How much does the analog output change when the input LSB changes?

For input code (0, 1, 0, 1, 0, 1), vO

When the LSB changes, the output change is v

= 3.5 V

O,MIN = 167 mV

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Problem 4-54

An R-2R DAC is shown in Figure P4-54 The digital

voltages v1, v2, etc can be either 5 V for a logic 1 or 0 V

for a logic 0 What is the DAC’s output when the logic

input is (1, 0, 0 1)?

Solution:

Use node-voltage analysis to find an expression for vO in

terms of the input voltages The following MATLAB

code provides the solution

clear all

syms v1 v2 v3 v4 va vb vc vo R

Eqn1 = '(0-v1)/2/R + (0-va)/R + (0-vo)/2/R';

Eqn2 = '(va-0)/R + (va-v2)/2/R + (va-vb)/R';

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Problem 4-55

A Chromel-Constantan thermocouple (curve E)

has the characteristics shown in Figure P4-55

Design an interface that will produce a 0- to

5-V output where 0 5-V refers to 0º C and 5 5-V

refers to 1000º C The transducer can be

modeled as a voltage source in series with a 15

Ω resistor

Solution:

Using MATLAB, determine the gain and bias

required to complete the interface We can find

the gain and bias by solving a pair of linear

equations relating the input and output

The gain is K = 65.7895 and there is no bias voltage The following non-inverting amplifier

circuit will meet the specifications for the interface

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Problem 4-56

A small pressure transducer has the characteristics shown

in Figure P4-56 Design an interface that will operate

between 7- and 32-psi An input of 7 psi should produce

–5 V and 32 psi should produce 5 V The transducer is

modeled as a voltage source in series with a 500 Ω

resistor that can vary ± 75 Ω depending on the pressure

The OP AMPs you must use have a maximum

closed-loop gain of 2000 Your available bias source is 5 V

Solution:

Using MATLAB, determine the gain and bias required to

complete the interface We can find the gain and bias by

solving a pair of linear equations relating the input and

output specifications

clear all

syms K vBias

% 7 psi: 1000 microV input maps to a -5 V output

% 32 psi: 400 microV input maps to a 5 V output

Eqn1 = '-5 - (K*1000e-6 + vBias)';

Eqn2 = '5 - (K*400e-6 + vBias)';

The gain is K = −16667 and the bias voltage is 11.667 V The following circuit will meet the

specifications for the interface Note that the bias source is inverted so that the output bias has the correct sign

214.286k 5V

0 Vtr

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