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Trang 1Microprocessor - Semester 2 2016-2017 - Homework 1 XM
1) Which of the following is not an instruction mnemonic of the MSP430 CPU:
a. BIS
b ORG
c. JC
d. XOR
e. JNZ
f. BIC
g. MOV.W
2) Which of the following is not one of the fundamental components of all microcomputers:
a. Input
b. Output
c A/D converter
d. Control unit
e. Memory
f. ALU
3) The instruction mov.w #0x567A, 4(R5) uses which MSP430 addressing modes?
a. Register direct, register direct
b. Absolute, register direct
c Immediate, register indexed
d. Symbolic, register indirect
e. None of the above 4) What is the minimum number of bus cycles required to move a 16-bit word of data from the memory into the MSP430 CPU?
Answer: 1 bus cycle (since the data bus is 16-bits wide)
5) A certain byte-addressable microprocessor has 20-bit address bus How many bytes can be addressed by
this microprocessor?
Answer: 1 MB or 1,048,576 bytes
6) The MSP430 mov instruction supports a total of 4 source addressing modes (only consider basic
addressing modes)
7) An MSP430 instruction using indexed addressing for the source operand and absolute addressing for the destination operand occupies a total of 3 words of memory
8) The number prefix “#” identifies what to the MSP430 assembler?
a. A comment
b. Absolute addressing mode
c. A hex number
d. A binary number
e None of the above 9) If the register R5 contained the hex number 0x1234, the instruction mov @R5, R7 means what?
a. Load the number 0x1234 into the register R7
b. Load the contents of memory location 0x1234 into the register R7
c. Copy the contents of the register R5 into the register R7
d Store the contents of the register R7 to the memory location 0x1234.
e. None of the above
10) The MSP430 instruction mov.w R6, 0x0136 means what?
a Store the higher half of R6 to the memory location 0x0137 and the lower half to the memory location 0x0136
b. Store the higher half of R6 to the memory location 0x0136 and the lower half to the memory location 0x0137
c. Store the number 0x1236 to the register R6
d. None of the above
11) Assume R7 contains the value 0x1273 The MSP430 instruction mov.b 3(R7), R8 means what?
a Load the byte stored in 0x1276 into the lower half of R8 and clear the upper half of R8
b. Load the byte stored in 0x1276 into the upper half of R8 and clear the lower half of R8
Trang 2c. Load the value 0x12 into the lower half of R8 and 0x76 into the upper half of R8
d. Load the value 0x76 into the lower half of R8 and 0x12 into the upper half of R8
e. None of the above
12) The instruction mov #45,0x1234 requires how many 16-bit operands?
Answer: 2 is 45 & 0x1234
13) Fill out the contents of the MSP430 registers for the following code segment which starts from 0xC400
Your answers should reflect the content after each instruction has executed If the contents are unknown,
write a question mark (?) in the blank All numbers should be given in hexadecimal Assume that MICKEY and JERRY are memory locations at 0x0280 and 0x0282, respectively
main: mov.w #0x1234, R4 PC = 0xC404
mov.w R4, MICKEY M(MICKEY) = 0x1234 mov.w #JERRY, R6 R6 = 0x0282
mov.w #0x1230, R6 R6 = 0x1230
mov.w #0x1235, R7 R7 = 0x1235
and.w R7, R4 R4 = 0x0000
14) Convert the following assembly code into machine code All answers should be in hexadecimal format Write the instruction word (the first word) as a 16-bit value and all operands as 16-bit values Assume that the code starts at 0xAC00
main: and.b R10,0x4040 IC = FAC0 Operand(s) = 403E
mov.w R4,R13 IC = 440D Operand(s) = <none>
bis.w @R11,R12 IC = DB2C Operand(s) = <none>
add.w &0x0200, R5 IC = 5215 Operand(s) = 0200
xor.w #0x1234, R8 IC = E038 Operand(s) = 1234
… 15) When using the indirect register addressing mode, the register provides:
a. The address of the data to work with
b The actual data to work with
c The address of the address of the data to work with
d None of the above
16) Convert the following machine code back to the original assembly code Each line decodes to a single instruction Each instruction code and operand is provided as a 16-bit value in hex You can use emulated instructions
0xc000: 4031 0280 mov.w #0x0280,SP
0xc004: 40B2 5A80 0120 mov.w #0x5A80,&0x0120
0xc00a: D3D2 0022 bis.b #001,&0x0022
0xc00e: E3D2 0021 xor.b #00z,&0x0021
0xc012: 403F 5000 mov.w #0xC350,R15
0xc016: 831F dec.w R15
0xc018: 23FE jnz 0x3FC
0xc01a: 3FF9 jmp 0x3F2
17) The MSP430 address bus is 16_ bits wide and the data bus is 16 bits wide
18) Assume we want to set bit 7 and clear bit 0 (set bit 7 to a 1 and bit 0 to a 0) in an 8-bit control register mapped to memory location 0x000A simultaneously (in that control register) and without affecting the state
of the other bits in that control register Show the assembly code required to do that Use only one general purpose register to do that
mov.b 0x000A, R5
bis.b #10000000b, R5
Trang 3and.b #11111110b, R5
mov.b R5, 0x000A
19) Which of the following needs two 16-bit machine code operands?
a. xor #0x0040, R5
b mov 0x0234, 0456h
c. sub R5, 0x0056
d. add @R7+, 0x0078
e. None of the above
20) Which of the following requires no machine code operands?
a. mov #0x0040, R5
b add @R9+, R10
c. sub 4(R5), 0x0056
d. bic @R7, 0x0078
e. None of the above
21) What the 5 flags of the status register (SR) control directly the MSP430 MCU?
Answer: Zero flag (ZF), Carry flag (CF), Negative flag (NF), Overflow flag (VF), Interrupt
flag (IF).
22) Approximately how long would it take the MSP430 (if the MCLK frequency were 1 MHz) to execute the following code segment?
main: add.w 0x1234,4(R7) 6 cycle
xor.b #0x10,R8 2 cycle
Answer: 8cycle*1/106=8 us
23) How many words of memory are consumed by the above chunk of code (in question #22)?
Answer: 3+2=5 word
24) Which two MSP430 registers have “constant generator” capabilities and what are constants can be generated by each of them?
Answer: R2/SR and R3 The constants are -1, 0, 1, 2, 4, 8
25) How many writes and reads are performed to and from memory on the MSP430 address/data bus for the given assembly instruction:
sub.w R4, 3(R5) Machine code: 8485 0003
Answer:
Number of reads = 2(to read in machine code) + 1 (to read destination) =3
Number of writes = 1 (destination in CPU)
26) How many writes and reads are performed to and from memory on the MSP430 address/data bus for the given assembly instruction:
add.w &0x0050, R5 Machine code: 5215 0050
Answer:
Number of reads = 2 (to read in machine code) + 1 (to read destination) = 3
Number of writes = 0(destination in CPU)
27) Name one thing that makes a microcontroller different from a microprocessor:
Answer: Many answers are acceptable Most notably, microcontrollers have on-chip peripheral devices (while microprocessors do not) A microcontroller is a “computer on a chip” (since it has all 5 classic components of a computer) and a microprocessor (by itself) is not a computer
28) Show the optimized machine code for the following instruction—making use of the constant generators:
mov.w #-1, R9
Answer: 0x4039 FFFF
29) Show the optimized machine code for the following instruction—making use of the constant generators:
mov.w #8, R10
Answer: 0x430A 0008
30) Show how the 16-bit value 0x3412 would be stored to memory location 0x0040 on both a big endian and
little endian machine Assume the CPU and memory architecture is byte addressable Write a “?” in the
blank if the contents are unknown Write all answers in hex
Trang 4Big Endian: M(0x003F) = _ M(0x0040) = 0x34 _ M(0x0041) = 0x12
Little Endian: M(0x003F) = _ M(0x0040) = _0x12 M(0x0041) = 0x34
31) Which of the bit-wise logical instructions available on MSP430 can be used to invert all bits in a register to the opposite state and could also be used to compare two registers for equality? Give an example:
XOR
example: mov eax, 0x18
xor eax, 0x7575
The above example will store 0x756D (111010101101101 in binary) into EAX
32) What bit-wise logical MSP430 instruction should be used to force selected bits to zero within a byte without impacting other bits? Give an example
AND or BIC
example: mov eax, 0x18
and eax, 0x7575
The above example will store 0x10 (10000 in binary) into EAX
33) Instruction operands can be found in?
a Registers
b Memory
c The Stack
d In the instruction itself
e All of the above
34) All MSP430 assembly instructions
a affect (change) condition codes (status flags in SR)
b can execute in one cycle
c have an emulated form
d store a result
e use the ALU
f None of the above is true
35) In an Assembly source program maybe have the followings:
a Assembly instructions
b Directives for Assembler
c Comments
d Labels
e All of the above
36) Which of the following instruction used to initiate the stack:
a mov.w #0x0280, R1
b mov.w #0x0280, R4
c mov.w #0x0280, R7
d mov.w #0x0280, R10
e None of the above
37) Which of the following instruction used to stop the Watchdog Timer:
a mov.w #0x5A80, &0x0120
b mov.w #WDTPW + WDTHOLD, R15
c mov.w #WDTPW, &WDTCTL
d mov.w #WDTHOLD, &0x0120
e None of the above
38) The JMP and BR instructions can both reach any memory location from any other memory location
a TRUE
b FALSE
39) The Call instructions occur at predictable times
a TRUE
b FALSE
40) Interrupts occur at predictable times
a TRUE
b FALSE