NEW70 80 90 50 PEW51 LA 5892p r10 20100121 ACER aspire 5741 UMA

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.NEW70 M/B LA-5892P Schematic 1.0

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THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

NEW70 M/B LA-5892P Schematic 1.0

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC

Compal Electronics, Inc.

Intel Arrandale Processor with DDRIII + Ibex Peak-M NEW70 / 80 / 90 / 50 <LA-5892P> M/B Schematics Document

REV:1.0

Compal Confidential

2010-01-21

www.rosefix.com

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6.4G/8.5G/10.6G 100M/133M/166M(CFD)

100MHz

33MHz

100MHz

100MHz 1GB/s x4

DMI x4 FDI x8

USB port 0 (sub board) USB Port 1 Left side USB port 2 (sub board)

port 1

SATA ODD Conn.

HDMI Conn.

USB port 9

Card Reader

page 39

Level Shift

page 24

USB port 12 USB port 13 Mini card

133/120/100/96/14.318MHZ to PCH 48MHZ to CardReader

Clock Generator IDT: 9LRS3199AKLFT SILEGO: SLG8SP587

ZZZ1

HDMI+HDCP LOGO

RO0000003HM46@

www.rosefix.com

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Project ID / Board ID Table for EC-AD channel

+0.75VS 0.75V switched power rail for DDR terminator

+3VALW 3.3V always on power rail

5V always on power rail 3.3V switched power rail

5V switched power rail

ON ON ON ON

EC SM Bus1 address

Device

OFF

+1.05VS_VTT 1.05V switched power rail (1.05 for AUB CPU) ON OFF OFF

1.5V switched power rail +CPU_CORE

STATE SIGNAL Full ON

S1(Power On Suspend) S3 (Suspend to RAM) S4 (Suspend to Disk) S5 (Soft OFF)

0 8.2K +/- 5%

0 V

0.436 V 0.712 V

0.503 V 0.819 V

0.538 V 0.875 V

1.036 V

1.935 V 2.500 V

2.200 V 3.300 V

Adapter power supply (19V)

AC or battery power rail for power circuit.

Core voltage for CPU

1.05V switched power rail for PCH

External PCI Devices

ON OFF OFF ON

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

OFF ON

ON

ON ON*

OFF OFF

ON ON ON ON

ON ON

ON

OFF OFF OFF

OFF OFF OFF OFF OFF

LOW

LOW LOW LOW LOW LOW LOW

HIGH HIGH HIGH HIGH

HIGH HIGH HIGH HIGH HIGH HIGH

OFF

N/A N/A N/A

N/A N/A N/A Power Plane Description

EC SM Bus2 address

Device

Smart Battery

OFF OFF

+1.5V 1.5V power rail for DDRIII ON ON OFF

BTO Option Table

BTO Item BOM Structure

USB 2.0 USB 1.1 Port 4 External

USB Port

3 External USB Port

Ext1 USB Ext2 USB

Camera

1st Min-Card 2st Min-Card Card Reader

Ext1 USB Ext2 USB

Camera

1st Min-Card 2st Min-Card Card Reader

Ext3 HS USB Ext3 HS USB

0 1 2 3 4 5 6 7 8 9 10 11 12 13

EHCI1

EHCI2

USB Port Table

0.1 0.2 0.3 1.0

NEW70 NEW80 NEW90

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WW41 Recommend not pull down PCIE2.0 Jitter is over on ES1

*1:Disabled; No Physical Display Port attached to Embedded Display Port 0:Enabled; An external Display Port device is connected to the Embedded Display Port

CFG0 - PCI-Express Configuration Select

CFG3 - PCI-Express Static Lane Reversal

*1:Single PEG 0:Bifurcation enabled

eDP Signals Mapping

PEG_HTX_C_GRX_N1

PEG_GTX_C_HRX_N2 PEG_HTX_C_GRX_P2 PEG_HTX_C_GRX_P0

PEG_HTX_C_GRX_N2 PEG_HTX_C_GRX_P3

PEG_GTX_C_HRX_P3

PEG_HTX_C_GRX_N0

PEG_HTX_C_GRX_N3 PEG_HTX_C_GRX_P1

R83.01K_0402_1%

@

R83.01K_0402_1%

@

R120_0402_5%

@

R120_0402_5%

@

R63.01K_0402_1% @

R63.01K_0402_1% 1@ 2

R53.01K_0402_1% @

R53.01K_0402_1% 1@ 2

RSVD38 AJ26

RSVD_NCTF_42 AT3

RSVD39 AJ27

RSVD_NCTF_40 AP1RSVD_NCTF_41 AT2RSVD_NCTF_43 AR1

RSVD_TP_86

H16

RSVD45 AL28RSVD46 AL29RSVD47 AP30RSVD48 AP32RSVD49 AL27RSVD50 AT31RSVD51 AT32RSVD52 AP33RSVD53 AR33RSVD_NCTF_54 AT33RSVD_NCTF_55 AT34RSVD_NCTF_56 AP35RSVD_NCTF_57 AR35RSVD58 AR32

RSVD16

A19 RSVD15B19

RSVD22

AB9 RSVD21AC9

RSVD_TP_74 AG7RSVD_TP_70 AD2

RSVD_TP_75 AE3RSVD_TP_76 V4RSVD_TP_77 V5RSVD_TP_78 N2RSVD_TP_81 W3RSVD_TP_82 W2RSVD_TP_83 N3RSVD_TP_79 AD5

RSVD_TP_84 AE5RSVD_TP_80 AD7

RSVD_TP_85 AD9

RSVD36 AL26RSVD_NCTF_37 AR2

RSVD_TP_59 E15RSVD_TP_60 F15KEY A2RSVD62 D15RSVD63 C15RSVD64 AJ15RSVD65 AH15

VSS AP34

R110_0402_5%

@

R110_0402_5%

@

R73.01K_0402_1%

@

R73.01K_0402_1%

@

R90_0402_5%

@

R90_0402_5%

2

R100_0402_5%

@

R100_0402_5%

2www.rosefix.com

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XDP_TCLK

XDP_TDOXDP_TDO_M

XDP_TDI_MXDP_TDO_R

H_CPURST#PLT_RST#

PM_DRAM_PW RGD_R

XDP_TDI_RXDP_TDO_R

XDP_TDO_MXDP_TDI_M

XDP_DBR#_RH_CPUPW RGD_1

Title

GMCH Only

STUFF -> R653, R657, R662

NO STUFF -> R655, R660 STUFF -> R653, R655

NO STUFF -> R657, R660, R662

NO STUFF -> R653, R655, R657 STUFF -> R660, R662

JTAG MAPPING

Delete dampling resistor for power noise and Layout space issue

2009/2/4 2009/2/4

#414044 DG

Update Rev1.11

2009/08/14 #425302 CP_S3PowerReduction WhitePaper_Rev0.9

#425302

CP_S3PowerReduction

WhitePaper_Rev0.7

2009/04/23 Intel CRB 1.55 Update Change R292 to 1.1K_1%, R302 to 3.01K_1%

Need to check Voltage Level

2009/8/14 change back to 2K

R440_0402_5%1 2

R34 10K_0402_5%

R34 1 2 10K_0402_5%

R360_0402_5%

R360_0402_5%1 2

R500_0402_5%

R500_0402_5%1 2

U2

NC7SZ08P5X_NL_SC70-5U2

NC7SZ08P5X_NL_SC70-5

B 2

A 1Y

R470_0402_5%1 2

R651K_0402_5%

R37 51_0402_5%

R37 1 2 51_0402_5%

R57750_0402_1%

R420_0402_5%1 2

R450_0402_5%

SM_DRAMRST# F6SM_RCOMP[0] AL1

BCLK# B16BCLK A16

BCLK_ITP# AT30BCLK_ITP AR30

PEG_CLK#PEG_CLK D16

E16

DPLL_REF_SSCLK# A17DPLL_REF_SSCLK A18CATERR#

PRDY# AT28PREQ# AP27TCK AN28TMS AP28TRST# AT27TDI AT29TDO AR27TDI_M AR29TDO_M AP29DBR# AN25BPM#[0] AJ22BPM#[1] AK22BPM#[2] AK24BPM#[3] AJ24BPM#[4] AJ25BPM#[5] AH22BPM#[6] AK23BPM#[7] AH23

R260_0402_5%1 2

R28 100K_0402_5%

R281 100K_0402_5%2

R681.1K_0402_1%

@

R681.1K_0402_1%

@

C650.1U_0402_16V4Z

@1

2

R19 20_0402_1%

R19 2 1 20_0402_1%

R713.01K_0402_1%

@

R713.01K_0402_1%

@

R621K_0402_1%

R561.5K_0402_1%1 2

R58 49.9_0402_1%

R58 2 1 49.9_0402_1%

R550_0402_5%

R550_0402_5%1 2

R691.5K_0402_1%

R612K_0402_1%

R72750_0402_1%

T24 PAD @T24 PAD @

R631K_0402_5%

R59 68_0402_5%

R59 2 1 68_0402_5%

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DDR_A_D59DDR_A_D57

DDR_A_D47DDR_A_D43DDR_A_D41

DDR_A_D45DDR_A_D39DDR_A_D35DDR_A_D33

DDR_A_D37

DDR_A_D61

DDR_A_D2DDR_A_D0

DDR_A_D53

DDR_A_D13

DDR_A_D29DDR_A_D23DDR_A_D19DDR_A_D17

DDR_A_D21

DDR_A_BS2DDR_A_BS0

DDR_A_MA5

DDR_A_MA7

DDR_A_MA9

DDR_A_MA12DDR_A_MA10

DDR_A_DM6DDR_A_DM4DDR_A_DM0

DDR_B_D56

DDR_B_D60

DDR_B_D62DDR_B_D58

DDR_B_D34

DDR_B_D40

DDR_B_D44

DDR_B_D46DDR_B_D42

DDR_B_D24

DDR_B_D28

DDR_B_D30DDR_B_D26

DDR_B_D2

DDR_B_D8

DDR_B_D12

DDR_B_D14DDR_B_D10

DDR_B_MA2

DDR_B_MA10DDR_B_MA8

DDR_B_MA15

DDR_B_DQS#5

DDR_B_DQS#7DDR_B_DQS#3DDR_B_DQS#1

DDR_B_DQS#6DDR_B_DQS#2

DDR_B_DQS7

DDR_B_DQS0

DDR_B_DQS5DDR_B_DQS3

DDR_B_DQS6DDR_B_DQS2

DDR_B_DM3DDR_B_DM0

SA_CK#[1] Y5SA_CKE[0] P7

SA_CKE[1] P6

SA_CS#[0] AE2SA_CS#[1] AE8

SA_ODT[0] AD8SA_ODT[1] AF9

SA_DM[0] B9SA_DM[1] D7SA_DM[2] H7SA_DM[3] M7SA_DM[4] AG6SA_DM[5] AM7SA_DM[6] AN10SA_DM[7] AN13

SA_DQS[0] C8SA_DQS#[0] C9

SA_DQS[1] F9SA_DQS#[1] F8

SA_DQS[2] H9SA_DQS#[2] J9

SA_DQS[3] M9SA_DQS#[3] N9

SA_DQS[4] AH8SA_DQS#[4] AH7

SA_DQS[5] AK10SA_DQS#[5] AK9

SA_DQS[6] AN11SA_DQS#[6] AP11

SA_DQS[7] AR13SA_DQS#[7] AT13

SA_MA[0] Y3SA_MA[1] W1SA_MA[2] AA8SA_MA[3] AA3SA_MA[4] V1SA_MA[5] AA9SA_MA[6] V8SA_MA[7] T1SA_MA[8] Y9SA_MA[9] U6SA_MA[10] AD4SA_MA[11] T2SA_MA[12] U3SA_MA[13] AG8SA_MA[14] T3SA_MA[15] V9

SB_CK#[1] V6SB_CKE[0] M3

SB_CKE[1] M2

SB_CS#[0] AB8SB_CS#[1] AD6

SB_ODT[0] AC7SB_ODT[1] AD1

SB_DM[0] D4SB_DM[1] E1SB_DM[2] H3SB_DM[3] K1SB_DM[4] AH1SB_DM[5] AL2SB_DM[6] AR4SB_DM[7] AT8

SB_DQS[4] AG2SB_DQS#[4] AH2

SB_DQS[5] AL5SB_DQS#[5] AL4

SB_DQS[6] AP5SB_DQS#[6] AR5

SB_DQS[7] AR7

SB_DQS#[7] AR8

SB_DQS[0] C5SB_DQS#[0] D5

SB_DQS[1] E3SB_DQS#[1] F4

SB_DQS[2] H4SB_DQS#[2] J4

SB_DQS[3] M5SB_DQS#[3] L4

SB_MA[0] U5SB_MA[1] V2SB_MA[2] T5SB_MA[3] V3SB_MA[4] R1SB_MA[5] T8SB_MA[6] R2SB_MA[7] R6SB_MA[8] R4SB_MA[9] R5SB_MA[10] AB5SB_MA[11] P3SB_MA[12] R3SB_MA[13] AF7SB_MA[14] P5SB_MA[15] N1

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Title

(Place these capacitors between inductor and socket on Bottom)

(Place these capacitors on CPU cavity, Bottom Layer)

TOP side (under inductor)

MLCC 0805 X5R

+CPU-CORE Decoupling

16X22uF

ESR, mohm SPCAP,Polymer

Stuffing Option 2X470uF

H_VTTVID1 = low, 1.1V H_VTTVID1 = high, 1.05V

48A Continuous 18A

(Place these capacitors under CPU socket, top layer)

CSC (Current Sense Configuration) 8/25

VTT Rail Auburndale +1.1VS_VTT=1.05V Clarksfield +1.1VS_VTT=1.1V

Peak 21A WW15 MOW

10U_0805_6.3V6M

1

2

+C105330U_D2E_2.5VM_R6M

1

2

T14PAD

@

T14PAD

@

C7910U_0805_6.3V6MC7910U_0805_6.3V6M

1

2

C8510U_0805_6.3V6M

1

2

C68

10U_0805_6.3V6MC68

10U_0805_6.3V6M

1

10U_0805_6.3V6MC74

10U_0805_6.3V6M

1

2

C7310U_0805_6.3V6MC7310U_0805_6.3V6M

1

2

C8710U_0805_6.3V6M

1

2

C7110U_0805_6.3V6M

1

10U_0805_6.3V6MC8110U_0805_6.3V6M

1

2

C103

22U_0805_6.3V6MC103

10U_0805_6.3V6M

1

2

C6910U_0805_6.3V6M

330U_D2E_2.5VM_R6M

@

+C106

330U_D2E_2.5VM_R6M

@1

2

R94 100_0402_1%

R941 2100_0402_1%

C8910U_0805_6.3V6M

330U_D2E_2.5VM_R6M

1

2

C6710U_0805_6.3V6M

1

2

C86

10U_0805_6.3V6MC86

10U_0805_6.3V6M

1

2

+C273

330U_D2E_2.5VM_R6M

+C273

VTT0_1 AH14VTT0_2 AH12VTT0_3 AH11VTT0_4 AH10VTT0_5 J14VTT0_6 J13VTT0_7 H14VTT0_8 H12VTT0_9 G14VTT0_10 G13VTT0_11 G12VTT0_12 G11VTT0_13 F14VTT0_14 F13VTT0_15 F12VTT0_16 F11VTT0_17 E14VTT0_18 E12VTT0_19 D14VTT0_20 D13VTT0_21 D12VTT0_22 D11VTT0_23 C14VTT0_24 C13VTT0_25 C12VTT0_26 C11VTT0_27 B14VTT0_28 B12VTT0_29 A14VTT0_30 A13VTT0_31 A12VTT0_32 A11

VSS_SENSE AJ35

VTT0_43 J16VTT0_44 J15

C66

10U_0805_6.3V6MC66

10U_0805_6.3V6M

1

2

C9422U_0805_6.3V6MC9422U_0805_6.3V6M

330U_D2E_2.5VM_R6M

+C272

1

2

C97

22U_0805_6.3V6MC97

22U_0805_6.3V6M

1

2

+C82

330U_D2E_2.5VM_R6M

+C82

330U_D2E_2.5VM_R6M

+C275

330U_D2E_2.5VM_R6M

1

2

C7510U_0805_6.3V6MC7510U_0805_6.3V6M

1

2

C98

22U_0805_6.3V6MC98

1

2

C9622U_0805_6.3V6MC9622U_0805_6.3V6M

1

2

C88

10U_0805_6.3V6MC88

10U_0805_6.3V6M

1

2www.rosefix.com

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+1.5V+1.5V_1

Title

1

2

C114

1U_0402_6.3V4ZC114

1U_0402_6.3V4Z

1

2

C1302.2U_0603_6.3V4Z

1

2

C129

1U_0402_6.3V4ZC129

22U_0805_6.3V6M

1

2

C1151U_0402_6.3V4Z

1

2

C670 0.1U_0402_16V4ZC6701 0.1U_0402_16V4Z2

C12722U_0805_6.3V6MC12722U_0805_6.3V6M

1

2

C118

1U_0402_6.3V4ZC118

22U_0805_6.3V6M

1

2

C671 0.1U_0402_16V4ZC6711 0.1U_0402_16V4Z2

C12222U_0805_6.3V6MC12222U_0805_6.3V6M

1

2

C12410U_0805_6.3V6MC12410U_0805_6.3V6M

1

2

C1171U_0402_6.3V4Z

VAXG_SENSE AR22VSSAXG_SENSE AT22VAXG1

VTT0_59 P10VTT0_60 N10VTT0_61 L10VTT0_62 K10

VCCPLL1 L26VCCPLL2 L27VCCPLL3 M26

VTT1_63 J22VTT1_64 J20VTT1_65 J18VTT1_66 H21VTT1_67 H20VTT1_68 H19

C1281U_0402_6.3V4ZC1281U_0402_6.3V4Z

1

2

C672 0.1U_0402_16V4ZC6721 0.1U_0402_16V4Z2

C12322U_0805_6.3V6MC12322U_0805_6.3V6M

1

2

C12522U_0805_6.3V6MC12522U_0805_6.3V6M

1

2

C11122U_0805_6.3V6M

1

2

R990_0805_5%

C11310U_0805_6.3V6M

2

C116

1U_0402_6.3V4ZC116

+ C121330U_D2E_2.5VM_R6M+ C121

4.7U_0805_10V4Z

1

2

+C107

330U_D2E_2.5VM_R6M

+C107

330U_D2E_2.5VM_R6M

1

2

C11922U_0805_6.3V6M

22U_0805_6.3V6M

1

2www.rosefix.com

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@

T2PAD

T5PAD

@

T5PAD

@

T3PAD

@

T3PAD

@

T4PAD

@

T4PAD

Trang 10

DDR_A_D40

DDR_A_MA9

DDR_A_DQS#4

DDR_A_D52DDR_A_DQS5

DDR_A_D54DDR_A_D49

DDR_A_D62DDR_A_D56

DDR_A_D53DDR_A_D47DDR_A_ODT1

DDR_A_D43DDR_A_D34

DDR_A_CLK1DDR_A_CLK1#

DDR_A_D48

D_CK_SDATA

DDR_A_D38

DDR_A_CLK0DDR_A_CLK0#

DDR_A_D32DDR_A_MA13

DDR_A_D35

DDR_A_MA12

DDR_A_DQS4

DDR_A_DM6DDR_A_D42

DDR_A_CKE1

PM_EXTTS#0_1

DDR_A_MA15DIMM_DRAMRST#

RST_GATE

DDR_VREF_CA_DIMMA

DDR_A_D5

DDR_A_D22DDR_A_D14DDR_A_DQS#0

DDR_A_D31

DDR_A_D12DDR_A_D6DDR_A_DQS0

DDR_A_DM2DDR_A_DM1

DDR_A_D28DDR_A_D4

DDR_A_D30DDR_A_DQS3

DDR_A_D23

DDR_A_DQS#3+DIMM_VREFDQA

DDR_A_D16

DDR_A_DM3

DDR_A_D9DDR_A_DQS#1

DDR_A_D24DDR_A_D18DDR_A_DQS#2DDR_A_D11

+0.75VS

+DIMM_VREFDQA+1.5V

+DIMM_VREFCA+1.5V

+1.5V+DIMM_VREFDQA

Title

DDRIII-SODIMM SLOT1

Custom

Thursday, January 21, 2010

Layout Note: Place these 4 Caps near Command and Control signals of DIMMA

Layout Note:

Place near JDIMM1.203 & JDIMM1.204

Layout Note:

Place near JDIMM1

DIMMA VREFDQ M1 Circuit

DIMMA & DIMMB VREFCA circuit

#425302CP_S3PowerReductionWhitePaper_Rev1.0

M1 Circuit

8mm High

C145

0.1U_0402_16V4ZC145

0.1U_0402_16V4Z

1

2

C14010U_0805_6.3V6M

1

2

R11010K_0402_5%

Q2BSS138LT1G_SOT23-3

13

C14210U_0805_6.3V6M

C1460.1U_0402_16V4Z

1

2

C1531U_0402_6.3V4Z

@

R1020_0402_5%

C1440.1U_0402_16V4Z

1

2

R1031K_0402_1%

1

2

C1352.2U_0603_6.3V4ZC1352.2U_0603_6.3V4Z

1

2

C1332.2U_0805_16V4ZC1332.2U_0805_16V4Z

1

2

C15410U_0805_6.3V6MC15410U_0805_6.3V6M

1

2

C1490.1U_0402_16V4ZC1490.1U_0402_16V4Z

1

2

JDIMM1

FOX_AS0A626-U8RN-7FJDIMM1

0.047U_0402_16V7K

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DDR_B_D12DDR_B_D6DDR_B_DQS0

DDR_B_DM2DDR_B_DM1

+DIMM_VREFDQBDDR_B_D0

DDR_B_D28DDR_B_DM0

DDR_B_D21

DDR_B_D24

DDR_B_D15

DDR_B_D23DDR_B_D18

DDR_B_DQS#2DDR_B_D11

DDR_B_MA13

DDR_B_DQS6

DDR_B_D35DDR_B_DQS4

DDR_B_D42

DDR_B_D59DDR_B_D57DDR_B_D51DDR_B_D33

DDR_B_D58

DDR_B_DM5

DDR_B_DQS#6

DDR_B_D40DDR_B_DQS#4

DDR_B_D49

DDR_B_DM7DDR_B_D56DDR_B_D43DDR_B_D34

DDR_B_D48DDR_B_D32

DDR_B_D50DDR_B_D41

DDR_B_MA11

DDR_B_MA2DDR_B_MA15

DDR_B_D62

DDR_B_D36

DDR_B_DM6DDR_B_D39

DDR_B_DQS7

DDR_B_D46DDR_B_DQS#5

DDR_B_DM4

DDR_B_D44

DDR_B_DQS#7

DDR_B_D52DDR_B_DQS5

DDR_B_D54DDR_B_D45

DDR_B_D61

D_CK_SCLKD_CK_SDATAPM_EXTTS#0_1DDR_VREF_CA_DIMMB

+DIMM_VREFDQB

+0.75VS+3VS

+DIMM_VREFCA

Title

2008/9/8 #400755Calpella Clarksfield DDR3 SO-DIMM VREFDQ Platform Design Guide Change Details

Layout Note:

Place near JDIMM2

Layout Note:

Place near JDIMM2.203 & JDIMM2.204

Layout Note: Place these 4 Caps near Command and Control signals of DIMMB

DIMMB VREFDQ M1 Circuit

M1 Circuit

4mm High

C1721U_0402_6.3V4Z

C1650.1U_0402_16V4Z

JDIMM2

FOX_AS0A626-U4RN-7FCONN@

R1141K_0402_1%

C174

10U_0805_6.3V6MC174

10U_0805_6.3V6M

1

2

C1580.1U_0402_16V4ZC1580.1U_0402_16V4Z

1

2

C156

0.1U_0402_16V4ZC156

0.1U_0402_16V4Z

1

2

C1752.2U_0603_6.3V4ZC1752.2U_0603_6.3V4Z

1

2

+ C169330U_2.5V_M_R15+ C169330U_2.5V_M_R15

1

2

C173

1U_0402_6.3V4ZC173

1U_0402_6.3V4Z

1

2

C1670.1U_0402_16V4Z

1

2

C16310U_0805_6.3V6M

1

2

C166

0.1U_0402_16V4ZC166

Trang 12

CLK_XTAL_OUTCLK_XTAL_INCK505_PW RGD

CLK_BUF_DREF_96MCLK_BUF_DREF_96M#

CLK_BUF_CPU_DMI#

CLK_BUF_CPU_DMI

CLK_BUF_PCIE_SATACLK_BUF_PCIE_SATA#

CLK_BUF_CPU_BCLKCLK_BUF_CPU_BCLK#

+CLK_1.5VS+CLK_1.05VS

Title

0 (Default) 133MHz 133MHz

100MHz 100MHz

Clock Generator

Silego Have Internal Pull-Up

IDT: 9LRS3199AKLFT, SA000030P00 SILEGO: SLG8SP587V(WF), SA00002XY10

IDT Have Internal Pull-Down

IDT SA00003HR00

Change to 5x3.2

IDT: 9LVS3199AKLFT, SA00003HR00 Realtek: RTM890N-631-GRT, SA00003HQ00 Low Power:

20090915 Add for 3G team

Y1 Change to SJ100009R0020091117

R12010K_0402_5%

C17810U_0805_10V4ZC17810U_0805_10V4Z

2

R118 33_0402_5%

R1181 2 33_0402_5%

R1254.7K_0402_5%

2

L1FBMA-L11-201209-221LMA30T_0805L1

FBMA-L11-201209-221LMA30T_08052 1

C1830.1U_0402_16V4Z

1

2

C3647P_0402_50V8J

@

C3647P_0402_50V8J

@1

2

C3047P_0402_50V8J

@

C3047P_0402_50V8J

@1

2

R1234.7K_0402_5%

C187

0.1U_0402_16V4ZC187

2

C190

27P_0402_50V8JC190

27P_0402_50V8J

12

C18510U_0805_10V4ZC18510U_0805_10V4Z

1

2

U3

SLG8SP587VTR_QFN32_5X5U3

27MHZ_SS

7

XTAL_IN 2827MHZ

6

USB_48

8

CPU_1 20VSS_CPU 21VDD_CPU_IO 18

0.1U_0402_16V4Z

1

2

L4FBMA-L11-201209-221LMA30T_0805L4

FBMA-L11-201209-221LMA30T_08052 1

C17710U_0805_10V4ZC17710U_0805_10V4Z

1

2

R1220_0402_5%

@

R1220_0402_5%

@

C3447P_0402_50V8J

@

C3447P_0402_50V8J

@1

2

C18610U_0805_10V4ZC18610U_0805_10V4Z

1

2

C179

0.1U_0402_16V4ZC179

0.1U_0402_16V4Z

1

2

C1880.1U_0402_16V4Z

Q42N7002_SOT23

L3FBMA-L11-201209-221LMA30T_0805

@

L3FBMA-L11-201209-221LMA30T_0805

@

12

Q62N7002_SOT23

C182

10U_0805_10V4ZC182

10U_0805_10V4Z

1

2

C19127P_0402_50V8JC19127P_0402_50V8J

12

GD

S Q52N7002_SOT23GD

S Q52N7002_SOT23

2

C18110U_0805_10V4ZC18110U_0805_10V4Z

1

2

C3247P_0402_50V8J

@

C3247P_0402_50V8J

@1

2

C1800.1U_0402_16V4Z

1

2

Y114.31818MHZ 20PF 7A14300003

L2FBMA-L11-201209-221LMA30T_0805L2

FBMA-L11-201209-221LMA30T_08052 1www.rosefix.com

Trang 13

SATA_PTX_DRX_N0SATA_DTX_C_PRX_P0

SATA_PTX_DRX_P0

SATA_PTX_DRX_N1SATA_PTX_DRX_P1SATA_DTX_C_PRX_P1

SPI_HOLD1#

PCH_SPI_CLK_1PCH_SPI_MOSI_1

PCH_GPIO33#

PCH_SPI_CLK_1PCH_JTAG_TCK

INTVRMEN - Integrated SUS 1.1V VRM Enable High - Enable Internal VRs

close to RAM door

SATA for ODD

SATA for HDD1 HDA for AUDIO

GPIO33 can not pull down (manufacturing environments)

RC Delay 18~25mS

Have internal PD

SPI ROM Footprint 200mil

2/10 SATA2, SATA3 not support on HM55

If GPIO33 pull down, ME will not working.

For factory update ME, pull down resistor pull

under door.

modify to 330K

X1 Change to mini type20091102

GPIO33 has a weak internal pull-up

NOTE: Asserting the GPIO33 low on the

rising edge of PWROK will also halt Intel

Management Engine after chipset bringup

and disable runtime Intel Management

Engine features This is a debug mode and

must not be asserted after manfacturing/

debug.

For 3G teamClose to U5 20090915

CRB 1.0 Change to 4.7K

2008 Intel MOW36/MOW50

MP mount R689, R690, R691, R692 and remove others

1 NEW70/90 NEW71/91

R156 3.3K_0402_5%

R1561 2 3.3K_0402_5%

R15010K_0402_5%

R14910K_0402_5%

@

R12710K_0603_5%

18P_0402_50V8J

12

LDRQ1# / GPIO23 F34

FWH4 / LFRAME# C34LDRQ0# A34RTCRST#

SQ72N7002_SOT23G

D

SQ72N7002_SOT23

R12810M_0402_5%

R140100K_0402_5%

R1291K_0402_5%

12

@

R13010K_0603_5%

Trang 14

PCIE_PTX_DRX_P2PCIE_DTX_C_PRX_N2

PCIE_PTX_DRX_N2

PCH_SMBDATAPCH_SMBCLKEC_LID_OUT#

PCH_GPIO60

PCH_GPIO74

XTAL25_INXTAL25_OUT

XCLK_RCOMP

EC_LID_OUT#

PCH_SMBCLKPCH_SMBDATA

PCH_GPIO73PCH_GPIO25

PCH_GPIO20

MINI1_CLKREQ#

PCH_GPIO26

PROJECT_ID0PROJECT_ID1

PCH_SML1DATPCH_SML1CLK

PCH_SML1CLK

PCH_SML1CLK EC_SMB_CK2

PCH_SML1DAT EC_SMB_DA2PEG_CLKREQ#

CLK_CPU_DP <5>

CLK_CPU_DP# <5>

+3VALW+3VS

+3VALW

+1.05VS

+3VS

+3VS+3VS+3VALW

Title

For Wireless LAN

For PCIE LAN

For Wireless LAN

For PCIE LAN

2 Level Shift1, Pull-Up to +3VS CLOCK GEN, DIMM1, DIMM2

3 Level Shift2, Pull-Up to +3VS LAN

4 Level Shift3, Pull-Up to +3VS CPU & PCH XDP

1 Connect Directly EXPRESS CARD, MINI1, MINI2

6/9 MOW23 Request add 25MHz crystal supporting Integrated Graphics

Project Port ID

2/10 PCIE7, PCIE8 not support on HM55

Change to 5x3.2

Pull high +3VS at KB926 side

2009/08/13: Change back to +3VALW

PROJECT

1 0

ID2 GPIO21

ID1 GPIO65 A & B

test

C test

HIGH LOW

Board ID

C20327P_0402_50V8JC20327P_0402_50V8J

R1701M_0402_5%

C555 10P_0402_50V8JC5551 210P_0402_50V8J

R15910K_0402_5%

SML0CLK C6SML0DATA G8

CLKIN_BCLK_N AP3CLKIN_BCLK_P AP1

CLKIN_DMI_N AW24CLKIN_DMI_P BA24

CLKIN_DOT_96N F18CLKIN_DOT_96P E18CLKIN_SATA_N / CKSSCD_N AH13CLKIN_SATA_P / CKSSCD_P AH12

XTAL25_IN AH51XTAL25_OUT AH53

REFCLK14IN P41CLKIN_PCILOOPBACK J42

CLKOUT_PEG_A_N AD43CLKOUT_PEG_A_P AD45PEG_A_CLKRQ# / GPIO47 H1

CLKOUT_DMI_N AN4CLKOUT_DMI_P AN2

PEG_B_CLKRQ# / GPIO56

P13

CLKOUT_PEG_B_P

AK51 CLKOUT_PEG_B_NAK53

SML1ALERT# / GPIO74 M14SML1CLK / GPIO58 E10SML1DATA / GPIO75 G12

3

4

C197 0.1U_0402_16V7KC197 2 1 0.1U_0402_16V7K

25MHZ_20PF_7A25000012

C200 0.1U_0402_16V7KC2002 1 0.1U_0402_16V7K

C198 0.1U_0402_16V7KC198 2 1 0.1U_0402_16V7K

C20427P_0402_50V8JC20427P_0402_50V8J

Trang 15

PCH_PCIE_W AKE#

VGATESYS_PW ROK

No used Integrated LAN, connecting LAN_RST# to GND

10/2 Intel suggestion change to 10K

R195 Change to 10K for WW3720090916

U6 change to SA00000OH00

32.768KHZ ouput for remove EC crystal 20091103

R19249.9_0402_1%

Q11MMBT3906_SOT23-3

@

T9PAD

@

T7PAD

@

T7PAD

@

T10PAD

@

T10PAD

@

D3A

BAV99DW -7_SOT363D3A

FDI_FSYNC0 BF13FDI_FSYNC1 BH13FDI_LSYNC0 BJ12FDI_LSYNC1 BG14FDI_INT BJ14

PMSYNCH BJ10TP23 N2SLP_M# K8SLP_S3# P12SLP_S4# H7SLP_S5# / GPIO63 E4

NC7SZ08P5X_NL_SC70-5

B 2

A 1Y

D2CH751H-40PT_SOD323-2

21

R203 @ 0_0402_5%

R203 2 @ 1 0_0402_5%

R20110K_0402_5%

Trang 16

CRT_IREF

PCH_CRT_RPCH_CRT_GPCH_CRT_B

PCH_LCD_CLKPCH_LCD_DATA

PCH_CRT_DATAPCH_CRT_CLK

PCH_CRT_B

PCH_CRT_RPCH_CRT_G

2/3 Change to 1K_0402_0.5% from Intel Suggestion (EDS 1.0 is incorrect)

SDVO_CTRLDATA strap Pull High at Level Shift Page

R2221K_0402_1%

R209100K_0402_5%

R2110_0402_5%1 2

R2102.37K_0402_1%1 2

DDPB_2N BB40DDPB_3N AW38

DDPC_0N BE40DDPC_1N BF41DDPC_2N BD38DDPC_3N BB36

DDPD_0N BJ40DDPD_1N BJ38

DDPB_0P BC42DDPB_1P BG42

DDPD_2P BH37DDPD_3P BD36

DDPB_2P BA40DDPB_3P BA38

DDPC_2P BC38DDPC_3P BA36

DDPD_0P BG40DDPD_1P BG38

DDPC_CTRLCLK Y49DDPC_CTRLDATA AB49

DDPD_CTRLCLK U50DDPD_CTRLDATA U52

SDVO_STALLP BG48SDVO_STALLN BJ48

SDVO_INTP BH45SDVO_INTN BF45

C2062 1HDMI@ 0.1U_0402_16V7K

www.rosefix.com

Trang 17

USB_OC#7_RUSB_OC#5_R

USB_OC#0_R

USB_OC#3_RUSB_OC#1_R

USB20_N9USB20_P9

Title

PCH (5/9) PCI, USB, VRAM

Custom

Thursday, January 21, 2010

A16 swap override Strap/Top-Block

PCI_GNT#3

Swap Override jumper

Low = A16 swap High = Default

Boot BIOS Strap

PCI_GNT#0 PCI_GNT#1 Boot BIOS Location

Reserved (NAND) PCI

OC[0 3] use for EHCI 1 OC[4 7] use for EHCI 2

2/10 USB6, USB7 not support on HM55

USB Port (Left Side) USB/B (Right Side)

*

override/Top-Block

Low=A16 swap

PCI_GNT3#

A16 swap overide Strap/Top-Block

Swap Override jumper

Swap Override enabled

High=Default

Set to Vcc when HIGH DMI Termination Voltage NV_CLE

Set to Vss when LOW

Intel Anti-Theft Techonlogy

DMI termination voltage.

weak internal PU, don't PD

R24922.6_0402_1%

NV_CLE AY6

NV_DQS0 AV9NV_DQS1 BG8NV_DQ0 / NV_IO0 AP7NV_DQ1 / NV_IO1 AP6

NV_DQ10 / NV_IO10 BD6NV_DQ11 / NV_IO11 BB7NV_DQ12 / NV_IO12 BC8NV_DQ13 / NV_IO13 BJ8NV_DQ14 / NV_IO14 BJ6NV_DQ15 / NV_IO15 BG6

NV_DQ2 / NV_IO2 AT6NV_DQ3 / NV_IO3 AT9NV_DQ4 / NV_IO4 BB1NV_DQ5 / NV_IO5 AV6NV_DQ6 / NV_IO6 BB3NV_DQ7 / NV_IO7 BA4NV_DQ8 / NV_IO8 BE4NV_DQ9 / NV_IO9 BB6

NV_RB# AV7NV_RCOMP AU2

NV_WR#0_RE# AY8NV_WR#1_RE# AY5NV_WE#_CK0 AV11NV_WE#_CK1 BF5USBP0N H18USBP0P J18

USBP10N A22USBP10P C22USBP11N G24USBP11P H24USBP12N L24USBP12P M24USBP13N A24USBP13P C24

USBP1N A18USBP1P C18USBP2N N20USBP2P P20USBP3N J20USBP3P L20USBP4N F20USBP4P G20USBP5N A20USBP5P C20USBP6N M22USBP7N B21USBP7P D21USBP8N H22USBP8P J22USBP9N E22USBP9P F22

USBRBIAS# B25USBRBIAS D25USBP6P N22

R226100K_0402_5%

Trang 18

DGPU_PW R_ENPCH_GPIO39PCH_GPIO22DGPU_HOLD_RST#

+1.05VS

+3VS+3VALW

Title

PCH (6/9) GPIO, CPU, MISC

Do not pull high)

(GPIO8 Should not be Pull-Low)

This signal has weak internal

PU, can't pull low INIT3_3V

On-Die PLL Voltage Regulator

This signal has a weak internal pull up

GPIO27

L：On-Die PLL Voltage Regulator disable

*

can't Pull low

This signal has a weak internal pull up

GPIO8

GPIO15

Layer Security(TLS) chiper suite

with no confidentiality

Layer Security(TLS) chiper suite

R29110K_0402_5%

@

T13PAD

THRMTRIP# BD10

GPIO8

F10

CLKOUT_PCIE6N AH45CLKOUT_PCIE6P AH46

PCIECLKRQ6# / GPIO45

H3

CLKOUT_PCIE7N AF48CLKOUT_PCIE7P AF47

PCIECLKRQ7# / GPIO46

F1

TP5 AY46TP4 AY45

TP6 AV43TP7 AV45

BMBUSY# / GPIO0

Y3

TP16 M30TP17 N30

NC_1 AB45NC_2 AB38NC_3 AB42NC_4 AB41

TP14 M32TP15 N32

SATA2GP / GPIO36

AB7

NC_5 T39INIT3_3V# P6

@

R288330_0402_5%

SQ132N7002_SOT23

@

GD

SQ132N7002_SOT23

@2

@

C

BEQ122SC2411KT146_SOT23-3

Trang 19

All Ibex Peak-M Power rails with netnames +1.1VS and

+1.1V rails are actually +1.05VS and +1.05V rails

Near AB34

Near AT16

Near AP43 Near AB24

CRB 0.9 is 180 ohm @ 100MHz DG0.8 is 600 ohm FB (Page 290)

DG 1.6 (Page 329) Have Internal VRM Intel suggest follow CRB 8/21

Near AN35

0.1uH inductor, 200mA

Follow Intel suggestion 8/21

Top Side

DG 1.6 (Page 329) Have Internal VRM

Change to 0_040220090914

Change to 0_0805_5%

20090923

Near AE50

For CRT Issue 20091105

220 ohm bead,350mA L5 Change to 220ohm bead

VCCTX_LVDS[1] AP43VCCTX_LVDS[2] AP45VCCALVDS AH38

VCCIO[1]

AM23

VCC3_3[2] AB34VCC3_3[3] AB35VCC3_3[4] AD35

VCC3_3[1]

AN35

VCCME3_3[1] AM8VCCME3_3[2] AM9VCCME3_3[3] AP11VCCME3_3[4] AP9

VCCPNAND[2] AK16

VCCPNAND[9] AM15VCCPNAND[1] AM16

VCCDMI[1] AT16VCCDMI[2] AU16

C2281U_0402_6.3V4ZC2281U_0402_6.3V4Z

1

2

C2271U_0402_6.3V4Z

1

2

C22310U_0805_10V4Z

0.1UH_MLF1608DR10KT_10%_160812

R299 0_0402_5%

R299 1 20_0402_5%

C2251U_0402_6.3V4Z

1

2

C2141U_0402_6.3V4Z

1

2

C224

1U_0402_6.3V4ZC224

1U_0402_6.3V4Z

1

2

C2160.1U_0402_16V4ZC2160.1U_0402_16V4Z

1

2

C2290.1U_0402_16V4ZC229

0.1U_0402_16V4Z

12

R296 @ 0_0805_5%

R2961@ 2 0_0805_5%

C22122U_0805_6.3V6MC22122U_0805_6.3V6M

1

2

T21 PAD @T21 PAD @

C21722U_0805_6.3V6MC21722U_0805_6.3V6M

1

2

C2190.01U_0402_16V7KC2190.01U_0402_16V7K

1

2

T20 PAD @T20 PAD @

C226

1U_0402_6.3V4ZC226

1U_0402_6.3V4Z

1

2

C2180.01U_0402_16V7KC2180.01U_0402_16V7K12

R293 0_0805_5%

R293 1 2 0_0805_5%

L5MBK1608221YZF_2PL5

MBK1608221YZF_2P

www.rosefix.com

Trang 20

+VCCSATAPLL+PCH_VCCIO

+1.05VS

+1.05VS+1.05VS

+1.05VS

+1.05VS+1.05VS

All Ibex Peak-M Power rails with netnames +1.1VS and

+1.1V rails are actually +1.05VS and +1.05V rails

Near A12

Near P18

Near AH23 Near AH35

Near AF23

Near L30 Near AB19

Near U23

Near BD51

Near BB51

163mA 1998mA

344mA 52mA

357mA

73mA 72mA

Follow Intel suggestion

10uH inductor, 120mA 10uH inductor, 120mA

2/12 Follow EDS1.11 Change to 100 ohm Change to 1U for power

sequence issue on ICH9

Near AD38 Near V39

2/12 Follow EDS1.11 Change to 100 ohm

DG 1.6 (Page 329) Have Internal VRM

Near AF32

09/09/21 WW37 remove +VCCADPLLA,+VCCADPLLB external 1U

R310 0_0603_5%

R310 1 2 0_0603_5%

C23622U_0805_6.3V6M

1

2

C2630.1U_0402_16V4ZC2630.1U_0402_16V4Z

1

2

+C244220U_6.3V_M_R17

C237

1U_0402_6.3V4ZC237

1U_0402_6.3V4Z

1

2

C2411U_0402_6.3V4Z

@

C2411U_0402_6.3V4Z

@1

2

C2490.1U_0402_16V4ZC2490.1U_0402_16V4Z

C2551U_0402_6.3V4ZC2551U_0402_6.3V4Z

1

2

C2401U_0402_6.3V4ZC2401U_0402_6.3V4Z

1

2

L1110UH_LB2012T100MR_20%

L1110UH_LB2012T100MR_20%1 2

C235

22U_0805_6.3V6MC235

VCCIO[13] AD19VCCIO[14] AF20VCCIO[15] AF19

VCCRTC

A12

VCCSUS3_3[27] A26VCCSUS3_3[26] A28VCCSUS3_3[25] B27VCCSUS3_3[24] C26VCCSUS3_3[23] C28VCCSUS3_3[22] E26VCCSUS3_3[21] E28VCCSUS3_3[20] F26VCCSUS3_3[19] F28VCCSUS3_3[18] G26VCCSUS3_3[17] G28VCCSUS3_3[16] H26VCCSUS3_3[15] H28VCCSUS3_3[14] J26VCCSUS3_3[13] J28VCCSUS3_3[12] L26VCCSUS3_3[11] L28VCCSUS3_3[10]VCCSUS3_3[9] M26

M28

VCCSUS3_3[8] N26VCCSUS3_3[7] N28VCCSUS3_3[6] P26VCCSUS3_3[5] P28VCCSUS3_3[4] U24VCCSUS3_3[3] U26VCCSUS3_3[2] U28VCCSUS3_3[1] V28

VCCIO[11] AD20

VCCIO[20] AD22VCCIO[10] AH19

VCC3_3[14] AD13

VCCIO[9] AH22VCCVRM[4] AT20

CH751H-40PT_SOD323-2

C2501U_0402_6.3V6KC2501U_0402_6.3V6K

12

R312 0_0603_5%

R312 1 2 0_0603_5%

C2670.1U_0402_16V4ZC2670.1U_0402_16V4Z

1

2

R306100_0402_5%

C2520.1U_0402_16V4ZC2520.1U_0402_16V4Z

12

C266

0.1U_0402_16V4ZC266

0.1U_0402_16V4Z

1

2

R305100_0402_5%

T23PAD

@

T23PAD

@

C2531U_0402_6.3V4ZC2531U_0402_6.3V4Z

1

2

C2451U_0402_6.3V4Z

@

C2451U_0402_6.3V4Z

2

C23822U_0805_6.3V6M

@

C23822U_0805_6.3V6M

2

C2391U_0402_6.3V4ZC2391U_0402_6.3V4Z

1

2

C2621U_0402_6.3V4ZC2621U_0402_6.3V4Z

1

2

C2600.1U_0402_16V4ZC2600.1U_0402_16V4Z

C2541U_0402_6.3V4ZC2541U_0402_6.3V4Z

12

C2420.1U_0402_16V4ZC2420.1U_0402_16V4Z

1

2

R3030_0603_5%

@

R3030_0603_5%

@

C2710.1U_0402_16V4ZC2710.1U_0402_16V4Z

1

2

L1010UH_LB2012T100MR_20%

L1010UH_LB2012T100MR_20%1 2

C268 1U_0402_6.3V4ZC2681 2 1U_0402_6.3V4Z

D5CH751H-40PT_SOD323-2D5

CH751H-40PT_SOD323-2

C2560.1U_0402_16V4ZC2560.1U_0402_16V4Z

T22 PAD @T22 PAD @

C2570.1U_0402_16V4ZC2570.1U_0402_16V4Z

C2481U_0402_6.3V4Z

@

C2481U_0402_6.3V4Z

2

C2460.1U_0402_16V4ZC2460.1U_0402_16V4Z

1

2

C2691U_0402_6.3V4ZC2691U_0402_6.3V4Z

1

2

C2654.7U_0805_10V4ZC2654.7U_0805_10V4Z

1

2

+C247220U_6.3V_M_R17

C2610.1U_0402_16V4ZC2610.1U_0402_16V4Z

1

2

R3020_0402_5%

@

R3040_0402_5%

@

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Trang 21

PCH_JTAG_TDO_R

XDP_FN13XDP_FN11XDP_FN8

XDP_FN14XDP_FN4

PCH_JTAG_TDI_RXDP_FN0

XDP_FN11XDP_FN0

PCH_JTAG_TMS_R

PCH_JTAG_RST#_R

XDP_FN8

PCH_JTAG_TCK_RXDP_FN9

PCH_JTAG_TDO_RXDP_FN10

PCH_JTAG_TDI_R

SMB_CLK_S3SMB_DATA_S3

XDP_FN4

XDP_FN2

XDP_FN14XDP_FN12

VSS[101] BA42

VSS[95] AD24VSS[94] BB44

3

4

R3334.7K_0402_5%

VSS[345] P24VSS[287] AD15

VSS[262] K11VSS[263] K43

VSS[259] H49VSS[260] H5VSS[261] J24

R313 @ 33_0402_5%

R3131@ 2 33_0402_5%

R3324.7K_0402_5%

R327 0_0402_5%

R3271 2 0_0402_5%

R3311K_0402_5%

12

R320 @ 33_0402_5%

R3201@ 2 33_0402_5%

Q15A2N7002DW -T/R7_SOT363-6Q15A2N7002DW -T/R7_SOT363-6

Trang 22

PCH_TXOUT0-PCH_TXOUT1+

PCH_TXOUT2+

PCH_TXOUT2-INVTPWMPCH_LCD_CLKPCH_LCD_DATA

PCH_LCD_CLKPCH_LCD_DATA

Title

LED PANEL Conn.

LCD POWER CIRCUIT

W=60mils W=60mils

Add R96 for SA00000U500 part20091216

R725100K_0402_5%

C6190.047U_0402_16V7KC6190.047U_0402_16V7K

FBMA-L11-201209-221LMA30T_08052 1

C6210.1U_0402_16V4ZC6210.1U_0402_16V4Z

1

2

C6260.1U_0402_16V4ZC6260.1U_0402_16V4Z

1

2

R729100K_0402_5%

C625 220P_0402_50V7KC6251 2 220P_0402_50V7K

R732 10K_0402_5%

R7321 210K_0402_5%

C624 220P_0402_50V7KC6241 2 220P_0402_50V7K

R7261K_0402_5%

12

U8NC7SZ14P5X_NL_SC70-5

G

D

S

Q17AO3413_SOT23-3

1

2

L12FBMA-L11-201209-221LMA30T_0805L12

FBMA-L11-201209-221LMA30T_08052 1

R72710K_0402_5%

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Change to 15pf for Discrete

Change to 12pf for Discrete

pull-up 2k on GPU SIDE pull-up 2.2k on PCH side

D6 change to SCS00002000

D7 / D8 / D9 change to SC6BAV99390

C51110P_0402_50V8JC51110P_0402_50V8J

1

2

L28 FBMA-L11-160808-800LMT_0603L281 FBMA-L11-160808-800LMT_06032C506

10P_0402_50V8JC506

10P_0402_50V8J

1

2

C51710P_0402_50V8JC51710P_0402_50V8J

1

2

D9DAN217_SC59D9DAN217_SC59

2 3

L27 FBMA-L11-160808-800LMT_0603L271 FBMA-L11-160808-800LMT_06032

C505

10P_0402_50V8JC505

10P_0402_50V8J

1

2

2 3

C51310P_0402_50V8JC51310P_0402_50V8J

1

2

Q19A2N7002DW-T/R7_SOT363-6Q19A

2N7002DW-T/R7_SOT363-6

61

2 3

L33 MBC1608121YZF_0603L33 MBC1608121YZF_0603

C51610P_0402_50V8JC51610P_0402_50V8J

1

2

C508

22P_0402_50V8JC508

22P_0402_50V8J

1

2

C51968P_0402_50V8JC51968P_0402_50V8J

1

2

C51210P_0402_50V8JC51210P_0402_50V8J

1

2

GJCRT1

C-H_13-12201513CP

CONN@

GJCRT1

C-H_13-12201513CP

CONN@

6111

122133

14410

516

C520 0.1U_0402_16V4ZC5201 2 0.1U_0402_16V4Z

C5010.1U_0402_16V4ZC5010.1U_0402_16V4Z

R7432.2K_0402_5%R7432.2K_0402_5%

Q19B2N7002DW-T/R7_SOT363-6Q19B

@

R477100K_0402_5%

22P_0402_50V8J

1

2

C515 0.1U_0402_16V4ZC5151 20.1U_0402_16V4Z

U23

74AHCT1G125GW_SOT353-5U23

C507

10P_0402_50V8JC507

10P_0402_50V8J

1

2

R474150_0402_1%

D6RB491D_SC59-3D6RB491D_SC59-3

R473150_0402_1%

C514100P_0402_50V8JC514100P_0402_50V8J

1

2

F21.1A_6VDC_FUSEF21.1A_6VDC_FUSE

21

U22

74AHCT1G125GW_SOT353-5U22

R7422.2K_0402_5%

C51868P_0402_50V8JC51868P_0402_50V8J

1

2

C509

22P_0402_50V8JC509

22P_0402_50V8J

1

2

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Trang 24

HDMI_TX1-

HDMI_R_D1-HDMI_TX2-

HDMI_HPDOE#

LS_HDMI_DET

HDMI_TX1+

HDMI_TX1-HDMI_TX2+

HDMI_TX2-HDMI_CLK+

HDMI_CLK-HDMI_TX0+

HDMI_HPDOE#

HDMI_R_CK+

HDMI_HPD

HDMI_R_D0+

+3VS

+3VS+3VS

+3VS

+3VS+3VS

HDMI Level Shife & Conn

default is ASM1442 p/n: SA00003GT00

NAL00 HDMI connector

HDMI Conn

Change to DC23200090020090917

1 1

0 0 1 0 1

Equalization EQ0 EQ1

3dB 6dB 12dB 0

(default)

0 0

0 0 0

0 2db 2db -3db 0

0 0

-4db -3db 0 1

0

1

Swing 0

0

420 0

CG2

0

400 340 1

For HDMI SW Issue

R7660_0402_5%

HDMI@

R7660_0402_5%

R759 HDMI@ 3.4K_0402_1%

R7591HDMI@23.4K_0402_1%

C6460.1U_0402_16V4Z

HDMI@

C6460.1U_0402_16V4Z

HDMI@

1

2

GD

S

Q202N7002_SOT23

HDMI@

GD

S

Q202N7002_SOT23

HDMI@

C6470.1U_0402_16V4Z

HDMI@

R746100K_0402_5%

HDMI@

C6490.1U_0402_16V4Z

HDMI@

C6490.1U_0402_16V4Z

@

R7642.2K_0402_5%

HDMI@

C6510.1U_0402_16V4Z

HDMI@ 12

@

R76920K_0402_5%

HDMI@

C6520.1U_0402_16V4Z

4

ASM1442T_QFN48_7X7U11

HDMI@

ASM1442T_QFN48_7X7U11

OE# 25SCL_SINK 28SDA_SINK 29HPD_SINK 30DDC_EN 32

GND 49

GD

SQ21

GND 20GND 21GND 22GND 23

HDMI@

R74510K_0402_5%

4www.rosefix.com

Tiêu đề	New70 M/B LA-5892P Schematic
Trường học	Compal Electronics, Inc.
Chuyên ngành	Engineering
Thể loại	schematic document
Năm xuất bản	2010
Thành phố	Taipei

Định dạng
Số trang	49
Dung lượng	1,27 MB