Acer timeline ultra m5 581TG compal la 8203p r1 0 schematics

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.THIS SHEET OF ENGINEERING DRAWIN

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THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC

Compal Electronics, Inc.

Intel Ivy Bridge ULV Processor + Panther Point PCH Q5LJ1 M/B Schematics Document

REV:1.0

Compal Confidential

2012-05-08 Nvidia N13P-GS

Model Name : Q5LJ1(MA51-HX)

File Name : LA-8203P

Compal Confidential

BOM P/N:43

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Int Speaker Combo Jack 989pin BGA

page 36

EC ROM x1 (KB930)

page 33

USB port 12

USB port 9

USB 2.0 conn x1

page 36

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+VSB +VSBP to +VSB always on power rail for sequence control ON ON OFF

+1.5V to +1.5VS switched power rail

Adapter power supply (19V)

AC or battery power rail for power circuit.

Core voltage for CPU

+1.05VS_VTTP to +1.05VS_VTT switched power rail for CPU

OFF

OFF OFF

ON** OFF OFF

+5VALWP to +5VALW power rail

+5VALW to +5VALW_PCH power rail for PCH

ChannelA DIMM0 A0 1010 000X JDIMM1(SPD)

On Board Thermal Senser 1001_101xb

1.453 V 1.650 V 1.759 V 1.935 V

2.500 V

2.200 V 3.300 V

2.341 V 1.185 V 1.264 V

STATE SIGNAL Full ON

S1(Power On Suspend) S3 (Suspend to RAM) S4 (Suspend to Disk) S5 (Soft OFF)

SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock

ON ON ON ON

ON ON

ON ON ON ON

ON

OFF OFF OFF

OFF OFF OFF OFF OFF

LOW

LOW LOW LOW LOW

LOW LOW LOW LOW LOW LOW

HIGH HIGH HIGH HIGH

HIGH HIGH HIGH HIGH HIGH HIGH

USB Port(Right 2.0),USB Charger USB Port(Mid 2.0)

USB 2.0 Port 3 External USB Port

Camera

0 1 2 3 4 5 6 7 8 9 10 11 12 13

EHCI1

EHCI2

USB Port Table

BOARD ID Table Board ID 0 1 2 3 4 5 6 7

PCB Revision

0.1 0.2 1.0

Mini Card(MSATA) USB port(Left 2.0)

XHCI

1 2 3 4

Port USB 3.0

USB Port(Right 3.0) USB Port(Mid 3.0)

1 2 3

0 8.2K +/- 5%

0 V 0.216 V 0.250 V 0.289 V 0.436 V

0.712 V

0.503 V 0.819 V

0.538 V 0.875 V

AD_BID V AD_BID typ V AD_BID max

RAM BOM Config

VRAM BOM Config

HR

X76364BOL03: 1G HYN 64*32 2G SA00004GD30(S IC D5 64M32/2.5G H5GQ2H24MFR-T2C ABO!)

GPU BOM Config + GPIO

GDDR5

1.4G SA000051H60 (S IC AV8062701047904 SR0CV J1 1.4G ABO!)

CPU BOM Config

ELPDIA 2GB 1333 SA000059110(S IC D3 256M16 EDJ4216EBBG-DJ-F ABO!)

N13P-GS-A2 R3 SA0000518A0 (S IC N13P-GS-A2 FCBGA 908P GPU ABO !)

HYNIX 2GB 1333 SA00005FV10(S IC D3 256MX16/1333 H5TC4G63MFR-H9A FBGA 96P ABO !)

P.56

P.18

for X76364BOL11: for X76364BOL12:

BTO Option Table

+3VS

+3VALW +3VALW always on power rail

OFF ON

+3VALW_PCH +3VALW to +3VALW_PCH power rail for PCH ON ON

+3VALW to +3VS power rail

ON** OFF OFF +VGA_CORE Core voltage for GPU

+1.5VSDGPU +1.5V to +1.5VSDGPU switched power rail for GPU

Note : ON** Depend on Optimus ON/OFF.

OFF ON

OFF

ON

OFF

OFF N/A

ON

OFF OFF ON OFF

OFF ON OFF

OFF ON

OFF OFF OFF

OFF OFF OFF OFF

OFF OFF ON

OFF ON

OFF

ON

OFF

OFF ON

OFF

OFF OFF DS4 DS5

OFF ON

OFF

ON

OFF

OFF ON

WLAN MODULE POWER RAIL

LAN CHIP POWER RAIL

+USB3_VCCA USB SLEEP CHARGER & PORT0 POWER POWER RAIL ON* ON ON ON ON* ON* ON*

OFF

GDDR5 HYNIX MFR HYNMFR@ X76364BOL03 P.27

SA00004GD50(S IC D5 64M32/2.5G H5GQ2H24AFR-T2C ABO!)

2G 64*32 GDDR5

I33217@

I53317@

Note : OFF* Depend on IOAC SPEC support or not.

P.56 P.56 P.56

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PEG_GTX_HRX_P2PEG_GTX_C_HRX_P2

DMI_CRX_PTX_P015

DMI_CTX_PRX_N115

DMI_CRX_PTX_N115

DMI_CTX_PRX_P315

DMI_CRX_PTX_P315

DMI_CTX_PRX_P215

DMI_CTX_PRX_N015

DMI_CRX_PTX_N315

DMI_CRX_PTX_P215

DMI_CTX_PRX_N315

DMI_CTX_PRX_P115

DMI_CRX_PTX_N015

DMI_CRX_PTX_N215

DMI_CRX_PTX_P115

DMI_CTX_PRX_N215

FDI_CTX_PRX_N015

FDI_CTX_PRX_N115

FDI_CTX_PRX_N215

FDI_CTX_PRX_N315

FDI_CTX_PRX_N415

FDI_CTX_PRX_N515

FDI_CTX_PRX_N615

FDI_CTX_PRX_N715

FDI_CTX_PRX_P015

FDI_CTX_PRX_P115

FDI_CTX_PRX_P215

FDI_CTX_PRX_P315

FDI_CTX_PRX_P415

FDI_CTX_PRX_P515

FDI_CTX_PRX_P615

FDI_CTX_PRX_P715

FDI_FSYNC015FDI_FSYNC115FDI_INT15FDI_LSYNC015FDI_LSYNC115

PEG_GTX_HRX_N[0 15] 22

PEG_HTX_C_GRX_P[0 15] 22PEG_HTX_C_GRX_N[0 15] 22PEG_GTX_HRX_P[0 15] 22

EDP_HPD#

29

EDP_TXN029

EDP_AUXN29

EDP_AUXP29

EDP_TXP029

PEG_ICOMPI and RCOMPO signals should be shorted and routed

with - max length = 500 mils - typical impedance = 43 mohms

PEG_ICOMPO signals should be routed with max length = 500 mils

typical impedance = 14.5 mohms

Typ- suggest 220nF The change in AC capacitor value from 100nF to 220nF is to enable compatibility with future platforms having PCIE Gen3 (8GT/s)

eDP_COMPIO and ICOMPO signals

should be shorted near balls and

routed with typical impedance

<25 mohms

can't be left floating

,even if disable eDP function

Add eDP circuit

W=12mil L=500mil S=15mil

C594 DIS@0.22U_0402_6.3V6KC5941 2 DIS@0.22U_0402_6.3V6K

C263 DIS@0.22U_0402_6.3V6KC2631 2 DIS@0.22U_0402_6.3V6K

C246 DIS@0.22U_0402_6.3V6KC2461 2 DIS@0.22U_0402_6.3V6K

C568 DIS@0.22U_0402_6.3V6KC5681 2 DIS@0.22U_0402_6.3V6K

C277 DIS@0.22U_0402_6.3V6KC2771 2 DIS@0.22U_0402_6.3V6K

C271 DIS@0.22U_0402_6.3V6KC2711 2 DIS@0.22U_0402_6.3V6K

R24724.9_0402_1%

C576 DIS@0.22U_0402_6.3V6KC5761 2 DIS@0.22U_0402_6.3V6K

C588 DIS@0.22U_0402_6.3V6KC5881 2 DIS@0.22U_0402_6.3V6K

C265 DIS@0.22U_0402_6.3V6KC2651 2 DIS@0.22U_0402_6.3V6K

C590 DIS@0.22U_0402_6.3V6KC5901 2 DIS@0.22U_0402_6.3V6K

C247 DIS@0.22U_0402_6.3V6KC2471 2 DIS@0.22U_0402_6.3V6K

C262 DIS@0.22U_0402_6.3V6KC2621 2 DIS@0.22U_0402_6.3V6K

P6DMI_RX#[2]

P1DMI_RX#[3]

P10DMI_RX[0]

N3DMI_RX[1]

P7DMI_RX[2]

P3DMI_RX[3]

P11DMI_TX#[0]

K1DMI_TX#[1]

M8DMI_TX#[2]

N4DMI_TX#[3]

R2DMI_TX[0]

K3DMI_TX[1]

M7DMI_TX[3]

P4

FDI0_TX#[0]

U7FDI0_TX#[1]

W11FDI0_TX#[2]

W1FDI0_TX#[3]

AA6FDI1_TX#[0]

W6FDI1_TX#[1]

V4FDI1_TX#[2]

Y2FDI1_TX#[3]

AC9

FDI0_TX[0]

U6FDI0_TX[1]

W10FDI0_TX[2]

W3FDI0_TX[3]

AA7FDI1_TX[0]

W7FDI1_TX[1]

T4FDI1_TX[2]

AA3FDI1_TX[3]

AC8FDI0_FSYNCAA11FDI1_FSYNCAC12

FDI_INTU11FDI0_LSYNCAA10FDI1_LSYNCAG8

AA4eDP_TX[2]

AE10eDP_TX[3]

AE6

eDP_COMPIOAF3

AC4eDP_TX#[2]

AE11eDP_TX#[3]

AE7

C571 DIS@0.22U_0402_6.3V6KC5711 2 DIS@0.22U_0402_6.3V6K

C584 DIS@0.22U_0402_6.3V6KC5841 2 DIS@0.22U_0402_6.3V6K

C589 DIS@0.22U_0402_6.3V6KC5891 2 DIS@0.22U_0402_6.3V6KC591 DIS@0.22U_0402_6.3V6KC5911 2 DIS@0.22U_0402_6.3V6K

C574 DIS@0.22U_0402_6.3V6KC5741 2 DIS@0.22U_0402_6.3V6K

C255 DIS@0.22U_0402_6.3V6KC2551 2 DIS@0.22U_0402_6.3V6K

R24924.9_0402_1%

C249 DIS@0.22U_0402_6.3V6KC2491 2 DIS@0.22U_0402_6.3V6K

C563 DIS@0.22U_0402_6.3V6KC5631 2 DIS@0.22U_0402_6.3V6K

C266 DIS@0.22U_0402_6.3V6KC2661 2 DIS@0.22U_0402_6.3V6K

C259 DIS@0.22U_0402_6.3V6KC2591 2 DIS@0.22U_0402_6.3V6K

C268 DIS@0.22U_0402_6.3V6KC2681 2 DIS@0.22U_0402_6.3V6K

C585 DIS@0.22U_0402_6.3V6KC5851 2 DIS@0.22U_0402_6.3V6K

C569 DIS@0.22U_0402_6.3V6KC5691 2 DIS@0.22U_0402_6.3V6K

C245 DIS@0.22U_0402_6.3V6KC2451 2 DIS@0.22U_0402_6.3V6K

C596 DIS@0.22U_0402_6.3V6KC5961 2 DIS@0.22U_0402_6.3V6K

C267 DIS@0.22U_0402_6.3V6KC2671 2 DIS@0.22U_0402_6.3V6K

C269 DIS@0.22U_0402_6.3V6KC2691 2 DIS@0.22U_0402_6.3V6K

C566 DIS@0.22U_0402_6.3V6KC5661 2 DIS@0.22U_0402_6.3V6K

C593 DIS@0.22U_0402_6.3V6KC5931 2 DIS@0.22U_0402_6.3V6K

C276 DIS@0.22U_0402_6.3V6KC2761 2 DIS@0.22U_0402_6.3V6K

C583 DIS@0.22U_0402_6.3V6KC5831 2 DIS@0.22U_0402_6.3V6K

C567 DIS@0.22U_0402_6.3V6KC5671 2 DIS@0.22U_0402_6.3V6K

C244 DIS@0.22U_0402_6.3V6KC2441 2 DIS@0.22U_0402_6.3V6K

C273 DIS@0.22U_0402_6.3V6KC2731 2 DIS@0.22U_0402_6.3V6K

C586 DIS@0.22U_0402_6.3V6KC5861 2 DIS@0.22U_0402_6.3V6K

C250 DIS@0.22U_0402_6.3V6KC2501 2 DIS@0.22U_0402_6.3V6K

C573 DIS@0.22U_0402_6.3V6KC5731 2 DIS@0.22U_0402_6.3V6K

C270 DIS@0.22U_0402_6.3V6KC2701 2 DIS@0.22U_0402_6.3V6K

C256 DIS@0.22U_0402_6.3V6KC2561 2 DIS@0.22U_0402_6.3V6K

C562 DIS@0.22U_0402_6.3V6KC5621 2 DIS@0.22U_0402_6.3V6K

C565 DIS@0.22U_0402_6.3V6KC5651 2 DIS@0.22U_0402_6.3V6K

C264 DIS@0.22U_0402_6.3V6KC2641 2 DIS@0.22U_0402_6.3V6K

C587 DIS@0.22U_0402_6.3V6KC5871 2 DIS@0.22U_0402_6.3V6K

C561 DIS@0.22U_0402_6.3V6KC5611 2 DIS@0.22U_0402_6.3V6K

C254 DIS@0.22U_0402_6.3V6KC2541 2 DIS@0.22U_0402_6.3V6K

C575 DIS@0.22U_0402_6.3V6KC5751 2 DIS@0.22U_0402_6.3V6K

C275 DIS@0.22U_0402_6.3V6KC2751 2 DIS@0.22U_0402_6.3V6K

R2501K_0402_5%

C253 DIS@0.22U_0402_6.3V6KC2531 2 DIS@0.22U_0402_6.3V6K

C597 DIS@0.22U_0402_6.3V6KC5971 2 DIS@0.22U_0402_6.3V6K

C251 DIS@0.22U_0402_6.3V6KC2511 2 DIS@0.22U_0402_6.3V6K

C258 DIS@0.22U_0402_6.3V6KC2581 2 DIS@0.22U_0402_6.3V6K

C248 DIS@0.22U_0402_6.3V6KC2481 2 DIS@0.22U_0402_6.3V6K

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CLK_CPU_DPLL# 14CLK_CPU_DPLL 14

H_CPUPWRGD18

SM_DRAMRST# 6H_PECI

Buffered reset to CPU

Follow DG 1.5 & Tacoma_Fall2 1.0 Use open drain logic gate:

+1.05VS_VTT PH pop 75ohm series resister pop 43ohm

UNCOREPWRGOOD:非CORE外的電OK

SM_DRAMPWROK:DRAM power ok

RESET#:都ok後請CPU做reset

DDR3 Compensation Signals

Use open drain logic gate:

+1.5V_CPU_VDDQ PH pop 200ohm series resister pop 130ohm

follow Checklist 1.5

Follow DG 1.5 & Tacoma_Fall2 1.0

SM_DRAMPWROK:DRAM power ok UNCOREPWRGOOD:非CORE外的電OK

Follow DG 1.5& Tacoma_Fall2 1.0

SM_RCOMP0,SM_RCOMP1 W=20mil L=500mil S=13mil SM_RCOMP2

W=15mil L=500mil S=13mil

Checklist1.5 P.67 Graphis Disable Guide DIS only SKU eDP disable

DPLL_REF_SSCLK PD 1K_5% to GND DPLL_REF_SSCLK# PH 1K_5% to +1.05VS_VTT

0921 LVDS@->@

Tacoma_Fall2 1.0 PH 1K +3VS Check list 1.5 PH 1K +3VS Debug port DG1.1-1.3 50~5K ohm

R312 1K_0402_5%

R3122 11K_0402_5%

T35PAD

@ PADT35

@C617

0.1U_0402_16V4ZC6170.1U_0402_16V4Z1

2

R273 25.5_0402_1%

R273 2 1 25.5_0402_1%

R53356_0402_5%

R5500_0402_5%

@R5500_0402_5%

R54443_0402_1%

PROC_DETECT#

C57PROC_SELECT#

F49

UNCOREPWRGOODB46

C2280.1U_0402_16V4Z

1

2

T21PAD

T34PAD

R238200_0402_5%

SN74LVC1G07DCKR_SC70-5

NC1A2

MC74VHC1G09DFT2G_SC70-5U18

MC74VHC1G09DFT2G_SC70-5

B1A

@ PADT20

@T19PAD

@ PADT19

@

R54675_0402_5%

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DDR_A_D59DDR_A_D57

DDR_A_D47DDR_A_D42

DDR_A_D61

DDR_A_D2DDR_A_D0

DDR_A_D55DDR_A_D51DDR_A_D48DDR_A_D50DDR_A_D52

DDR_A_D31

DDR_A_D14

DDR_A_D25DDR_A_D27

DDR_A_D30

DDR_A_D9

DDR_A_D13DDR_A_D10

DDR_A_D29

DDR_A_D19DDR_A_D16

DDR_A_D21DDR_A_D17

DDR_A_D22DDR_A_D18

DDR_A_D23

DDR_A_MA15DDR_A_MA0

DDR_A_MA14

DDR_A_MA5

DDR_A_MA1DDR_A_MA3

DDR_A_MA9DDR_A_MA7

DDR_A_MA12DDR_A_MA8

DDR_A_MA11

DDR_B_D33DDR_B_D14

DDR_B_D29DDR_B_D24

DDR_B_D34

DDR_B_D4

DDR_B_D26

DDR_B_D13DDR_B_D10

DDR_B_D21DDR_B_D11

DDR_B_D57DDR_B_D44

DDR_B_D37

DDR_B_D48DDR_B_D36

DDR_B_D18DDR_B_D8

DDR_B_D47DDR_B_D9

DDR_B_D60DDR_B_D50

DDR_B_D62DDR_B_D52DDR_B_D2

DDR_B_D51

DDR_B_D56DDR_B_D39

DDR_B_D22

DDR_B_D28DDR_B_D6

DDR_B_D45DDR_B_D17

DDR_B_MA15

DDR_B_MA0

DDR_B_MA9DDR_B_MA7

DDR_B_MA13

DDR_B_MA2DDR_B_MA4

DDR_B_MA11

DDR_B_MA3DDR_B_MA5

DDR_B_MA10DDR_B_MA8DDR_B_MA1

DDR_B_MA12DDR_B_MA14

DIMM_DRAMRST#_RSM_DRAMRST#

DDR_A_DQS#7

DDR_A_DQS#0DDR_A_DQS#2

DDR_A_DQS#5DDR_A_DQS#3DDR_A_DQS#1

DDR_A_DQS#4DDR_A_DQS#6

DDR_A_DQS0DDR_A_DQS2

DDR_A_DQS6DDR_A_DQS4

DDR_A_DQS7

DDR_B_DQS7

DDR_B_DQS0

DDR_B_DQS5DDR_B_DQS3

DDR_B_DQS6

DDR_B_DQS#1

DDR_B_DQS#7DDR_B_DQS#5

DDR_B_DQS#0DDR_B_DQS#3DDR_B_DQS#6DDR_B_DQS#2

RST_GATE_R

DDR_A_D[0 63]

11

DDR_A_BS011DDR_A_BS111DDR_A_BS211

DDR_A_WE#

11DDR_A_RAS#

11DDR_A_CAS#

11

DDR_B_BS012DDR_B_BS112DDR_B_BS212

DDR_B_D[0 63]

12

DDR_B_WE#

12DDR_B_RAS#

12DDR_B_CAS#

12

DIMM_DRAMRST# 11,12SM_DRAMRST#

SA_CLK_DDR1 11DDRA_CKE1_DIMMA 11SA_CLK_DDR#1 11

DDRA_CS1_DIMMA# 11

SA_ODT1 11

SA_CLK_DDR0 11SA_CLK_DDR#0 11DDRA_CKE0_DIMMA 11

+1.5V

Title

S3 DRAMRST_CNTRL_PCH Low ,MOS OFF SM_DRAMRST# lo,DDR3 DRAMRST# HIGH Dimm not reset

S4,5 DRAMRST_CNTRL_PCH Low ,MOS OFF SM_DRAMRST# lo,DDR3 DRAMRST# low Dimm reset

Follow CRB1.0

Address 0~13:For 128*16 Address 0~14:For 256*16 Address 0~15:For 512*16R212

1K_0402_5%

R2121K_0402_5%

AL1SB_DQ[2]

AN3SB_DQ[3]

AR4SB_DQ[4]

AK4SB_DQ[5]

AK3SB_DQ[6]

AN4SB_DQ[7]

AR1SB_DQ[8]

AU4SB_DQ[9]

AT2SB_DQ[10]

AV4SB_DQ[11]

BA4SB_DQ[12]

AU3SB_DQ[13]

AR3SB_DQ[14]

AY2SB_DQ[15]

BA3SB_DQ[16]

BE9SB_DQ[17]

BD9SB_DQ[18]

BD13SB_DQ[19]

BF12SB_DQ[20]

BF8SB_DQ[21]

BD10SB_DQ[22]

BD14SB_DQ[23]

BE13SB_DQ[24]

BF16SB_DQ[25]

BE17SB_DQ[26]

BE18SB_DQ[27]

BE21SB_DQ[28]

BE14SB_DQ[29]

BG14SB_DQ[30]

BG18SB_DQ[31]

BF19SB_DQ[32]

BD50SB_DQ[33]

BF48SB_DQ[34]

BD53SB_DQ[35]

BF52SB_DQ[36]

BD49SB_DQ[37]

BE49SB_DQ[38]

BD54SB_DQ[39]

BE53SB_DQ[40]

BF56SB_DQ[41]

BE57SB_DQ[42]

BC59SB_DQ[43]

AY60SB_DQ[44]

BE54SB_DQ[45]

BG54SB_DQ[46]

BA58SB_DQ[47]

AW59SB_DQ[48]

AW58SB_DQ[49]

AU58SB_DQ[50]

AN61SB_DQ[51]

AN59SB_DQ[52]

AU59SB_DQ[53]

AU61SB_DQ[54]

AN58SB_DQ[55]

AR58SB_DQ[56]

AK58SB_DQ[57]

AL58SB_DQ[58]

AG58SB_DQ[59]

AG59SB_DQ[60]

AM60SB_DQ[61]

AL59SB_DQ[62]

AF61SB_DQ[63]

BF40SB_WE#

BD45

SB_BS[0]

BG39SB_BS[1]

BD42SB_BS[2]

AJ6SA_DQ[2]

AP11SA_DQ[3]

AL6SA_DQ[4]

AJ10SA_DQ[5]

AJ8SA_DQ[6]

AL8SA_DQ[7]

AL7SA_DQ[8]

AR11SA_DQ[9]

AP6SA_DQ[10]

AU6SA_DQ[11]

AV9SA_DQ[12]

AR6SA_DQ[13]

AP8SA_DQ[14]

AT13SA_DQ[15]

AU13SA_DQ[16]

BC7SA_DQ[17]

BB7SA_DQ[18]

BA13SA_DQ[19]

BB11SA_DQ[20]

BA7SA_DQ[21]

BA9SA_DQ[22]

BB9SA_DQ[23]

AY13SA_DQ[24]

AV14SA_DQ[25]

AR14SA_DQ[26]

AY17SA_DQ[27]

AR19SA_DQ[28]

BA14SA_DQ[29]

AU14SA_DQ[30]

BB14SA_DQ[31]

BB17SA_DQ[32]

BA45SA_DQ[33]

AR43SA_DQ[34]

AW48SA_DQ[35]

BC48SA_DQ[36]

BC45SA_DQ[37]

AR45SA_DQ[38]

AT48SA_DQ[39]

AY48SA_DQ[40]

BA49SA_DQ[41]

AV49SA_DQ[42]

BB51SA_DQ[43]

AY53SA_DQ[44]

BB49SA_DQ[45]

AU49SA_DQ[46]

BA53SA_DQ[47]

BB55SA_DQ[48]

BA55SA_DQ[49]

AV56SA_DQ[50]

AP50SA_DQ[51]

AP53SA_DQ[52]

AV54SA_DQ[53]

AT54SA_DQ[54]

AP56SA_DQ[55]

AP52SA_DQ[56]

AN57SA_DQ[57]

AN53SA_DQ[58]

AG56SA_DQ[59]

AG53SA_DQ[60]

AN55SA_DQ[61]

AN52SA_DQ[62]

AG55SA_DQ[63]

AK56

SA_CAS#

BE39SA_RAS#

BD39SA_WE#

AT41

SA_BS[0]

BD37SA_BS[1]

BF36SA_BS[2]

Q16BSS138_G_SOT23-3

13

R5040_0402_5%

R2160_0402_5%

@

R2160_0402_5%

@

R2174.99K_0402_1%

2 R219R219 1K_0402_5%1K_0402_5%

C1900.047U_0402_16V7KC1900.047U_0402_16V7K1

2

R5050_0402_5%

Trang 7

VCC_VAL_SENSEVSS_VAL_SENSE

CFG2CFG4CFG6

VSSAXG_VAL_SENSE

VCC_VAL_SENSEVSS_VAL_SENSE

DC_TEST_C4_D3

DC_TEST_A59_C59DC_TEST_A61_C61

DC_TEST_BE59_BE61DC_TEST_BG59_BG61

DC_TEST_BE3_BG3DC_TEST_BE1_BG1

CFG4

CFG5CFG2

CFG7

CFG0

CFG6+VGFX_CORE

+CPU_CORE

Title

These pins are for solder joint reliability and non-critical to function For BGA only.

10: 2x8 PCI Express PCIE Port Bifurcation Straps

CFG[6:5]

11: (Default) 1x16 PCI Express

CFG7 PEG DEFER TRAINING

0: PEG Wait for BIOS for training

1: (Default) PEG Train immediately following xxRESETB de assertion

CFG4 eDP enable

0:Enable 1:Disable CFG Straps for Processor

01: Reserved 00: 1x8,2x4 PCI Express

PEG Static Lane Reversal - CFG2 is for the 16x CFG2

@R5431K_0402_1%

C51CFG[2]

B54CFG[3]

D53CFG[4]

A51CFG[5]

C53CFG[6]

C55CFG[7]

H49CFG[8]

A55CFG[9]

H51CFG[10]

K49CFG[11]

K53CFG[12]

F53CFG[13]

G53CFG[14]

L51CFG[15]

F51CFG[16]

D52CFG[17]

VSS_VAL_SENSEK43

VAXG_VAL_SENSEH45

VSSAXG_VAL_SENSEK45

VCC_DIE_SENSEF48

R2971K_0402_1%

@R2971K_0402_1%

@

R2961K_0402_1%

R2931K_0402_1%

R5411K_0402_1%

@R5411K_0402_1%

Trang 8

VR_SVID_ALRT# 49VR_SVID_CLK 49+CPU_CORE

+1.05VS_VTT+1.05VS_VTT

ULV type

DC 33A

Place the PU resistors close to CPU

Place the PU resistors close to VR

*

BC22 VCCIO_SEL after Ivy bridge ES2 Voltage support

0: +1.0VS_VTT 1/NC : (Default) +1.05VS_VTT

INTEL Recommend VCC 4*470UF,12*22uF(0805) and 35*2.2uF(0402) PD0.8

CAP at P.51

INTEL Recommend VCCIO 2*330UF,10*10uF(0603) and 26*1uF(0402) PD0.8

VIDALERT# A44VIDSCLK B43VIDSOUT C44

VCCIO[4] AG50VCCIO[5] AG51

VCCIO[6] AJ17VCCIO[7] AJ21VCCIO[8] AJ25VCCIO[9] AJ43VCCIO[10] AJ47

VCCIO[11] AK50VCCIO[12] AK51VCCIO[13] AL14VCCIO[14] AL15VCCIO[15] AL16

VCCIO[16] AL20VCCIO[17] AL22VCCIO[18] AL26VCCIO[19] AL45VCCIO[20] AL48VCCIO[21] AM16VCCIO[22] AM17VCCIO[23] AM21VCCIO[24] AM43VCCIO[25] AM47VCCIO[26] AN20VCCIO[27] AN42

VCCIO[28] AN45VCCIO[29] AN48

VCCIO[30] AA14

VCCIO[31] AA15VCCIO[32] AB17

VCCIO[33] AB20VCCIO[34] AC13VCCIO[35] AD16VCCIO[36] AD18VCCIO[37] AD21

VCCIO[38] AE14VCCIO[39] AE15VCCIO[40] AF16VCCIO[41] AF18VCCIO[42] AF20

VCCIO[43] AG15VCCIO[44] AG16

VCCIO[45] AG17VCCIO[46] AG20VCCIO[47] AG21VCCIO[48] AJ14VCCIO[49] AJ15

VCCIO50 W16VCCIO51 W17

VCCPQE[1] AM25VCCPQE[2] AN22

VCCIO_SENSE AN16

VCCIO_SEL BC22

R531130_0402_5%

@R52110K_0402_5%

@

R51210_0402_5%

R288100_0402_1%

R52210K_0402_5%

@R52210K_0402_5%

@

C5531U_0402_6.3V6KC5531U_0402_6.3V6K

R281100_0402_1%

R52975_0402_5%

Trang 9

VCCSA_SENSE 48

VCC_AXG_SENSE49

VSS_AXG_SENSE49

H_VCCSA_VID1 48H_VCCSA_VID0 48

SA_DIMM_VREFDQ 12SB_DIMM_VREFDQ 11+VGFX_CORE

Title

Vout 0.9V 0.85V 0.775V

VCCSA VID0

0.75V

VID1 0

SGA20331E10 S POLY C 330U

2V Y D2 LESR9M EEFSX H1.9

INTEL Recommend VAXG 2*470uF,6*22uF(0805) and 6*10uF(0603) 11*1U(0402)

Place BOT OUT BGA

SGA20331E10 S POLY C 330U 2V Y D2 LESR9M EEFSX H1.9

SA_DIMM_VREFDQ SB_DIMM_VREFDQ Check list1.5 P18 M1 default M3 no stuff

SGA00001700 S POLY C 220U

220U 2.5V M B2 ESR35 TPE H1.9

CR CheckList Rev1.5

Place TOP IN BGA

Place BOT OUT BGA

Place TOP IN BGA

R2681K_0402_5%

R309100_0402_5%

@R2480_0402_5%

R5181K_0402_1%

R2661K_0402_5%

R308100_0402_5%

VDDQ[13] AN34VDDQ[14] AN38VDDQ[15] AR26

VDDQ[1] AJ28VDDQ[2] AJ33VDDQ[3] AJ36VDDQ[4] AJ40VDDQ[5] AL30VDDQ[6] AL34VDDQ[7] AL38

VDDQ[8] AL42VDDQ[9] AM33VDDQ[10] AM36

VDDQ[18] AR32VDDQ[19] AR34

VDDQ[20] AR36VDDQ[21] AR40VDDQ[22] AV41VDDQ[23] AW26VDDQ[24] BA40

VDDQ[25] BB28VDDQ[26] BG33

R5191K_0402_1%

2

Trang 10

VSS_NCTF_1 A5 VSS_NCTF_2 A57 VSS_NCTF_3 BC61 VSS_NCTF_4 BD3 VSS_NCTF_5 BD59 VSS_NCTF_6 BE4 VSS_NCTF_7 BE58 VSS_NCTF_8 BG5 VSS_NCTF_9 BG57 VSS_NCTF_10 C3 VSS_NCTF_11 C58 VSS_NCTF_12 D59 VSS_NCTF_13 E1 VSS_NCTF_14 E61

VSS[250] M4 VSS[251] M58 VSS[252] M6 VSS[253] N1 VSS[254] N17 VSS[255] N21 VSS[256] N25 VSS[257] N28 VSS[258] N33 VSS[259] N36 VSS[260] N40 VSS[261] N43 VSS[262] N47 VSS[263] N48 VSS[264] N51 VSS[265] N52 VSS[266] N56 VSS[267] N61

VSS[249]

M15

VSS[301] G48

Trang 11

DDRA_CS0_DIMMA#

SA_ODT0SA_ODT1

SA_CLK_DDR1SA_CLK_DDR#1DDR_A_MA2DDR_A_MA4DDR_A_MA7DDR_A_MA11DDR_A_MA14

DDR_A_BS1DDR_A_RAS#

DDR_A_MA15DDRA_CKE1_DIMMA

DDR_A_DQS3DDR_A_DQS#0

DDR_A_D22

DDR_A_D36

DDR_A_D45

DDR_A_D46DDR_A_D52

DDR_A_D55DDR_A_D60

DDR_A_D62

DDR_A0_DM4

DDR_A0_DM6DDR_A_DQS5

DDR_A_DQS7DDR_A_DQS#5

DDR_A_D32

DDR_A_D34DDR_A_D40

DDR_A_D42

DDR_A_D49

DDR_A_D50DDR_A_D56

DDR_A_DQS#6DDR_A_D48

DDR_A_D33DDRA_CS1_DIMMA#

DDR_A_MA1DDR_A_MA5DDR_A_MA9

DDR_A_MA10DDR_A_MA12

DDR_A_MA13DDR_A_BS0DDR_A_BS2

DDR_A_CAS#

DDR_A_WE#

DDRA_CKE0_DIMMA

SA_CLK_DDR0SA_CLK_DDR#0

DDR_A_D0

DDR_A_D2DDR_A_D1

DDR_A_D3DDR_A_D8

DDR_A_DQS#2DDR_A_D17DDR_A_D9

DDR_A_D16

DDR_A_D25

DDR_A0_DM5DDR_A0_DM3

DDR_A0_DM7DDR_A0_DM0

DDR_A0_DM6DDR_A0_DM4DDR_A0_DM2

D_CK_SDATA 14,37D_CK_SCLK 14,37

DDR_A_MA[0 15] 6

DDRA_CS0_DIMMA# 6SA_ODT0 6SA_ODT1 6

SA_CLK_DDR16SA_CLK_DDR#16DDRA_CKE1_DIMMA 6DIMM_DRAMRST# 6,12

DDR_A_BS1 6DDR_A_RAS# 6

DDR_A_BS26

DDR_A_CAS#

6DDR_A_WE#

6DDR_A_BS06

DDRA_CS1_DIMMA#

6

DDRA_CKE0_DIMMA6

SA_CLK_DDR#06SA_CLK_DDR06

+3VS+0.75VS+0.75VS

Title

All VREF traces should have 10 mil trace width

@

R2210_0402_5%

@

R2261K_0402_1%

R2651K_0402_1%

R2691K_0402_1%

@

13

R2231K_0402_1%

Trang 12

DDR_B_MA10

DDR_B_BS1DDR_B_MA12DDR_B_BS0DDR_B_BS2

DDR_B_MA4DDR_B_MA1

DDR_B_MA5DDR_B_MA14

DDR_B_MA2DDR_B_MA11

DDR_B_MA8DDR_B_MA6DDR_B_MA13DDR_B_MA9

DDR_B_MA7

DDR_B_CKE0DDR_B_CLK0#

DDR_B_D60

DDR_B_D57

DDR_B_D61

DDR_B_D56DDR_B_D63

DDR_B_MA15

DDR_B_D58

DDR_B_D59DDR_B_D62

DDR_B_D48DDR_B_D49

DDR_B_D53DDR_B_D52

DDR_B_D23

DDR_B_D20DDR_B_D22DDR_B_D18DDR_B_D17DDR_B_D16

DDR_B_D19

DDR_B_D28DDR_B_D29

DDR_B_D30DDR_B_D27

DDR_B_D31

DDR_B_D36

DDR_B_D34

DDR_B_D47DDR_B_D46DDR_B_D40DDR_B_D41

DDR_B_D43

DDR_B_D54

DDR_B_MA15

DDR_B_D50DDR_B_D51

DDR_B_WE#

DDR_B_CAS#

DDR_B_D15DDR_B_D13

DDR_B_D14

DDR_B_D0DDR_B_D2

DDR_B_D3DDR_B_D6

DDR_B_CLK0DDR_B_CKE0DDR_B_CLK0#

DDR_B_MA4DDR_B_MA6

DDR_B_DQS5

DDR_B_MA2

DIMM_DRAMRST#

DDR_B_DQS#3DDR_B_DQS3

DDR_B_BS1

DDR_B_MA7DDR_B_MA0

DDR_B_RAS#

DDR_B_MA2

DDR_B_ODT0DDR_B_CS0#

DDR_B_MA8

DDR_B_BS2

DDR_B_MA3DDR_B_MA5

DDR_B_MA9DDR_B_MA12

DDR_B_BS0DDR_B_MA10DDR_B_MA1

DDR_B_MA13

DDR_B_MA4DDR_B_MA6

DDR_B_CLK0DDR_B_CKE0DDR_B_CLK0#

DDR_B_MA8

DDR_B_BS2

DDR_B_MA3DDR_B_MA5

DDR_B_MA9DDR_B_MA12

DDR_B_MA13

DDR_B_CAS#

DDR_B_WE#

DDR_B_RAS#

DIMM_DRAMRST#

DDR_B_BS1DDR_B_MA2

DDR_B_BS2

DDR_B_MA8

DDR_B_BS0DDR_B_MA12DDR_B_MA9DDR_B_MA5DDR_B_MA3

DDR_B_MA8DDR_B_MA5DDR_B_MA3

DDR_B_BS2

DDR_B_MA1

DDR_B_MA10

DDR_B_WE#

DDR_B_CAS#

DDR_B_MA13

DDR_B_WE#

DDR_B_CLK0

EC_SMB_CK2 14,22,27,36EC_SMB_DA2 14,22,27,36

SA_DIMM_VREFDQ9

RST_GATE_R6,11

DIMM_DRAMRST#

6,11

DDR_B_BS[0 2]

6DDR_B_D[0 31]

6

DDR_B_DQS#[0 3]

6DDR_B_DQS[0 3]

6DDR_B_WE#

6

6DDR_B_CLK06

+3VS

+1.5V

+0.75VS+1.5V

+1.5V

+VREF1

+VREF0

+1.5V+0.75VS

Security Classification Compal Secret Data

S IC W83L771AWG-2 TSSOP 8P SENSOR

SGA20331E10 S POLY C 330U 2V Y D2 LESR9M EEFSX H1.9 M3 support(unpop)

DDR3 CLK Termination DDR3 CTL/ADD Termination

1.CAD Note: Cterm= 1.6pF should be kept near feeding point of first SDRAM 2.CAD Note: Rtt= 30.1ohms, Ctt= 0.1uF should be kept within 600mils from last SDRAM

RAM GPIO config P.18

U43

W83L771AWG-2 TSSOP8PSA00003PU00UMAO@

H5TQ2G63BFR-11C_FBGA96

@

96-BALLSDRAM DDR3U2

DQL2 F2

DQL3 F8DQL4 H3DQL5 H8

DQL6 G2

DQL7 H7

VSSQ D1

VSS A9VSS E1

VSSQ B1

VSSQ B9VSSQ D8

DQU3 C2

DQU4 A7DQU5 A2DQU6 B8

VSS T1

VSS T9VDDQ D2

R2441K_0402_1%

R1011240_0402_1%

R1012240_0402_1%

Q19BSS138_G_SOT23-3@

13

R2321K_0402_1%

R1009240_0402_1%R1009240_0402_1%

R1005240_0402_1%

R1007240_0402_1%

R2451K_0402_1%

96-BALLSDRAM DDR3U1

@

96-BALLSDRAM DDR3U1

DQL5 H8

DQL6 G2DQL7 H7

VSSQ D1

VSS A9VSS E1

VSS B3

NC/ODT1

J1

VDD B2VDD D9

VDDQ A1VDDQ A8

VSSQ B1VSSQ B9

VSSQ D8VSSQ E2

DQU6 B8

DQU7 A3DQU0 D7

VSS J8

VSS M1

VSS M9VSS P1

VSS P9

VSS T1VSS T9VDDQ D2

R1010240_0402_1%

@

96-BALLSDRAM DDR3U3

DQL2 F2

DQL6 G2

DQL7 H7

VSSQ D1

VSS A9VSS E1

VSSQ B1

VSSQ B9VSSQ D8

DQU3 C2

VSS T1

VSS T9VDDQ D2

R5991 236_0402_5%

C6050.1U_0402_16V4ZUMAO@

R1006240_0402_1%

2R23030.1_0402_1%

R23030.1_0402_1%

R1008240_0402_1%

@

96-BALLSDRAM DDR3U4

DQL2 F2

DQL6 G2

DQL7 H7

VSSQ D1

VSS A9VSS E1

VSSQ B1

VSSQ B9VSSQ D8

DQU3 C2

VSS T1

VSS T9VDDQ D2

@

R2310_0402_5%

@

Trang 13

PCH_SPI_CLK

PCH_SPI_MISOPCH_SPI_CS0#

PCH_JTAG_TCK

PCH_SATALED#

PCH_JTAG_TMSPCH_JTAG_TDIPCH_JTAG_TDO

LPC_AD0LPC_AD3LPC_AD1

SERIRQ

PCH_GPIO19

SATA_COMP

RBIAS_SATA3SATA3_COMP

PCH_SPI_MOSI_1PCH_SPI_MISO_1HDA_SYNC_PCH

SERIRQPCH_SATALED#

PCH_RTCX1PCH_RTCX2

SPI_HOLD1#

PCH_SPI_CLK_1PCH_SPI_MOSI_1

PCH_SPI_CS1#_2 PCH_SPI_CS1#

PCH_SPI_MOSIPCH_SPI_MOSI_2

PCH_SPI_MISO_2PCH_SPI_CLK_2

PCH_SPI_MISO_2PCH_SPI_CLK_2PCH_SPI_MOSI_2PCH_SPI_CS1#_2

HDA_SDIN038

SERIRQ 36,37

LPC_AD0 36,37LPC_AD2 36,37

PCH_GPIO2318

SATA_PRX_DTX_P0 31SATA_PTX_DRX_P0 31SATA_PRX_DTX_N0 31

SATA_PRX_DTX_P1 34SATA_PTX_DRX_P1 34SATA_PRX_DTX_N1 34+RTCVCC

+3VS

+3VS+5VS

LOW= Disable (Default internal PD)

HIGH= Enable ( No Reboot)Disable TCO timer system reboot feature

*

* Low = Disabled (Default)

This signal has a weak internal pull-down

On Die PLL VR Select is supplied by

*

(INTVRMEN should always be pull high.)

Prevent back drive issue.

ME debug mode,this signal has a weak internal PD

HDA_SDO

ODD

0 1

GPIO51

Boot BIOS Strap

1 0 SPI

Reserved LPC

GPIO19 has internal Pull up

RTCRST close RAM door J1

High = Enabled [Flash Descriptor Security Overide]

1.5V when sampled high

1.8V when sampled low

Needs to be pulled High for Huron River platfrom

*

No use PH 10K +3VS

GPIO21 0 1

Switchable Non SG

20mil

Reserve for EMI

L=500mil S=15mil

UM77 not support

mSATA HDD1

C45118P_0402_50V8JC45118P_0402_50V8J1

R291M_0402_5%

C45910P_0402_50V8J

@

C45910P_0402_50V8J

@

R4304.7K_0402_5%

Q3BSS138_G_SOT23-3

13

@R6520_0603_5%

@R3720_0603_5%

@

R3033_0402_5%

INTVRMENC17INTRUDER#

K22

HDA_BCLKN34HDA_SYNCL34

HDA_RST#

K34

HDA_SDIN0E34HDA_SDIN1G34HDA_SDIN2C34

HDA_SDOA36

HDA_DOCK_EN# / GPIO33C36

HDA_DOCK_RST# / GPIO13N32

Y14SPI_CS1#

T1

SPI_MOSIV4SPI_MISOU3

JTAG_TCKJ3JTAG_TMSH7JTAG_TDIK5JTAG_TDOH1

SPKRT10

EN25Q32B-104HIP_SO8SA00004LI00

R7433_0402_5%

R4352 1 33_0402_5%

T25PAD T25@

R5010_0603_5%

@R5010_0603_5%

@

R13610K_0402_5%

R7233_0402_5%

EN25QH16-104HIP_SO8SA00004UG00

R7533_0402_5%

R461K_0402_5%

@R461K_0402_5%

2

R10051_0402_5%

12

R434 @ 33_0402_5%

R4342 @ 1 33_0402_5%

R406 10M_0402_5%

R4061 10M_0402_5%2

Trang 14

PCH_SML1CLKPCH_SML1DATA

XCLK_RCOMP

CLK_CPU_DMICLK_CPU_DMI#

PCH_GPIO46

PCIE_PTX_DRX_N2PCIE_PTX_DRX_P1

PCIE_PRX_DTX_P2PCIE_PTX_DRX_P2

PCIE_PTX_DRX_N1PCIE_PRX_DTX_N1

MINI1_CLKREQ#

PCH_GPIO45

XTAL25_OUTXTAL25_IN

RST_GATE

EC_SMB_CK2EC_SMB_DA2

CLKIN_GND1#

CLKIN_GND1LAN_CLKREQ#

CLK_BUF_PCIE_SATACLK_BUF_PCIE_SATA#

PCH_GPIO20

PCH_GPIO73

PCH_GPIO45MINI1_CLKREQ#

PCIE_PTX_DRX_P3

CLK_FLEX0

CLK_FLEX2

CLK_CPU_DMI# 5CLK_CPU_DMI 5

PCIE_PRX_DTX_N132

PCIE_PTX_C_DRX_N132

PCIE_PRX_DTX_P132

PCIE_PTX_C_DRX_P132

PCIE_PRX_DTX_N234

PCIE_PRX_DTX_P234

PCIE_PTX_C_DRX_N234

PCIE_PTX_C_DRX_P234

CLK_PCIE_MINI1#

34CLK_PCIE_MINI134

MINI1_CLKREQ#

34

CLK_PCI_LPBACK 17

PCH_SMBCLK 34PCH_SMBDATA 34

RST_GATE 6

EC_SMB_CK2 12,22,27,36EC_SMB_DA2 12,22,27,36

CLK_PCIE_LAN#

32CLK_PCIE_LAN32LAN_CLKREQ#

32

CLK_PEG_VGA#

22CLK_PEG_VGA22

PEG_CLKREQ# 22DGPU_PWR_EN 17,41

PCIE_PRX_DTX_N333

PCIE_PRX_DTX_P333

PCIE_PTX_C_DRX_N333

PCIE_PTX_C_DRX_P333

CLK_PCIE_CARD#

33CLK_PCIE_CARD33

No use PH 10K +3VALW

EC LID SW OUT DDR,WLAN,XDPSMBUS

DIS,Optimus UMA

DIS@

R42010K_0402_5%

UMAO@

R42110K_0402_5%

PERN2BE34PERP2BF34

PERN3BG36PERP3BJ36

PERN4BF36PERP4BE36

PERN5BG37PERP5BH37

PERN6BJ38PERP6BG38

PERN7BG40PERP7BJ40

PERN8BE38PERP8BC38

PETN1AV32PETP1AU32

PETN2BB32PETP2AY32

PETN3AV34PETP3AU34

PETN4AY34PETP4BB34

PETN5AY36PETP5BB36

PETN6AU36PETP6AV36

PETN7AY40PETP7BB40

PETN8AW38PETP8AY38

CLKOUT_PCIE0NY40

CLKOUT_PCIE0PY39

CLKOUT_PCIE1NAB49

CLKOUT_PCIE1PAB47

CLKOUT_PCIE2NAA48

CLKOUT_PCIE2PAA47

CLKOUT_PCIE3NY37

CLKOUT_PCIE3PY36

CLKOUT_PCIE4NY43

CLKOUT_PCIE4PY45

CLKOUT_PCIE5NV45

CLKOUT_PCIE5PV46

PCIECLKRQ1# / GPIO18M1

PCIECLKRQ2# / GPIO20V10

PCIECLKRQ3# / GPIO25A8

PCIECLKRQ4# / GPIO26L12

PCIECLKRQ5# / GPIO44L14

CLKOUT_PEG_B_P

AB42

CLKOUT_PCIE6NV40

CLKOUT_PCIE6PV42

PCIECLKRQ7# / GPIO46K12

CLKOUT_PCIE7NV38

CLKOUT_PCIE7PV37

CLKOUT_BCLK0_N / CLKOUT_PCIE8NAK14

CLKOUT_BCLK0_P / CLKOUT_PCIE8PAK13

C478 0.1U_0402_16V7KC478 1 20.1U_0402_16V7K

R139 10K_0402_5%

R1391 210K_0402_5%

Q34BDMN66D0LDW-7_SOT363-6Q34BDMN66D0LDW-7_SOT363-6

R810K_0402_5%

DIS@ R810K_0402_5%

DIS@

C482 0.1U_0402_16V7KC482 1 20.1U_0402_16V7K

C485 0.1U_0402_16V7KC485 1 20.1U_0402_16V7K

R25 1 2 10K_0402_5%

C45710P_0402_50V8JC45710P_0402_50V8J

1

2

R12090.9_0402_1%

C46810P_0402_50V8JC46810P_0402_50V8J1

2

R232.2K_0402_5%

@ R232.2K_0402_5%

Y325MHZ_10PF_7V25000014

Y3

25MHZ_10PF_7V25000014

GND23

GND4

R3714.7K_0402_5%

C480 0.1U_0402_16V7KC480 1 20.1U_0402_16V7K

DIS@

D S

Q22N7002K_SOT23-3

DIS@

R9633_0402_5%

@R9633_0402_5%

@R70_0402_5%

R2710K_0402_5%

R122.2K_0402_5%

@ R122.2K_0402_5%

C481 0.1U_0402_16V7KC481 1 20.1U_0402_16V7K

R33 1 2 10K_0402_5%

R4044.7K_0402_5%

Trang 15

DMI_CRX_PTX_N2

DMI_CRX_PTX_P1

DMI_CTX_PRX_P2 DMI_CTX_PRX_N2

FDI_LSYNC1 FDI_LSYNC0

FDI_CTX_PRX_N0 FDI_CTX_PRX_N2 FDI_CTX_PRX_N4 FDI_CTX_PRX_N6 FDI_CTX_PRX_P0 FDI_CTX_PRX_P2 FDI_CTX_PRX_P4 FDI_CTX_PRX_P6

PCH_GPIO72 RI#

SUSACK#_R DMI2RBIAS

SUSWARN#

PM_DRAM_PWRGD PCH_RSMRST#

PCH_GPIO72 SUSWARN#

RI#

SLP_A#

PCH_DPWROK PCH_ACIN

DMI_CRX_PTX_N2 4

DMI_CTX_PRX_N1 4

DMI_CTX_PRX_N3 4

DMI_CTX_PRX_N2 4

DMI_CTX_PRX_P0 4

DMI_CTX_PRX_P1 4

DMI_CTX_PRX_P3 4

DMI_CTX_PRX_P2 4

DMI_CRX_PTX_N3 4

DMI_CRX_PTX_N1 4

DMI_CRX_PTX_N0 4

DMI_CRX_PTX_P2 4

DMI_CRX_PTX_P3 4

DMI_CRX_PTX_P1 4

DMI_CRX_PTX_P0 4

FDI_CTX_PRX_N0 4 FDI_CTX_PRX_N2 4 FDI_CTX_PRX_N4 4 FDI_CTX_PRX_N6 4

FDI_CTX_PRX_P0 4 FDI_CTX_PRX_P2 4 FDI_CTX_PRX_P4 4 FDI_CTX_PRX_P6 4

FDI_FSYNC1 4 FDI_LSYNC0 4 FDI_FSYNC0 4 FDI_INT 4

FDI_LSYNC1 4

XDP_DBRESET#

5

PM_DRAM_PWRGD 5

PCH_PCIE_WAKE# 34

H_PM_SYNC 5

PM_SLP_S3# 36 PM_SLP_S4# 36 PM_SLP_S5# 36

4mil width and place within 500mil of the PCH

Can be left NC when IAMT is not support on the platfrom

*

not support AMT APWROK can mux

with PWROK (check list1.5 P.47)

L：Disable Must always PH at +RTCVCC

DSWODVREN - On Die DSW VR Enable

not support Deep S4,S5

can be left unconnected

FDI_FSYNC0 AV12 FDI_FSYNC1 BC10 FDI_LSYNC0 AV14 FDI_LSYNC1 BB10 FDI_INT AW16

PMSYNCH AP14 SLP_SUS# G16

SLP_S3# F4 SLP_S4# H4 SLP_S5# / GPIO63 D10

R104 10K_0402_5%

C52 0.047U_0402_16V7K

@

C52 0.047U_0402_16V7K

@ 1

T4 @ PAD T4 @ PAD

R374 10K_0402_5% R374 1 2 10K_0402_5%

R350 330K_0402_5% R350 2 1 330K_0402_5%

R390 10K_0402_5%

R390 2 1 10K_0402_5%

R423 8.2K_0402_5% R423 1 2 8.2K_0402_5%

R26 @ 10K_0402_5%

R26 2 @ 1 10K_0402_5%

U36

MC74VHC1G08DFT2G_SC70-5 U36

R119 10K_0402_5%

T36 @ PAD T36 @ PAD R156 49.9_0402_1%

R156 1 2 49.9_0402_1%

Trang 16

PCH_DPB_P0 PCH_DPB_P1

PCH_DPB_P3

PCH_DPB_N1

PCH_DPB_P2 PCH_DPB_N0

LVD_VREF

PCH_DPB_HPD

SDVO_SDATA SDVO_SCLK

CRT_IREF

IGPU_BKLT_EN

CTRL_CLK CTRL_DATA

IGPU_BKLT_EN ENBKL

PCH_LCD_CLK PCH_LCD_DATA

SDVO_SCLK 30 SDVO_SDATA 30

PCH_DPB_HPD 30

PCH_ENVDD 29

DPST_PWM 29

PCH_DPB_N1 30

PCH_DPB_N3 30 PCH_DPB_P1 30

PCH_DPB_P3 30

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SDVO_CTRLDATA strap pull high

at level shift page

HDMI D2 HDMI D1 HDMI D0 HDMI CLK

DIS only can NC

Check list1.5 P.60 disable Graphics

@

R131 0_0402_5%

2

R114 1K_0402_5%

DDPB_2N AU48 DDPB_3N AV47

DDPC_0N AY47 DDPC_1N AY43 DDPC_2N BA47 DDPC_3N BB47

DDPD_0N BB43 DDPD_1N BF44

DDPB_0P AV40 DDPB_1P AV46

DDPD_2P BE42 DDPD_3P BG42

DDPB_2P AU47 DDPB_3P AV49

DDPC_2P BA48 DDPC_3P BB49

DDPD_0P BB45 DDPD_1P BE44

DDPC_CTRLCLK P46 DDPC_CTRLDATA P42

DDPD_CTRLCLK M43 DDPD_CTRLDATA M36

SDVO_STALLP AM40 SDVO_STALLN AM42

SDVO_INTP AP40 SDVO_INTN AP39

R132 2.37K_0402_1%

@

R132 2.37K_0402_1%

2

Trang 17

CLK_PCI3

USB20_P0USB20_N0

USB20_N1USB20_P1

DGPU_PWR_ENDGPU_HOLD_RST#

DGPU_HOLD_RST#

PCH_GPIO53

PCH_GPIO5PCH_GPIO52

USB_OC0#

PCH_GPIO51PCH_GPIO55

USB_OC6#

ODD_DA#

USB20_N12

USB20_N9USB20_P9

CLK_PCI2CLK_PCI_TPM

CLK_PCI_LPC36

USB20_N8 34

USB20_N10 29USB20_P10 29

PLT_RST#

5,32,33,36,37

USB20_N1 35

DGPU_PWR_EN14,41

PLT_RST_BUF# 32,34

ODD_DA#

31

PCH_USB3_TX1_P35

USB_OC0# 35

PCH_USB3_TX2_P35

PCH_USB3_RX2_P35

PCH_USB3_RX1_P35

PCH_USB3_TX2_N35

PCH_USB3_TX1_N35

PCH_USB3_RX2_N35

PCH_USB3_RX1_N35

USB20_N12 34USB20_P12 34USB20_N9 35

Title

Set to Vcc when HIGH DMI,FDI Termination Voltage DF_TVS

Set to Vss when LOW

USB3 (Right side)

CLOSE TO THE BRANCHING POINT

CMOS Camera (LVDS) Mini Card (WLAN)

USB3 (Mid side)

UM77,HM76,HM75 not support USB port 6 & 7.&12,13

CR Check list P.89 PH 2.2K series 1K

USB3/B (right side) 3D Panel USB3.0

Add for ESD

R1452.2K_0402_5%

T5PAD T5 @

K38PIRQC#

H38PIRQD#

G38REQ1# / GPIO50C46

REQ2# / GPIO52C44

REQ3# / GPIO54E40

GNT1# / GPIO51D47

GNT2# / GPIO53E42

GNT3# / GPIO55F46

PIRQE# / GPIO2G42

PIRQF# / GPIO3G40

PIRQG# / GPIO4C42

PIRQH# / GPIO5D44

TP6AH38TP7AH37TP8AK43TP9AK45

TP16Y13TP17K24TP18L24TP19AB46TP20AB45

TP21B21TP22M20TP23AY16

TP25BE28TP26BC30TP27BE32TP28BJ32TP29BC28TP30BE30TP31BF32TP32BG32TP33AV26TP34BB26TP35AU28TP36AY30TP37AU26TP38AY26TP39AV28TP40AW30

TP4BJ16TP5BG16

TP15AM5 TP14AM4 TP13AH12 TP12H3 TP11N30 TP10C18

TP24BG46

MC74VHC1G08DFT2G_SC70-5

B2A

DIS@

R6100_0402_5%

DIS@

T9PAD T9 @

U29

MC74VHC1G08DFT2G_SC70-5DIS@

U29

MC74VHC1G08DFT2G_SC70-5DIS@

B2A

R11100K_0402_5%

DIS@

R3100K_0402_5%

@

R100_0402_5%

2

R539 10K_0402_5%

R5392 10K_0402_5%1R417 22_0402_5%

R417 2 1 22_0402_5%

Trang 18

PCH_GPIO49

PCH_PECI_RPCH_GPIO71

PCH_GPIO37OPTIMUS_EN#

PCH_GPIO27

PCH_GPIO35

EC_LID_OUT#

PCH_GPIO12

PCH_GPIO27

PCH_GPIO1PCH_GPIO6

PCH_GPIO57EC_LID_OUT#

H_THRMTRIP# 5VGA_PWROK

+3VALW_PCH

+3VALW_PCH+3VALW_PCH

This signal has a weak internal pull up

On-Die PLL Voltage Regulator

L：On-Die PLL Voltage Regulator disable

GPIO28

H：On-Die PLL voltage regulator enable

INIT3_3V This signal has weak internal

PU, can't pull low,leave NC

PCH_GPIO27 (Have internal Pull-High)

Deep S4,S5 wake event signal

1 x

*

SATA2GP/GPIO36 & SATA3GP/GPIO37

Sampled at Rising edge of PWROK.

Weak internal pull-down

(weak internal pull-down is disabled

after PLTRST# de-asserts)

NOTE: This signal should NOT be

pulled high when strap is sampled

x x x x x x x x x

0 0 0

0 0

0 0 0 0

0 0 0 0 0

1

1 1 1

1

1 1 1 1 1 1

Debug Port DG 1.2 PH 4.7K +3VALW_PCH

-use 8.2K-10K pull-down check list page 47

CRB1.0 PH10K to +3VALW

GPIO24 Unmultiplexed

NOTE: GPIO24 configuration

register bits are not cleared by

CF9h reset event.

GPIO24 0 1

No use PH +3VALW

RAM flag

No use PH +3VALW

9/15 Layout request remove Test point They will route

by itself 9/15 Layout

request remove Test point They will route

by itself

GPIO71 0 1 GDDR3 GDDR5

0 1 1

GPIO22

0 GPIO23

1

GPIO39 EVT MICRON 4G

DVT ELPIDA 2G

0 0

0

R9710K_0402_5%ELPIDA@

@R3971K_0402_5%

R9810K_0402_5%HYNIX@

R1580_0402_5%

@R1580_0402_5%

@

R4310K_0402_5%

@R4310K_0402_5%

RAM@

R39810K_0402_5%

R6810K_0402_5%

T10PAD T10@

R41910K_0402_5%

@R41910K_0402_5%

@

R4410K_0402_5%

RAM@

R41810K_0402_5%

GPIO24 / MEM_LEDE8

GPIO57D6

LAN_PHY_PWR_CTRL / GPIO12C4

VSS_NCTF_1A4VSS_NCTF_2A44VSS_NCTF_3A45VSS_NCTF_4A46VSS_NCTF_5A5VSS_NCTF_6A6VSS_NCTF_7B3VSS_NCTF_8B47VSS_NCTF_9BD1VSS_NCTF_10BD49

VSS_NCTF_11BE1VSS_NCTF_12BE49

TACH2 / GPIO6H36

TACH0 / GPIO17D40

TACH3 / GPIO7E38

SATA3GP / GPIO37M5

SATA5GP / GPIO49V3

SCLOCK / GPIO22T5

SLOAD / GPIO38N2

SDATAOUT0 / GPIO39M3

SDATAOUT1 / GPIO48V13

BMBUSY# / GPIO0T7

GPIO15G2

TACH1 / GPIO1A42

SATA2GP / GPIO36V8

STP_PCI# / GPIO34K1

GPIO35K4

SATA4GP / GPIO16U2

VSS_NCTF_14BF49

R10610K_0402_5%

R4210K_0402_5%

Trang 19

VccCore VccDMI

1.05 5

3.3 0.001

0.266 0.001 0.08

1.3 0.042

5 Voltage S0 Iccmax Current(A)

0.266 0.01 VccVRM 1.8 / 1.5 0.16 VccCLKDMI

VccALVDS

0.001 0.02 PCH Power Rail Table

Thermal Senser share with VCCADAC power rail

so can't remove this power

VccDFTERM should PH +1.8VS or +3VS

For SPI control logi

Core Well I/O Buffer DMI buffer logic Internal PLL and VRM(+1.5VS) I/O Buffer Voltage

I/O Buffer Voltage

1.8 V Internal PLL and VRMs (1.8 V for Desktop)

Processor I/F PCH Core Well Reference Voltage Suspend Well Reference Voltag

Display DAC Analog Power This power is supplied by the core well.

Display PLL A power Display PLL B power Internal Logic Voltage DMI Buffer Voltage Core Well I/O buffers 1.05 V Supply for Intel R Management Engine and Integrated LAN 3.3 V Supply for SPI Controller Logic 3.3v supply for Deep S4/S5 well 1.8V power supply for DF_TVS Battery Voltage

Suspend Well I/O Buffer Voltage High Definition Audio Controller Suspend Voltage

DMI Clock Buffer Voltage Spread Modulators Power Supply Differential Clock Buffers Power Supply Analog power supply for LVDS (Mobile Only)

Analog power supply for LVDS (Mobile Only)

place near AT20

VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2

,VCCAPLLSATA

H：On-Die PLL voltage regulator

enable

,VCCAPLLSATA

enable

3.3

1.05 1.05 1.05 1.05 1.05 3.3 3.3

3.3 3.3

1.05 1.05 1.05 3.3 1.8

0.001 0.001

0.08

Place Near AA23

Place Near AN16,AN21,AN33

Place Near BH29

Place Near U48

Place Near AM37

Place Near V33

Trace 20mil

Near AU20

place near AG16

C530.01U_0402_16V7KC530.01U_0402_16V7K1

2

C961U_0402_6.3V6KC961U_0402_6.3V6K1

2

C610.1U_0402_16V7KC610.1U_0402_16V7K1

2

C810.1U_0402_16V7KC810.1U_0402_16V7K1

2

C1070.1U_0402_16V7KC1070.1U_0402_16V7K1

2

R4410_0402_5%

C4010U_0603_6.3V6MC4010U_0603_6.3V6M1

2

C981U_0402_6.3V6KC981U_0402_6.3V6K1

R1570_0402_5%

L16FBMA-L11-201209-221LMA30T_0805L16FBMA-L11-201209-221LMA30T_0805

12

AC23VCCCORE[3]

AD21VCCCORE[4]

AD23VCCCORE[5]

AF21VCCCORE[6]

AF23VCCCORE[7]

AG21VCCCORE[8]

AG23VCCCORE[9]

AG24VCCCORE[10]

AG26VCCCORE[11]

AG27VCCCORE[12]

AG29VCCCORE[13]

AJ23VCCCORE[14]

AJ26VCCCORE[15]

AN26VCCIO[19]

AN27VCCIO[20]

AP21

VCCIO[23]

AP26VCCIO[24]

AT24

VCCIO[15]

AN16VCCIO[16]

AN17

VCCIO[21]

AP23VCCIO[22]

VCCFDIPLLBG6

AN34

VCCCORE[16]

AJ29VCCCORE[17]

Trang 20

+VCCSST

+1.05VS_VCCA_A_DPL+1.05VS_VCCA_B_DPL

+VCCSATAPLL

+VCCAPLL_CPY_PCH+PCH_VCCDSW

+1.05VM_VCCSUS

+PCH_V5REF_RUN

+PCH_V5REF_SUS+1.05VS_VCCA_A_DPL

+1.05VS_VCCA_B_DPL

+VCCDSW3_3

PCH_PWR_EN#

40+1.05VS_VTT

+1.05VS_VTT

+3VALW_PCH +5VALW_PCH

+3VS +5VS

+1.05VS_VTT+1.05VS_VTT

VCC3_3 = 266mA detal waiting for newest spec VCCDMI = 42mA detal waiting for newest spec

3mA

119mA

1mA 1010mA

1mA

80mA 80mA

Place near T34 Place near

AJ2

Not support Deep S4,S5 connect to +3VALW

suppied by internal 1.05V VR must NC

+1.05V analog internal clock PLL Can NC

Place near AG33

Place near BJ8

suppied by internal 1.05V VR Must NC

Near T24 Near T23

,VCCAPLLSATA

GPIO28

enable

suppied by internal 1.05V VR Must NC

VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2 ,VCCAPLLSATA

GPIO28 On-Die PLL Voltage Regulator H：On-Die PLL voltage regulator enable

Place near AF33, AF34,AG34

Q29AO3419L_SOT23-3

T16PAD

@ T16PAD

@

R348100_0402_5%

@

T28PAD T28@

10U_0603_6.3V6M

1

2

D29RB751V-40_SOD323-2

C4710.1U_0402_16V7KC4710.1U_0402_16V7K1

VCCASW[1]

AA19VCCASW[2]

AA21VCCASW[3]

AA24

VCCASW[5]

AA27VCCASW[6]

AC26VCCASW[9]

AC27VCCASW[10]

AC29VCCASW[11]

AC31VCCASW[12]

AD29

VCCRTCA22

VCCVRM[4]

Y49

VCCACLKAD49

DCPRTCN16

VCCASW[4]

AA26

VCCIO[9]

AF34VCCIO[7]

AF17

DCPSSTV16

W21VCCASW[15]

W23VCCASW[16]

W24VCCASW[17]

W26VCCASW[18]

W29VCCASW[19]

W31VCCASW[20]

AL29

VCCAPLLDMI2BH23

DCPSUS[2]

V19

VCCDSW3_3T16

D23RB751V-40_SOD323-2D23RB751V-40_SOD323-2

C460.1U_0402_16V7KC460.1U_0402_16V7K1

2

C511U_0402_6.3V6KC511U_0402_6.3V6K1

2

T13PAD T13@

R407 0_0402_5%

R4071 20_0402_5%

C381U_0402_6.3V6KC381U_0402_6.3V6K1

2

C421U_0603_10V6KC421U_0603_10V6K

1

2

T15PAD T15@

C470.1U_0402_16V7KC470.1U_0402_16V7K1

2

C450.1U_0402_16V7KC450.1U_0402_16V7K1

2

C791U_0402_6.3V6KC791U_0402_6.3V6K1

2

C57 0.1U_0402_16V7KC572 0.1U_0402_16V7K1

R130100_0402_5%

Trang 21

COUGARPOINT_FCBGA989

VSS[1]

AA17VSS[2]

AA2VSS[3]

AA3VSS[5]

AA34VSS[6]

AB11VSS[7]

AB14VSS[8]

AB39VSS[9]

AB4VSS[10]

AB43VSS[11]

AB5VSS[12]

AB7VSS[13]

AC19VSS[14]

AC2VSS[15]

AC21VSS[16]

AC24VSS[17]

AC33VSS[18]

AC34VSS[19]

AC48VSS[20]

AD10VSS[21]

AD11VSS[22]

AD12VSS[23]

AD13VSS[24]

AD19VSS[25]

AD24VSS[26]

AD26VSS[27]

AD27VSS[28]

AD33VSS[29]

AD34VSS[30]

AD36VSS[31]

AD37VSS[33]

AD39VSS[34]

AD4VSS[35]

AD40VSS[36]

AD42VSS[37]

AD43VSS[38]

AD45VSS[39]

AD46

VSS[43]

AF10VSS[44]

AF12VSS[46]

AD16VSS[47]

AF16VSS[48]

AF19VSS[49]

AF24VSS[50]

AF26VSS[51]

AF27VSS[52]

AF29VSS[53]

AF31VSS[54]

AF38VSS[55]

AF4VSS[56]

AF42VSS[57]

AF46VSS[59]

AF7VSS[60]

AF8VSS[61]

AG19VSS[62]

AG2VSS[63]

AG31VSS[64]

AG48VSS[65]

AH11VSS[66]

AH3VSS[67]

AH36VSS[68]

AH39VSS[69]

AH40VSS[70]

AH42VSS[71]

AH46VSS[72]

AH7VSS[73]

AJ19

VSS[76]

AJ33VSS[77]

AJ34VSS[78]

AK12VSS[79]

COUGARPOINT_FCBGA989

VSS[159]

AY4VSS[160]

AY42VSS[161]

AY46VSS[162]

AY8VSS[163]

B11VSS[164]

B15VSS[165]

B19VSS[166]

B23VSS[167]

B27VSS[168]

B31VSS[169]

B35VSS[170]

B39VSS[171]

B7VSS[173]

BB12VSS[174]

BB16VSS[175]

BB20VSS[176]

BB22VSS[177]

BB24VSS[178]

BB28VSS[179]

BB30VSS[180]

BB38VSS[181]

BB4VSS[182]

BB46VSS[183]

BC14VSS[184]

BC18VSS[185]

BC2VSS[186]

BC22VSS[187]

BC26VSS[188]

BC32VSS[189]

BC34VSS[190]

BC36VSS[191]

BC40VSS[192]

BC42VSS[193]

BC48VSS[194]

BD46VSS[195]

BD5VSS[196]

BE22VSS[197]

BE26VSS[198]

BE40VSS[199]

BF10VSS[200]

BF12VSS[201]

BF16VSS[202]

BF20VSS[203]

BF22VSS[204]

BF24VSS[205]

BF26VSS[206]

BF28VSS[207]

BD3VSS[208]

BF30VSS[209]

BF38VSS[210]

BF40VSS[211]

BF8VSS[212]

BG17VSS[213]

BG21VSS[214]

BG33VSS[215]

BG44VSS[216]

BG8VSS[217]

BH11VSS[218]

BH15VSS[219]

BH17VSS[220]

BH19VSS[222]

BH27VSS[223]

BH31VSS[224]

BH33VSS[225]

BH35VSS[226]

BH39VSS[227]

BH43VSS[228]

BH7VSS[229]

D3VSS[230]

D12VSS[231]

D16VSS[232]

D18VSS[233]

D22VSS[234]

D24VSS[235]

D26VSS[236]

D30VSS[237]

D38VSS[240]

D42VSS[241]

D8VSS[242]

E18VSS[243]

E26VSS[244]

G18VSS[245]

G20VSS[246]

G26VSS[247]

G28VSS[248]

G36VSS[249]

G48VSS[250]

H12VSS[251]

H24VSS[254]

H26VSS[255]

H30VSS[256]

H32VSS[257]

H34VSS[258]

Trang 22

I2CS_SCL

I2CS_SDA

I2CS_SCLI2CB_SCL

VGA_DDC_CLKVGA_DDC_DATAI2CB_SDAVGA_LCD_CLKVGA_LCD_DATA

I2CS_SDAI2CS_SCL

I2CB_SDAI2CB_SCL

VGA_DDC_CLKVGA_DDC_DATA

PEX_TSTCLK_OUT+

PEX_TSTCLK_OUT-PEX_TREMP

VID_1VID_3

GPIO9_ALERTACIN_BUF

VID_5VID_2VID_0

VID_4VID_1

VID_0

GPU_GPIO16

+PLLVDD

XTALINXTALOUT

PEG_HTX_C_GRX_N0

44PEG_HTX_C_GRX_P0

PEG_HTX_C_GRX_N94

PEG_HTX_C_GRX_P94

PEG_HTX_C_GRX_N114

PEG_HTX_C_GRX_P114

PEG_HTX_C_GRX_N8

44PEG_HTX_C_GRX_P8

PEG_HTX_C_GRX_N104

PEG_HTX_C_GRX_P104

PEG_HTX_C_GRX_N124

PEG_HTX_C_GRX_P124

PEG_HTX_C_GRX_N14

PEG_HTX_C_GRX_P14

PEG_HTX_C_GRX_N44

PEG_HTX_C_GRX_P44

PEG_HTX_C_GRX_N3

44PEG_HTX_C_GRX_P3

PEG_HTX_C_GRX_N64

PEG_HTX_C_GRX_P6

4PEG_HTX_C_GRX_N54

PEG_HTX_C_GRX_P54

PEG_HTX_C_GRX_N74

PEG_HTX_C_GRX_P74

PEG_HTX_C_GRX_N154

PEG_HTX_C_GRX_P154

PEG_HTX_C_GRX_N144

PEG_HTX_C_GRX_P144

PEG_HTX_C_GRX_N13

4PEG_HTX_C_GRX_P134

PEG_HTX_C_GRX_N24

PEG_GTX_HRX_P114

PEG_GTX_HRX_N114

PEG_GTX_HRX_P44

PEG_GTX_HRX_N44

PEG_GTX_HRX_P134

PEG_GTX_HRX_N134

PEG_GTX_HRX_P64

PEG_GTX_HRX_N64

PEG_GTX_HRX_P154

PEG_GTX_HRX_N154

PEG_GTX_HRX_P84

PEG_GTX_HRX_N84

PEG_GTX_HRX_P24

PEG_GTX_HRX_N24

PEG_GTX_HRX_P104

PEG_GTX_HRX_N104

PEG_GTX_HRX_P34

PEG_GTX_HRX_N34

PEG_GTX_HRX_P124

PEG_GTX_HRX_N124

PEG_GTX_HRX_P54

PEG_GTX_HRX_N54

PEG_GTX_HRX_P04

PEG_GTX_HRX_N04

PEG_GTX_HRX_P144

PEG_GTX_HRX_N144

PEG_GTX_HRX_P74

PEG_GTX_HRX_N74

PEG_GTX_HRX_P14

PEG_GTX_HRX_N14

PEG_GTX_HRX_P94

PEG_GTX_HRX_N94

EC_SMB_DA2 12,14,27,36EC_SMB_CK2 12,14,27,36

PEG_CLKREQ#

14

CLK_PEG_VGA14CLK_PEG_VGA#

14

PLTRST_VGA#

17

GPU_VID3 50GPU_VID5 50GPU_VID1 50

GPU_ACIN 36GPU_ALERT 36

GPU_OVERT 36MEM_VREF 27,28

+1.05VSDGPU

+3VSDGPU+3VSDGPU

+3VSDGPU

+3VSDGPU+3VSDGPU

Title

GPIO5

GPIO1 GPIO2 GPIO3 GPIO4

GPIO6 GPIO7 GPIO8 GPIO9 GPIO10

3D Vision

ALERT

GPU_VID3 LCD_BL_PWM LCD_VCC LCD_BLEN GPU_VID1 GPU_VID2

150mA

O O O O O O

I/O O

O

GPIO20,21 N13P/M = NC;

N13P-PES = GPIO20,21

O

GPIO15 GPIO16 GPIO17

THERM_LOAD_STEP_DOWN

THERM_LOAD_STEP_UP

SLI_RASTER_SYNC SLI_SWAPRDY

GPIO18 GPIO19 GPIO20 GPIO21 GPIO22 GPIO23 GPIO24

I

I I I O

O I/O

HPD_C

GPIO12 GPIO13 GPIO14

I O

PWR_LEVEL

HPD_D HPD_E HPD_F Reserved Reserved GPU_VID0(Real N13P)

22Ux1 33ohm(ESR0.05)x1

NV DG SP_PLLVDD,VID_PLLVDD 0.1Ux2 Under GPU

4.7Ux1,22Ux1 180ohm(ESR0.2)x1

R487 DIS@ 2.2K_0402_5%

R487 1DIS@ 2 2.2K_0402_5%

R58310K_0402_5%

DIS@

R58310K_0402_5%

DIS@

R48510K_0402_5%

DIS@

R48510K_0402_5%

C53422U_0805_6.3V6MDIS@

1

2

R464 1M_0402_5%

@R464 1M_0402_5%

@

R66710K_0402_5%

DIS@

R66710K_0402_5%

DIS@

R48810K_0402_5%

DIS@

L28 BLM18PG181SN1D_2PDIS@

R204 DIS@ 0_0402_5%

R204 1DIS@ 2 0_0402_5%

Q49BDMN66D0LDW-7_SOT363-6DIS@

Q49BDMN66D0LDW-7_SOT363-6

DIS@

R19310K_0402_5%

DIS@

C195 0.1U_0402_16V4ZDIS@

DIS@ R19710K_0402_5%

DIS@

Y427MHZ_10PF_7V27000050

DIS@

GND23

GND4

R48610K_0402_5%

DIS@

R48610K_0402_5%

Q40ADMN66D0LDW-7_SOT363-6DIS@

Q40ADMN66D0LDW-7_SOT363-6DIS@1 6

C2060.1U_0402_16V4ZDIS@

1

2

Q49ADMN66D0LDW-7_SOT363-6DIS@

Q49ADMN66D0LDW-7_SOT363-6

C51410P_0402_50V8JDIS@

Q40BDMN66D0LDW-7_SOT363-6DIS@4 3

C52010P_0402_50V8JDIS@C52010P_0402_50V8JDIS@

1

2

R20610K_0402_5%

DIS@

R20610K_0402_5%

L38 BLM18PG330SN1_2PDIS@

R200 DIS@ 0_0402_5%

R200 1DIS@ 2 0_0402_5%

C2100.1U_0402_16V4ZDIS@

1

2

D16RB751V-40_SOD323-2DIS@

12

R490 DIS@ 2.2K_0402_5%

R490 1DIS@ 2 2.2K_0402_5%

C19822U_0805_6.3V6MDIS@

PEX_RX0AN12PEX_RX0_NAM12PEX_RX1AN14PEX_RX1_NAM14PEX_RX2AP14PEX_RX2_NAP15PEX_RX3AN15PEX_RX3_NAM15PEX_RX4AN17PEX_RX4_NAM17PEX_RX5AP17PEX_RX5_NAP18PEX_RX6AN18PEX_RX6_NAM18PEX_RX7AN20PEX_RX7_NAM20PEX_RX8AP20PEX_RX8_NAP21PEX_RX9AN21PEX_RX9_NAM21PEX_RX10AN23PEX_RX10_NAM23PEX_RX11AP23PEX_RX11_NAP24PEX_RX12AN24PEX_RX12_NAM24PEX_RX13AN26PEX_RX13_NAM26PEX_RX14AP26PEX_RX14_NAP27PEX_RX15AN27PEX_RX15_NAM27

PEX_TX0AK14PEX_TX0_NAJ14PEX_TX1AH14PEX_TX1_NAG14PEX_TX2AK15PEX_TX2_NAJ15PEX_TX3AL16PEX_TX3_NAK16PEX_TX4AK17PEX_TX4_NAJ17PEX_TX5AH17PEX_TX5_NAG17PEX_TX6AK18PEX_TX6_NAJ18PEX_TX7AL19PEX_TX7_NAK19PEX_TX8AK20PEX_TX8_NAJ20PEX_TX9AH20PEX_TX9_NAG20PEX_TX10AK21PEX_TX10_NAJ21PEX_TX11AL22PEX_TX11_NAK22PEX_TX12AK23PEX_TX12_NAJ23PEX_TX13AH23PEX_TX13_NAG23PEX_TX14AK24PEX_TX14_NAJ24PEX_TX15AL25PEX_TX15_NAK25

PEX_REFCLKAL13PEX_REFCLK_NAK13

PEX_RST_NAJ12PEX_TSTCLK_OUTAJ26

PEX_TSTCLK_OUT_NAK26

PEX_TERMPAP29

PEX_CLKREQ_NAK12

PEX_WAKE_NAJ11

C1974.7U_0603_6.3V6KDIS@

1

2R213 DIS@ 2.2K_0402_5%

R213 1DIS@ 2 2.2K_0402_5%

Trang 23

1 1

DQMA0DQMA2DQMA4DQMA6

DQSA3DQSA1DQSA4DQSA6

MDA56

MDA62MDA59MDA61MDA58MDA60

MDA45

MDA57

MDA44MDA40

MDA47MDA41

MDA46MDA42

MDA33MDA35

MDA43

MDA28

MDA38MDA34

MDA39MDA36

MDA20

MDA23

MDA30MDA32

MDA21

MDA25MDA22

MDA26MDA24

MDA29

MDA2

MDA15MDA13

MDA27

MDA0

MDA18

MDA9MDA12

MDA1MDA3

MDA16MDA11

MDA5MDA7

MDA14

MDA19

MDA6

MDA17MDA4

+FB_PLLAVDD

CMDA27

CMDA8

CMDA21CMDA15

CMDA2

CMDA9

CMDA22CMDA16CMDA3

CMDA28

CMDA10

CMDA23CMDA17

MDC56

MDC62MDC59MDC61MDC58MDC60

MDC45

MDC57

MDC44MDC40

MDC47MDC41

MDC46MDC42

MDC33MDC35

MDC43

MDC28

MDC38MDC34

MDC39MDC36

MDC20

MDC23

MDC30MDC32

MDC21

MDC25MDC22

MDC26MDC24

MDC29

MDC15MDC13

MDC27MDC18

MDC9MDC12MDC3

MDC16MDC11

MDC5MDC7

MDC14

MDC19

MDC6

MDC17MDC4

DQSC0DQSC3DQSC5DQSC7

CMDC2

CMDC9

CMDC22CMDC16CMDC3

CMDC28

CMDC10

CMDC23CMDC17

FBA_WCK23FBA_WCK23#

FBA_WCK45#

FBA_WCK67FBA_WCK67#

FBA_WCK45

FBB_WCK45#

FBB_WCK67FBB_WCK67#

FBB_WCK45

FBB_WCK01FBB_WCK01#

FBB_WCK23FBB_WCK23#

CLKA0 27CLKA0# 27

FBB_WCK45 28FBB_WCK45# 28FBB_WCK67 28FBB_WCK67# 28

FBB_WCK01 28FBB_WCK01# 28FBB_WCK23 28FBB_WCK23# 28

+1.05VSDGPU

+1.5VSDGPU+1.5VSDGPU

Title

30ohm@100Mhz(ESR0.01ohm) x1 Near GPU

Place Near GPU

NC NC

L40BLM18PG330SN1_2PDIS@

FBB_D0G9FBB_D1E9FBB_D2G8FBB_D3F9FBB_D4F11FBB_D5G11FBB_D6F12FBB_D7G12FBB_D8G6FBB_D9F5FBB_D10E6FBB_D11F6FBB_D12F4FBB_D13G4FBB_D14E2FBB_D15F3FBB_D16C2FBB_D17D4FBB_D18D3FBB_D19C1FBB_D20B3FBB_D21C4FBB_D22B5FBB_D23C5FBB_D24A11FBB_D25C11FBB_D26D11FBB_D27B11FBB_D28D8FBB_D29A8FBB_D30C8FBB_D31B8FBB_D32F24FBB_D33G23FBB_D34E24FBB_D35G24FBB_D36D21FBB_D37E21FBB_D38G21FBB_D39F21FBB_D40G27FBB_D41D27FBB_D42G26FBB_D43E27FBB_D44E29FBB_D45F29FBB_D46E30FBB_D47D30FBB_D48A32FBB_D49C31FBB_D50C32FBB_D51B32FBB_D52D29FBB_D53A29FBB_D54C29FBB_D55B29FBB_D56B21FBB_D57C23FBB_D58A21FBB_D59C21FBB_D60B24FBB_D61C24FBB_D62B26FBB_D63C26FBB_DQM0E11FBB_DQM1E3FBB_DQM2A3FBB_DQM3C9FBB_DQM4F23FBB_DQM5F27FBB_DQM6C30FBB_DQM7A24FBB_DQS_WP0D10

FBB_DQS_WP1D5

FBB_DQS_WP2C3

FBB_DQS_WP3B9

FBB_DQS_WP4E23

FBB_DQS_WP5E28

FBB_DQS_WP6B30

FBB_DQS_WP7A23

FBB_DQS_RN0D9

FBB_DQS_RN1E4

FBB_DQS_RN2B2

FBB_DQS_RN3A9

FBB_DQS_RN4D22

FBB_DQS_RN5D28

FBB_DQS_RN6A30

FBB_DQS_RN7B23

C1690.1U_0402_16V4ZDIS@

1

2

C1880.1U_0402_16V4ZDIS@

1

2C1740.1U_0402_16V4ZDIS@

C1740.1U_0402_16V4ZDIS@

FBA_D0L28FBA_D1M29FBA_D2L29FBA_D3M28FBA_D4N31FBA_D5P29FBA_D6R29FBA_D7P28FBA_D8J28FBA_D9H29FBA_D10J29FBA_D11H28FBA_D12G29FBA_D13E31FBA_D14E32FBA_D15F30FBA_D16C34FBA_D17D32FBA_D18B33FBA_D19C33FBA_D20F33FBA_D21F32FBA_D22H33FBA_D23H32FBA_D24P34FBA_D25P32FBA_D26P31FBA_D27P33FBA_D28L31FBA_D29L34FBA_D30L32FBA_D31L33FBA_D32AG28FBA_D33AF29FBA_D34AG29FBA_D35AF28FBA_D36AD30FBA_D37AD29FBA_D38AC29FBA_D39AD28FBA_D40AJ29FBA_D41AK29FBA_D42AJ30FBA_D43AK28FBA_D44AM29FBA_D45AM31FBA_D46AN29FBA_D47AM30FBA_D48AN31FBA_D49AN32FBA_D50AP30FBA_D51AP32FBA_D52AM33FBA_D53AL31FBA_D54AK33FBA_D55AK32FBA_D56AD34FBA_D57AD32FBA_D58AC30FBA_D59AD33FBA_D60AF31FBA_D61AG34FBA_D62AG32FBA_D63AG33

FBA_DQS_RN0M30

FBA_DQS_RN1H30

FBA_DQS_RN2E34

FBA_DQS_RN3M34

FBA_DQS_RN4AF30

FBA_DQS_RN5AK31

FBA_DQS_RN6AM34

FBA_DQS_RN7AF32

FBA_DQS_WP0M31

FBA_DQS_WP1G31

FBA_DQS_WP2E33

FBA_DQS_WP3M33

FBA_DQS_WP4AE31

FBA_DQS_WP5AK30

FBA_DQS_WP6AN33

FBA_DQS_WP7AF33

C57822U_0805_6.3V6MDIS@

1

2

Trang 24

ROM_SOROM_SI

VSSSENSE_VGA_RVCCSENSE_VGA_R

JTAG_RSTJTAG_TCK

STRAP0STRAP2MULTI_STRAP_REF0_GND

STRAP3

STRAP0

STRAP3

JTAG_TDIJTAG_TDO

Resistor Values 5K

Pull-up to +3V 1000 10K

15K 20K

Pull-down to Gnd

1001

25K 30K

0000

35K 45K

1010

0001

1011 1100 1101

0010

1110 1111

PEX_MAX_SPEED, DP_PLLVDD33V PCI_DEV[4:5], SUB_VENDOR,PEX_PLL_EN_TERM RAM_CFG[3:0]

FB_BAR_SIZE[1:0],SMB_

ALT_ADOOR, VGA_DEVICE

R

PU 45KR

PD 5K

Memory Size

For N13P-GS-A1(ES2) A2(QS) strap table

PD 5KR

PD 45K

R

PU 5K

N13P-GS QSSA0000518A0

N13P-GS N13P-GS

1GB

64M* 32* 4 1GB

HynixSA00004GD30

Samsung

SA00004GD30 (S IC D5 64M32/2.5G H5GQ2H24MFR-T2C ABO!)

2000M 64*32

HYN

64Mx32x4

64M*32*4 1GBHynixSA00004GD30

R

PD 5K

R

PD 10KOx2

Strap Ox0

32M x 32

GDDR5

PD 10K Hynix(M)

Vendor 64M x 32

Samsung Hynix

64*32 2000M SA00004GD50(S IC D5 64M32/2.5G H5GQ2H24AFR-T2C ABO!)

HYN

64Mx32x4

1GBHynixSA00004GD50

R1864.99K_0402_1%DIS@

R46730K_0402_1%@R46730K_0402_1%@

R19415K_0402_1%@R19415K_0402_1%@

R1954.99K_0402_1%

DIS@

R1954.99K_0402_1%

DIS@

R47645.3K_0402_1%

DIS@

R1814.99K_0402_1%DIS@

R18315K_0402_1%DIS@

@R1824.99K_0402_1%

@R18420K_0402_1%

R46924.9K_0402_1%HYNAFR@

R46610K_0402_1%

DIS@

R46610K_0402_1%

DIS@

R1874.99K_0402_1%

@R1874.99K_0402_1%

@

R4684.99K_0402_1%

@R4684.99K_0402_1%

@

R4774.99K_0402_1%@R4774.99K_0402_1%@

R57910K_0402_1%

@R57910K_0402_1%

R47345.3K_0402_1%DIS@

R4694.99K_0402_1%

HYNMFR@

R4694.99K_0402_1%

Trang 25

+IFPD_IOVDD+IFPD_PLLVDD

FB_VDDQ_SENSEFB_GND_SENSE

+PEX_PLL_HVDD

+1.05VSDGPU

150mA

Near GPU

Under GPU (one per pin)

Near GPU Under GPU

Near GPU Under GPU Under GPU

SM010028800 2000ma 120ohm@100mhz DCR 0.1

if use N13P-GL,use bead 120ohm@100MHz(ESR=0.18)

if use N13P-GV,stuff with a 0 ohm.

9/22 NV Remove IFPC_RSET, IFPD_RSET,IFPEF_RSET

NV DG FBVDDQ(DDR3)

0.1Ux8,1Ux2,4.7Ux2 Under GPU

10Ux4 Near GPU

NV DG PEX_IOVVD/Q combined 1Ux4 Under GPU

4.7Ux2 Near GPU 10Ux4,22Ux4 Midway GPU & Power supply

Midway GPU & Power supply

PEX_SVDD/PLL_HVDD connect to NV3V3 0.1Ux1,4.7Ux2 Near GPU

NV DG PEX_PLLVDD 0.1Ux1 Under GPU 1Ux1,4.7Ux1 Near GPU

NV DG VDD33/3VSMISC 0.1Ux4 Under GPU 1Per pin 1Ux1,4.7Ux1 Near GPU

C2134.7U_0603_6.3V6KDIS@

C5244.7U_0603_6.3V6KDIS@

Part 5 of 7

U14E

N13P-GL-A1_FCBGA908DIS@

FB_GND_SENSEF2

FB_CAL_PD_VDDQJ27

FB_CAL_PU_GNDH27

FB_CAL_TERM_GNDH25

C1834.7U_0603_6.3V6KDIS@

C2270.1U_0402_16V4ZDIS@

L39BLM18PG121SN1D_0603DIS@

C5574.7U_0603_6.3V6KDIS@

C5414.7U_0603_6.3V6KDIS@

C54522U_0805_6.3V6MDIS@

C5541U_0402_6.3V6KDIS@

C23222U_0805_6.3V6MDIS@

C5264.7U_0603_6.3V6KDIS@

Trang 26

Part 7 of 7U14G

VDD_0AA12VDD_1AA14VDD_2AA16VDD_3AA19VDD_4AA21VDD_5AA23VDD_6AB13VDD_7AB15VDD_8AB17VDD_9AB18VDD_10AB20VDD_11AB22VDD_12AC12VDD_13AC14VDD_14AC16VDD_15AC19VDD_16AC21VDD_17AC23VDD_18M12VDD_19M14VDD_20M16VDD_21M19VDD_22M21VDD_23M23VDD_24N13VDD_25N15VDD_26N17VDD_27N18VDD_28N20VDD_29N22VDD_30P12VDD_31P14VDD_32P16VDD_33P19VDD_34P21VDD_35P23VDD_36R13VDD_37R15VDD_38R17VDD_39R18VDD_40R20VDD_41R22VDD_42T12VDD_43T14VDD_44T16VDD_45T19VDD_46T21VDD_47T23VDD_48U13VDD_49U15VDD_50U17VDD_51U18VDD_52U20VDD_53U22VDD_54V13VDD_55V15

Part 6 of 7U14F

GND_0A2GND_1AA17GND_2AA18GND_3AA20GND_4AA22GND_5AB12GND_6AB14GND_7AB16GND_8AB19GND_9AB2GND_10AB21GND_11A33GND_12AB23GND_13AB28GND_14AB30GND_15AB32GND_16AB5GND_17AB7GND_18AC13GND_19AC15GND_20AC17GND_21AC18GND_22AA13GND_23AC20GND_24AC22GND_25AE2GND_26AE28GND_27AE30GND_28AE32GND_29AE33GND_30AE5GND_31AE7GND_32AH10GND_33AA15GND_34AH13GND_35AH16GND_36AH19GND_37AH2GND_38AH22GND_39AH24GND_40AH28GND_41AH29GND_42AH30GND_43AH32GND_44AH33GND_45AH5GND_46AH7GND_47AJ7GND_48AK10GND_49AK7GND_50AL12GND_51AL14GND_52AL15GND_53AL17GND_54AL18GND_55AL2GND_56AL20GND_57AL21GND_58AL23GND_59AL24GND_60AL26GND_61AL28GND_62AL30GND_63AL32GND_64AL33GND_65AL5GND_66AM13GND_67AM16GND_68AM19GND_69AM22GND_70AM25GND_71AN1GND_72AN10GND_73AN13GND_74AN16GND_75AN19GND_76AN22GND_77AN25GND_78AN30GND_79AN34GND_80AN4GND_81AN7GND_82AP2GND_83AP33GND_84B1GND_85B10GND_86B22GND_87B25GND_88B28GND_89B31GND_90B34GND_91B4GND_92B7GND_93C10GND_94C13GND_95C19GND_96C22GND_97C25GND_98C28GND_99C7

Trang 27

DQMA2

FBA_WCK01FBA_WCK01#

+FBA_VREFD1+FBA_VREFC1

+FBA_VREFD2

CLKA0

MDA16MDA18

MDA22

MDA17MDA20

MDA7

MDA1

MDA5MDA3

MDA6

MDA0CMDA14

CMDA10CMDA9

CMDA4

CMDA6CMDA1

CMDA14

+FBA_VREFD1

DQSA3DQSA1MDA[63 48]

MDA[15 0]

MDA[31 16]

MDA[47 32]

MDA30MDA26MDA24

MDA52

MDA55MDA50MDA48

MDA53

MDA45MDA40

MDA47MDA41

MDA46MDA42

MDA35MDA38MDA34

MDA39MDA36MDA32

CMDA25CMDA30

DQSA4DQSA6

DQMA7DQMA5

CMDA19CMDA20CMDA17

CMDA26CMDA27CMDA23

CLKA1#

CLKA1

CMDA24

CMDA16CMDA31

FBA_WCK45FBA_WCK45#

23

FBA_WCK0123FBA_WCK01#

23

EC_SMB_CK2 12,14,22,36EC_SMB_DA2 12,14,22,36

23MDA[31 16]

23

DQMA[3 0]

23CMDA[31 0]

23FBA_WCK6723+1.5VSDGPU

+1.5VSDGPU

+3VS

+3VS+1.5VSDGPU

+1.5VSDGPU

Title

4019J1 SCHEMATIC MB A8203

Custom

CTitle

Custom

CTitle

CMD0 CMD1

CMD4 CMD3 CMD2

CMD6 CMD5

CMD10 CMD9 CMD8 CMD7

CMD14 CMD13 CMD12 CMD11

CMD19 CMD18 CMD17 CMD16 CMD15

CMD22 CMD21 CMD20

CMD27 CMD26 CMD25 CMD24 CMD23

CMD28 CMD29 CMD30

ABI#

A4_BA2

RAS#

A7_A8 A5_BA1

CAS#

A6_A11

A2_BA0 CS#

A1_A9

A3_BA3

A12_RFU A0_A10

A6_A11 ABI# WE# CKE#

WE#

A1_A9 RST#

CKE# A5_BA1

Near ball Near ball

S IC W83L771AWG-2 TSSOP 8P SENSOR

External VRAM Thermal Sensor

C4070.01U_0402_16V7KDIS@

S IC D5 64M32/2.5G H5GQ2H24AFR-T2C ABO!

HYNAFR@ SA00004GD50

C2970.01U_0402_16V7KDIS@

2R635

1.33K_0402_1%

DIS@

R6351.33K_0402_1%

HYNAFR@ SA00004GD50

C5420.01U_0402_16V7KDIS@

MF=0 MF=1 MF=1 MF=0

U9

H5GQ1H24AFR-T2L_BGA170SA00004GD30

@

170-BALLSGRAM GDDR5

MF=0 MF=1 MF=1 MF=0

U9

DQ27 DQ3 B2DQ28 DQ4 E4

DQ29 DQ5 E2DQ30 DQ6 F4

VDDQ B1

VDDQ D1VDDQ F1

VDDQ L2VDDQ B3

VSS

B10T5 VSS

VSS

L5 VSSG5 VSSB5 VSSK1 VSSH1

VDDQ H3VDDQ K3

VDDQ M3VDDQ P3

VDDQ T3VDDQ E5

VDDQ N5VDDQ E10

VDDQ N10VDDQ B12

VDDQ D12VDDQ F12

VDDQ H12VDDQ K12

VDDQ M12VDDQ P12

VDDQ T12VDDQ G13

VDDQ L13VDDQ B14

VDDQ D14VDDQ F14

VDDQ M14

VDDQ P14

VSSQ C3

VSSQ E3VSSQ N3

VSSQ R3VSSQ U3

VSSQ C4VSSQ R4

VSSQ F5VSSQ M5

VSSQ F10VSSQ M10

VSSQ C11VSSQ R11

VSSQ A12VSSQ C12

VSSQ E12VSSQ N12

VSSQ R12VSSQ U12

VSSQ H13VSSQ K13

VSSQ A14VSSQ C14

VSSQ E14VSSQ N14

VSSQ R14VSSQ U14

DQ12 DQ20 N11DQ13 DQ21 N13

DQ14 DQ22 M11

DQ15 DQ23 M13

DQ0 DQ24 U4DQ1 DQ25 U2

DQ2 DQ26 T4DQ3 DQ27 T2

DQ4 DQ28 N4DQ5 DQ29 N2

DQ6 DQ30 M4DQ7 DQ31 M2

MF=0 MF=1 MF=1 MF=0

U10

@

170-BALLSGRAM GDDR5

MF=0 MF=1 MF=1 MF=0

U10

DQ27 DQ3 B2DQ28 DQ4 E4

DQ29 DQ5 E2DQ30 DQ6 F4

VDDQ B1

VDDQ D1VDDQ F1

VDDQ L2VDDQ B3

VSS

B10T5 VSS

VSS

VDDQ H3VDDQ K3

VDDQ M3VDDQ P3

VDDQ T3VDDQ E5

VDDQ N5VDDQ E10

VDDQ N10VDDQ B12

VDDQ D12VDDQ F12

VDDQ H12VDDQ K12

VDDQ M12VDDQ P12

VDDQ T12VDDQ G13

VDDQ L13VDDQ B14

VDDQ D14VDDQ F14

VDDQ M14

VDDQ P14

VSSQ C3

VSSQ E3VSSQ N3

VSSQ R3VSSQ U3

VSSQ C4VSSQ R4

VSSQ F5VSSQ M5

VSSQ F10VSSQ M10

VSSQ C11VSSQ R11

VSSQ A12VSSQ C12

VSSQ E12VSSQ N12

VSSQ R12VSSQ U12

VSSQ H13VSSQ K13

VSSQ A14VSSQ C14

VSSQ E14VSSQ N14

VSSQ R14VSSQ U14

DQ12 DQ20 N11DQ13 DQ21 N13

DQ14 DQ22 M11

DQ15 DQ23 M13

DQ0 DQ24 U4DQ1 DQ25 U2

DQ2 DQ26 T4DQ3 DQ27 T2

DQ4 DQ28 N4DQ5 DQ29 N2

DQ6 DQ30 M4DQ7 DQ31 M2

C5060.01U_0402_16V7KDIS@

C5360.01U_0402_16V7KDIS@

U16

W83L771AWG-2 TSSOP8PDIS@

SA00003PU00U16

W83L771AWG-2 TSSOP8PDIS@

SA00003PU00

VDD

1

ALERT# 6THERM#

DIS@

R6551.33K_0402_1%

C3950.01U_0402_16V7KDIS@

R640549_0402_1%

DIS@

R640549_0402_1%

C1420.1U_0402_16V4ZDIS@

C5380.01U_0402_16V7KDIS@

C4060.01U_0402_16V7KDIS@

DIS@

R4711K_0402_1%

Q482N7002K_SOT23-3DIS@

G

DS

GDS

DIS@

R4631K_0402_1%

DIS@

R6591.33K_0402_1%

DIS@

R6591.33K_0402_1%

HYNAFR@ SA00004GD50

Trang 28

+FBB_VREFD1+FBB_VREFC1

CLKC0CLKC0#

CMDC7

CMDC2

CMDC11

CMDC12CMDC5

CMDC10CMDC9

CMDC4

CMDC6CMDC1

CMDC13

CMDC15CMDC0

CMDC3

CMDC8

FBB_WCK23FBB_WCK23#

CMDC14

DQSC3DQSC1

+FBB_VREFD2+FBB_VREFC2

MDC30

MDC21

MDC25MDC22

MDC26MDC24

MDC29

MDC15MDC13

MDC27MDC18

MDC9MDC12MDC3

MDC16MDC11

MDC5MDC7

CLKC1DQMC4DQMC6DQSC4DQSC6

CMDC19CMDC20CMDC17

CMDC26CMDC27CMDC23

CMDC24

CMDC16CMDC31

FBB_WCK67#

FBB_WCK67FBB_WCK45FBB_WCK45#

MDC35MDC33

MDC38MDC34

MDC39MDC36MDC32MDC45MDC40

MDC47MDC41

MDC46MDC42

+FBB_VREFB2 +FBB_VREFD2

MEM_VREF

+FBB_VREFB2 +FBB_VREFC2

FBB_WCK0123FBB_WCK01#

23

23MDC[31 16]

23

DQMC[3 0]

23CMDC[31 0]

23

+1.5VSDGPU

Title

Near ball Near ball

DIS@

R500549_0402_1%

0.01U_0402_16V7KDIS@

C2370.01U_0402_16V7KDIS@

170-BALLSGRAM GDDR5

U11

H5GQ1H24AFR-T2L_BGA170

@SA00004GD30

170-BALLSGRAM GDDR5

U11

@SA00004GD30

VSSQ E1VSS

VDDQ B1

VDDQ D1

VDDQ F1VDDQ M1

VSS

B10T5 VSS

VSS

DIS@

R4921K_0402_1%

DIS@

R6261.33K_0402_1%

DIS@

R6291.33K_0402_1%

DIS@

R6291.33K_0402_1%

C5120.01U_0402_16V7KDIS@

DIS@

R661549_0402_1%

SQ532N7002K_SOT23-3DIS@

GD

DIS@

R664549_0402_1%

C5500.01U_0402_16V7KDIS@

C5510.01U_0402_16V7KDIS@

R6331K_0402_1%

DIS@

R6331K_0402_1%

C5210.01U_0402_16V7KDIS@

U12

@SA00004GD30

170-BALLSGRAM GDDR5

U12

@SA00004GD30

VSSQ E1VSS

VDDQ B1

VDDQ D1

VDDQ F1VDDQ M1

VSS

B10T5 VSS

VSS

DIS@

R6651.33K_0402_1%

G

D

2

R6631.33K_0402_1%

DIS@

R6631.33K_0402_1%

C2290.01U_0402_16V7KDIS@

2

R666DIS@ 931_0402_1%

R6661DIS@ 2931_0402_1%

R495549_0402_1%

DIS@

R495549_0402_1%

DIS@

Tiêu đề	Acer Timeline Ultra M5 581TG Compal LA 8203P R1.0 Schematics
Trường học	Compal Electronics, Inc.
Chuyên ngành	Electronics
Thể loại	Schematic
Năm xuất bản	2012
Thành phố	Taipei

Định dạng
Số trang	57
Dung lượng	1,53 MB