Acer aspire 3100 5100 COMPAL LA 3151p HCW50 REV 0 3

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.SCHEMATIC, M/B LA-3151PCustom ,星

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THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC, M/B LA-3151PCustom

,星期四三月 09, 2006

HCW50 Schematics Document AMD/Sempron/ATI RX485/SB460 W/s M52/54/56P

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Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC

, 星期四三 09, 2006月

ALC883 Audio CKT

page 31

Realtek RTL8100CL

Thermal Sensor ADM1032ARM

page 16,17,18,19,20,21

PCI-Express

page 28

CRT & TV-OUT LCD CONN

page 29 page 30

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, 星期四三 09, 2006月

1.8V power rail for DDRII

3.3V always on power rail

5V always on power rail 3.3V switched power rail

5V switched power rail

ON*

ON ON ON

SKU

GRAPEVINE

GENEVA MEDIA/B

ON OFF OFF

1 2 3

0 8.2K +/- 5%

0 V 0.216 V 0.250 V 0.289 V 0.436 V

0.712 V

0.503 V 0.819 V

0.538 V 0.875 V

AD_BID VAD_BIDtyp VAD_BIDmax

1.036 V 1.453 V 1.650 V 1.759 V 1.935 V

2.500 V

2.200 V 3.300 V

2.341 V 1.185 V 1.264 V

Board ID 0 1 2 3 4 5 6 7

Adapter power supply (19V)

AC or battery power rail for power circuit.

Core voltage for CPU

1.2V switched power rail

External PCI Devices

ON ON ON ON

ON ON

ON

OFF OFF OFF

2

OFF OFF

LOW

LOW LOW LOW LOW LOW LOW

N/A N/A N/A

N/A N/A N/A Power Plane Description

ON OFF OFF

OFF ON

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

OFF ON

PM GM

ON

ON ON OFF

ON*

OFF

OFF ON

ON

EEPROM(24C16/02)

1001 100X b

0001 011X b

+1.2VS 1.2V switched power rail for PCIE ON OFF OFF

+0.9VS 0.9V switched power rail for VRAM terminator ON OFF OFF

+VDD_CORE 1.0~1.2V switched power rail for VGA ON OFF OFF

Compal Electronics, inc.

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, 星期四三 09, 2006月

+1.8V(S0, S1)

HD CODEC

5V ANALOG 0.1A 3.3V CORE 0.3A

CONTROL SIGNAL:

DESKTOP: ATX MOBILE: BATTERY

VDDCORE 0.375-1.500V 30A

PLL & DAC-Q(1.8V) 200mA

SB SB600

1.8V SW REGULATOR

0.5A 1.0A 1.0A 1.0A

5VDual -12V 3.3Vaux 12V 5V

USB CORE I/O 0.2A

DAC 300mA

3.3V S5 PW 0.01A

0.5A

NB CORE SW REGULATOR

0.5A

+3.3VALW

7.6A 5.0A

-12V

3.3V

3.3Vaux 12V

3.3V 5V

PCI Slot (per slot)

+5V (S0, S1) 0.1A

0.1A 0.375A

HTPLL (1.8V) 200mA

+5V

+VIN

PCIE&SB SW REGULATOR

+5V

+VIN +5V

+5V

+3.3V

1.2V LDO REGULATOR

1.8V VDD&VTT

SW REGULATOR+5VSUS

+3.3VALW

+5V

5VDual VDD

USB X7 FR

1.0A 3.5A

5VDual VDD

2XPS/2 USB X2 RL

1.0A 5VDual

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H_CADON15H_CADIN15

H_CADIN11

H_CLKIP0

H_CADIP11

H_ CADIN4H_CADIP4

H_ CADIN0H_CADIP0

H_CADON12H_CADOP12

H_CADON8H_CADOP8

H_CADON4H_CADOP4

H_CADON0H_CADOP0

H_CTLOP0H_CADIN14

H_ CADIN3

H_CTLIN0H_CADIP3

H_CTLIP0H_CTLIP1

H_CADON11H_CADOP11

H_CADON7H_CADOP7

H_CLKIN1H_CLKIN0H_CLKIP1

H_CADON3H_CADOP3

H_CLKON0

H_CLKOP1H_CLKON1

H_CADIP15

H_CADIN13

H_ CADIN9H_CADIP9

H_ CADIN6H_CADIP6

H_ CADIN2H_CADIP2

H_CTLIN1

H_CADON14H_CADOP14

H_CADON10H_CADOP10

H_CADON6H_CADOP6

H_CADON2H_CADOP2

H_CADOP15

H_CADIN12

H_ CADIN8H_CADIP8

H_ CADIN5H_CADIP5

H_ CADIN1H_CADIP1

H_CADON13H_CADOP13

H_CADON9H_CADOP9

+VCC_FAN1EN_DFAN1

, 星期四三 09, 2006月

PROCESSOR HYPERTRANSPORT INTERFACE

ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE

Athlon 64 S1Processor Socket

VLDT_Ax AND VLDT_Bx ARE CONNECTED TO THE LDT_RUN POWER SUPPLY THROUGH THE PACKAGE OR ON THE DIE IT IS ONLY CONNECTED

PLACE CLOSE TO VLDT0 POWER PINS

TO OTHER HT POWER PINS

LAYOUT: Place bypass cap on topside of board

NEAR HT POWER PINS THAT ARE NOT CONNECTED DIRECTLY

40mil

FAN1 Conn

C610U_0805_10V4Z

1

2

R110K_0402_5%

1

2

D11SS355_SOD323

L0_CLKOUT_H1 Y4L0_CLKOUT_L1 Y3

C41000P_0402_50V7K

C310U_0805_10V4Z

D21N4148_SOT23

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DDR_B_WE#

DDR_B_D40

DDR_B_D6

DDR_B_D38DDR_B_D50

DDR_B_D35

DDR_B_D47

DDR_B_D41DDR_B_D44DDR_B_D54

DDR_B_D60

DDR_B_D55

DDR_B_D34

DDR_B_D49DDR_B_D56

DDR_B_D4DDR_B_D12

DDR_B_D53

DDR_B_D46

DDR_B_D16

DDR_B_D0

DDR_B_D31DDR_B_D43

DDR_B_D11DDR_B_D33

DDR_B_D21DDR_B_D27

DDR_B_D1

DDR_B_D61

DDR_B_D5

DDR_B_D9

DDR_B_D39DDR_B_D48

DDR_B_D3

DDR_B_D51

DDR_B_D2DDR_B_D29

DDR_B_D59

M_ZP

DDR_B_DM1DDR_B_DM3DDR_B_DM5DDR_B_DM7

DDR_B_DM2DDR_B_DM4DDR_B_DM6

DDR_B_DM0

DDR_B_DQS6DDR_B_DQS#6

DDR_A_DM1DDR_A_DM3DDR_A_DM5DDR_A_DM7

DDR_A_DM0

DDR_A_DQS0DDR_A_DQS#0

DDR_A_DQS4DDR_A_DQS#4DDR_A_D4DDR_A_D23

DDR_A_D60

DDR_A_D34DDR_A_D50

DDR_A_D3DDR_A_D7DDR_A_D27

DDR_A_D44

DDR_A_D39DDR_A_D41

DDR_A_D32

DDR_A_D57DDR_A_D55

DDR_A_D9

DDR_A_D37DDR_A_D42

DDR_A_D6

DDR_A_D51

DDR_A_D13DDR_A_D38

DDR_A_D0

DDR_A_D19DDR_A_D21

DDR_A_D5

DDR_A_D31

DDR_A_D46DDR_A_D53

DDR_A_D36DDR_A_D52

DDR_A_D8

DDR_A_D25

DDR_A_D49

DDR_A_D45DDR_A_D47

DDR_A_D33

DDR_A_D28DDR_A_D26

+0.9VREF_CPU

DDR_B_MA1DDR_B_MA5

DDR_B_CLK#2DDR_A_CLK#2

DDR_B_MA8

DDR_B_ODT1DDR_B_CLK2

DDR_B_MA14

DDR_B_MA3

DDR_B_CLK1DDR_A_CLK2

DDR_B_MA9

DDR_B_MA4

DDR_B_MA15DDR_A_ODT0

DDR_B_MA6DDR_B_ODT0

DDR_B_MA0

DDR_B_MA12DDR_A_ODT1

DDR_B_MA10DDR_A_CLK1

DDR_B_MA7

DDR_B_MA2

DDR_B_MA13DDR_B_MA11

DDR_B_D57

DDR_A_D18DDR_A_CLK#1

DDR_B_CLK#1

DDR_A_DQS[0 7]DDR_A_DQS#[0 7]DDR_B_DQS[0 7]

DDR_B_DQS#[0 7]

DDR_A_MA[0 15]

DDR_A_MA5

DDR_A_MA12DDR_A_MA14

DDR_A_MA9

DDR_A_MA6

DDR_A_MA0DDR_A_MA3DDR_A_MA8DDR_A_MA10

DDR_A_MA1DDR_A_MA11

DDR_A_MA2DDR_A_MA7

+1.8V

+0.9V

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE

VDD_VTT_SUS_CPU IS CONNECTED TO THE VDD_VTT_SUS POWER

SUPPLY THROUGH THE PACKAGE OR ON THE DIE IT IS ONLY CONNECTED

Athlon 64 S1ProcessorSocket

Athlon 64 S1 Processor Socket

LAYOUT:PLACE CLOSE TO CPU

PLACE THEM CLOSE TO

CPU WITHIN 1"

Processor DDR2 Memory Interface

PLACE CLOSE TO PROCESSOR

WITHIN 1.5 INCH

PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH

ATI check ,Use +0.9V PWR , can delete or not

C201U_0402_6.3V4Z1

2R7

1K_0402_1%

C121.5P_0402_50V8C1

MA_DM2 E19

MA_DM1 C15MA_DM0 E12

MA_DATA0 G12

MA_DATA1 F12

MA_DATA2 H14MA_DATA3 G14MA_DATA4 H11

MA_DATA5 H12

MA_DATA6 C13MA_DATA7 E13MA_DATA8 H15

MA_DATA9 E15

MA_DATA10 E17MA_DATA11 H17

MA_DATA12 E14

MA_DATA13 F14MA_DATA14 C17MA_DATA15 G17

MA_DATA16 G18

MA_DATA17 C19MA_DATA18 D22

MA_DATA19 E20

MA_DATA20 E18

MA_DATA21 F18MA_DATA22 B22

MA_DATA23 C23

MA_DATA24 F20MA_DATA25 F22MA_DATA26 H24

MA_DATA27 J19

MA_DATA28 E21MA_DATA29 E22

MA_DATA30 H20

MA_DATA31 H22MA_DATA32 Y24MA_DATA33 AB24

MA_DATA34 AB22

MA_DATA35 AA21MA_DATA36 W22

MA_DATA37 W21

MA_DATA38 Y22MA_DATA39 AA22MA_DATA40 Y20

MA_DATA41 AA20

MA_DATA42 AA18MA_DATA43 AB18MA_DATA44 AB21

MA_DATA45 AD21

MA_DATA46 AD19MA_DATA47 Y18

MA_DATA48 AD17

MA_DATA49 W16MA_DATA50 W14MA_DATA51 Y14

MA_DATA52 Y17

MA_DATA53 AB17MA_DATA54 AB15MA_DATA55 AD15

MA_DATA56 AB13

MA_DATA57 AD13MA_DATA58 Y12

MA_DATA59 W11

MA_DATA60 AB14MA_DATA61 AA14MA_DATA62 AB12

MA_DATA63 AA12

MA_DQS_L0 H13MA_DQS_L1 G15

MA_DQS_L2 C21

MA_DQS_L3 G21

MA_DQS_L4 AC23

MA_DQS_L5 AB20MA_DQS_L6 W15

MA_DQS_L7 W13

MA_DQS_H0 G13

MA_DQS_H1 G16MA_DQS_H2 C22

MA_DQS_H3 G22MA_DQS_H4 AD23

MA_DQS_H5 AB19MA_DQS_H6 Y15

MA_DQS_H7 W12

MB_DATA0

C11 MB_DATA1A11 MB_DATA2A14 MB_DATA3B14 MB_DATA4G11 MB_DATA5E11 MB_DATA6D12 MB_DATA7A13 MB_DATA8A15 MB_DATA9A16 MB_DATA10A19 MB_DATA11A20 MB_DATA12C14 MB_DATA13D14 MB_DATA14C18 MB_DATA15D18 MB_DATA16D20 MB_DATA17A21 MB_DATA18D24 MB_DATA19C25 MB_DATA20B20 MB_DATA21C20B24 MB_DATA22

MB_DATA23

C24 MB_DATA24E23 MB_DATA25E24 MB_DATA26G25 MB_DATA27G26 MB_DATA28C26 MB_DATA29D26 MB_DATA30G23 MB_DATA31G24 MB_DATA32AA24 MB_DATA33AA23 MB_DATA34AD24 MB_DATA35AE24 MB_DATA36AA26 MB_DATA37AA25 MB_DATA38AD26 MB_DATA39AE25 MB_DATA40AC22 MB_DATA41AD22 MB_DATA42AE20 MB_DATA43AF20 MB_DATA44AF24 MB_DATA45AF23 MB_DATA46AC20 MB_DATA47AD20 MB_DATA48AD18 MB_DATA49AE18 MB_DATA50AC14 MB_DATA51AD14 MB_DATA52AF19 MB_DATA53AC18 MB_DATA54AF16 MB_DATA55AF15 MB_DATA56AF13 MB_DATA57AC12 MB_DATA58AB11 MB_DATA59Y11 MB_DATA60AE14 MB_DATA61AF14 MB_DATA62AF11 MB_DATA63AD11

VTT7 AB10VTT8 AA10

MB_WE_L U22

MB_BANK1 T26

MB_BANK0 U26

MB_ADD13 W25MB_ADD12 L23MB_ADD11 L25

MB_ADD10 U25

MB_ADD9 L24MB_ADD8 M26

MB_ADD7 L26

MB_ADD6 N23

MB_ADD5 N24MB_ADD4 N25

MB_ADD3 N26

MB_ADD2 P24MB_ADD1 P26MB_ADD0 T24

MA0_CLK_H2 Y16MA0_CLK_L2 AA16

MA0_CLK_H1 E16

MA0_CLK_L1 F16MB0_CLK_H2 AF18

MB0_CLK_L2 AF17

MB0_CLK_H1 A17MB0_CLK_L1 A18

2C16

1000P_0402_50V7K1

2

C151.5P_0402_50V8C1

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CPU_HTREF1

VID0VID5CPU_PROCHOT#_1.8

CPU_PRESENT#

C PU_DBRDYCPU_TMSCPU_TCKCPU_TRST#

CPU_TDI

CPU_TDO

PSI#

VID2VID4

CPU_TEST25_H_BYPASSCLK_HCPU_TEST25_L_BYPASSCLK_L

CPU_THERMDC

CPU_TEST29_L_FBCLKOUT_NCPU_DBREQ#

CPU_LDTSTOP#

CPU_ALL_PWROK

CPU_TEST25_L_BYPASSCLK_L

CPU_TEST25_H_BYPASSCLK_HCPU_PRESENT#

CPU_THERMDA

CPU_PROCHOT#_1.8

H_THERMTRIP_S#

VID1CPU_SIC_R

CPU_HT_RESET#

+VDDA_25V

CPU_TMSCPU_TDI

C PU_DBRDYCPU_DBREQ#

CPU_TCK

CPU_TDOCPU_TRST#

CPU_THERMDACPU_THERMDC

VDDIOFB_LVDDIOFB_H

+1.8VS+1.8VS

SCHEMATIC, M/B LA-3151PC

LAYOUT: ROUTE VDDA TRACE APPROX.

EXIT BALL FIELD) AND 500 mils LONG.

AMD NPT S1 SOCKET Processor Socket

ATHLON Control and Debug

place them to CPU within 1"

PLACE IT CLOSE TO CPU WITHIN 1" ROUTE AS 80 Ohm DIFFERENTIAL PAIR

R8081 2@0_0402_5%

T30PADT28PAD

R34 1 2510_0402_5%

R304.7K_0402_5%

T25PADT23PAD

C243300P_0402_50V7K1

C300.1U_0402_16V4Z

R211K_0402_5%

R8300_0402_5%

T1PAD

T2PAD

C312200P_0402_50V7K

1

2

R13 1 244.2_0603_1%

R9300_0402_5%

C23

0.22U_0603_10V7K1

2

R19300_0402_5%

R43 1 2300_0402_5%

T31 PADT27 PADT24 PAD

R32 1 2300_0402_5%

T21 PAD

C273900P_0402_50V7K

T16 PADR8061 2@0_0402_5%

C26

0.1U_0402_16V4Z

SAMTEC_ASP-68200-07JP74

@

261014182223191511951

T20PADT19PADT17PADT15PADT13PAD

R1780.6_0402_1%1 2

R8041 2 0_0402_5%

C22

4.7U_0805_10V4Z1

VID2 A4

VID1 C5VID0 B5THERMTRIP_L AF6

PSI_L A3

TEST2

AB6 TEST3Y6 THERMDAW8 THERMDCW7 TEST6AA6C3 TEST7

TEST8 C4TEST10 K8TEST26 AE6

TEST27 AF8

TEST28_L H8TEST28_H J7

TEST20 AF7

TEST21 AB8TEST22 AE8

TEST23 AD7

TEST24 AE7TEST12

AC8 TEST14C7F7 TEST15

TEST16

E7 TEST17D7 TEST9C2 TEST13AA7 TEST18H10 TEST19G9E8 TEST25_L

RSVD11 C1RSVD12 H6

RSVD13 G6

RSVD14 D5RSVD15 R24

RSVD16 W18

RSVD17 R23RSVD18 AA8

@

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SCHEMATIC, M/B LA-3151PC

uPGA638 Top View

Athlon 64 S1 Processor Socket

DECOUPLING BETWEEN PROCESSOR AND DIMMs PLACE CLOSE TO PROCESSOR AS POSSIBLE

CPU left-hand side CPU right-hand side

C504.7U_0805_10V4Z1

2

+C795220U_D2_4VM1

2

C3822U_0805_6.3V6M1

2

C74180P_0402_50V8J1

2

+C799330U_D2E_2.5VM_R91

2

+C796820U_E9_2.5V_M_R745@

1

2

C530.22U_0603_10V7K1

2

C76180P_0402_50V8J1

2

C430.22U_0603_10V7K1

2C41

0.22U_0603_10V7K1

2

C924180P_0402_50V8J1

VDD47 J15

VDD48 K16VDD49 L15

VDD50 M16

VDD51 P16VDD52 T16VDD53 U15

VDD54 V16

VDDIO1 H25

VDDIO2 J17

VDDIO3 K18VDDIO4 K21

VDDIO5 K23

VDDIO6 K25VDDIO7 L17VDDIO8 M18

VDDIO9 M21

VDDIO10 M23VDDIO11 M25

VDDIO12 N17

VDDIO13 P18VDDIO14 P21VDDIO15 P23

VDDIO16 P25

VDDIO17 R17VDDIO18 T18VDDIO19 T21

VDDIO20 T23

VDDIO21 T25VDDIO22 U17

VDDIO23 V18

VDDIO24 V21VDDIO25 V23VDDIO26 V25

VDDIO27 Y25

C60180P_0402_50V8J1

2C58

0.01U_0402_16V7K1

2C570.01U_0402_16V7K1

2

C711000P_0402_50V7K1

2

C9230.01U_0402_16V7K1

2

C634.7U_0805_10V4Z1

2

C4622U_0805_6.3V6M1

2

C480.22U_0603_10V7K1

2

C3210U_0805_10V4Z1

2

C614.7U_0805_10V4Z1

2

C440.22U_0603_10V7K1

2

C59180P_0402_50V8J1

2

C3610U_0805_10V4Z1

2

C560.22U_0603_10V7K1

2

C420.22U_0603_10V7K1

2

C3410U_0805_10V4Z1

2

C514.7U_0805_10V4Z1

2

C3922U_0805_6.3V6M1

2

C540.22U_0603_10V7K1

2

C691000P_0402_50V7K1

VSS70 J14

VSS71 J16VSS72 J18VSS73 K2

VSS74 K7

VSS75 K9VSS76 K11

VSS77 K13

VSS78 K15VSS79 K17VSS80 L6

VSS81 L8

VSS82 L10VSS83 L12

VSS84 L14

VSS85 L16

VSS86 L18VSS87 M7

VSS88 M9

VSS89 M11VSS90 M17VSS91 N4

VSS92 N8

VSS93 N10VSS94 N16

VSS95 N18

VSS96 P2VSS97 P7VSS98 P9

VSS99 P11

VSS101 R8VSS102 R10

VSS103 R16

VSS104 R18VSS105 T7

VSS106 T9

VSS107 T11VSS108 T13

VSS123 V13

VSS124 V15

VSS125 V17

VSS126 W6VSS127 Y21

VSS114 U10

VSS115 U12VSS116 U14

VSS117 U16

VSS118 U18VSS119 V2VSS120 V7

VSS121 V9

VSS122 V11VSS100 P17

C4022U_0805_6.3V6M1

2C37

22U_0805_6.3V6M1

2

C550.22U_0603_10V7K1

2

C650.22U_0603_10V7K1

2

C4522U_0805_6.3V6M1

2

+C797820U_E9_2.5V_M_R745@

1

2

C3510U_0805_10V4Z1

2C33

10U_0805_10V4Z1

2

C680.22U_0603_10V7K1

2

C494.7U_0805_10V4Z1

2

C470.22U_0603_10V7K1

2

+C798330U_D2E_2.5VM_R91

2

C524.7U_0805_10V4Z1

2

Trang 9

DDR_A_D42

DDR_A_D44DDR_A_D40

DDR_A_D58

DDR_A_D61

DDR_A_D63DDR_A_D60

DDR_A_D3DDR_A_D8

DDR_A_D6DDR_A_D5

DDR_A_D14DDR_A_D9

DDR_A_D11

DDR_A_D13

DDR_A_D16

DDR_A_D15DDR_A_D12

DDR_A_D17

DDR_A_D20

DDR_A_D19DDR_A_D24

DDR_A_D21

DDR_A_D23

DDR_A_BS#2

DDR_A_BS#1DDR_A_D25

DDR_A_D62DDR_A_DM7

DDR_A_DM2

DDR_A_DM4

DDR_A_DM3

DDR_A_DM1DDR_A_DM0

DDR_A_DM6DDR_A_DM5

DDR_A_MA6DDR_A_MA8

DDR_A_MA14DDR_A_DQS2

DDR_A_DQS#2

DDR_A_DQS#6

DDR_A_DQS#3DDR_A_DQS1

DDR_A_DQS#5DDR_A_ODT1

DDR_A_CLK#1DDR_A_CLK1

DDR_A_WE#

DDR_CS3_DIMMA#

DDR_A_ODT0

DDR_A_MA5DDR_A_MA8DDR_A_MA6

DDR_CKE1_DIMMA

DDR_A_BS#0DDR_A_CAS#

DDR_A_MA12DDR_A_MA9

DDR_A_MA0DDR_A_MA3

DDR_CKE0_DIMMA

DDR_A_BS#2

DDR_A_RAS#

DDR_A_MA4DDR_A_MA2

DDR_A_MA13DDR_A_MA11

+1.8V

+1.8V+DIMM_VREF+1.8V

, 09, 2006星期四三月

DM0 10VSS 12DQ6 14DQ7 16VSS 18

DQ12 20DQ13 22VSS 24DM1 26VSS 28

CK0 30CK0# 32VSS 34DQ14 36DQ15 38VSS 40

NC 50DM2 52VSS 54DQ22 56

DQ23 58VSS 60DQ28 62DQ29 64VSS 66

DQS3# 68DQS3 70VSS 72DQ30 74DQ31 76

VSS 78NC/CKE1 80VDD 82NC/A15 84NC/A14 86

VDD 88A11 90A7 92A6 94VDD 96

A4 98A2 100A0 102VDD 104BA1 106

RAS# 108S0# 110VDD 112ODT0 114NC/A13 116VDD 118

NC 120VSS 122DQ36 124DQ37 126VSS 128DM4 130VSS 132DQ38 134DQ39 136VSS 138

DQ44 140DQ45 142VSS 144DQS5# 146DQS5 148

VSS 150DQ46 152DQ47 154VSS 156DQ52 158

DQ53 160VSS 162CK1 164CK1# 166VSS 168

DM6 170VSS 172DQ54 174DQ55 176VSS 178

DQ60 180DQ61 182VSS 184DQS7# 186DQS7 188

VSS 190DQ62 192DQ63 194VSS 196SAO 198SA1 200

1

2

Trang 10

DDR_B_D42

DDR_B_D44DDR_B_D40

DDR_B_D58

DDR_B_D61

DDR_B_D63DDR_B_D60

DDR_B_D3DDR_B_D8

DDR_B_D6DDR_B_D5

DDR_B_D14DDR_B_D9

DDR_B_D11

DDR_B_D13

DDR_B_D16

DDR_B_D15DDR_B_D12

DDR_B_D17

DDR_B_D20

DDR_B_D19DDR_B_D24

DDR_B_D21

DDR_B_D23

DDR_B_BS#2

DDR_B_BS#1DDR_B_D25

DDR_B_D62DDR_B_DM7

DDR_B_DM2

DDR_B_DM4

DDR_B_DM3

DDR_B_DM1DDR_B_DM0

DDR_B_DM6DDR_B_DM5

DDR_B_MA6DDR_B_MA8

DDR_B_MA14DDR_B_DQS2

DDR_B_DQS#2

DDR_B_DQS#6

DDR_B_DQS#3DDR_B_DQS1

DDR_B_DQS#5DDR_B_ODT1

DDR_B_CLK#1DDR_B_CLK1

DDR_B_WE#

DDR_CS3_DIMMB#

DDR_B_ODT0

DDR_B_MA5DDR_B_MA8DDR_B_MA6

DDR_CKE1_DIMMB

DDR_B_BS#0DDR_B_CAS#

DDR_B_MA12

DDR_B_MA9

DDR_B_MA0DDR_B_MA3

DDR_CKE0_DIMMB

DDR_B_BS#2

DDR_B_RAS#

DDR_B_MA4DDR_B_MA2

DDR_B_MA13DDR_B_MA11

+1.8V

+DIMM_VREF+1.8V

, 09, 2006星期四三月

DM0 10VSS 12DQ6 14DQ7 16VSS 18

DQ12 20DQ13 22VSS 24DM1 26VSS 28

CK0 30CK0# 32VSS 34DQ14 36DQ15 38VSS 40

NC 50DM2 52VSS 54DQ22 56

DQ23 58VSS 60DQ28 62DQ29 64VSS 66

DQS3# 68DQS3 70VSS 72DQ30 74DQ31 76

VSS 78NC/CKE1 80VDD 82NC/A15 84NC/A14 86

VDD 88A11 90A7 92A6 94VDD 96

A4 98A2 100A0 102VDD 104BA1 106

RAS# 108S0# 110VDD 112ODT0 114NC/A13 116VDD 118

NC 120VSS 122DQ36 124DQ37 126VSS 128DM4 130VSS 132DQ38 134DQ39 136VSS 138

DQ44 140DQ45 142VSS 144DQS5# 146DQS5 148

VSS 150DQ46 152DQ47 154VSS 156DQ52 158

DQ53 160VSS 162CK1 164CK1# 166VSS 168

DM6 170VSS 172DQ54 174DQ55 176VSS 178

DQ60 180DQ61 182VSS 184DQS7# 186DQS7 188

VSS 190DQ62 192DQ63 194VSS 196SAO 198SA1 200

Trang 11

H_CLKOP1H_CLKON1H_CADOP13

H_CLKIN0H_CLKIP0H_CLKOP0

H_CLKON0

H_CADIP14

H_CADIP8H_ CADIN8

H_CADIP9H_ CADIN9

H_CADON11

H_CADON9

H_CADOP7

HT_RXCALPHT_RXCALN

H_ CADIN7

H_CADIP4

H_CLKIP1H_CLKIN1H_ CADIN1H_CADIP3H_CADIP7

H_CADIP1H_ CADIN5

H_ CADIN2H_ CADIN6

H_ CADIN0H_CADIP5

, 星期四三 09, 2006月

HT_TXCLK0P J24HT_TXCLK0N J25HT_TXCTLP N23HT_TXCTLN P23HT_TXCALP C25HT_TXCALN D24

Trang 12

PCIE_MRX_PTX_P1_R

PCIE_MRX_PTX_P0_RPCIE_MRX_PTX_N0_R

PCIE_MTX_GRX_N15

PCIE_MTX_PRX_N1

PCIE_MTX_C_PRX_P1PCIE_MTX_C_PRX_N1PCIE_MTX_PRX_P1

PCIE_MTX_PRX_N0

PCIE_MTX_C_PRX_P0PCIE_MTX_C_PRX_N0PCIE_MTX_PRX_P0

A_MRX_STX_P0

A_MTX_SRX_N0

A_MTX_C_SRX_P0A_MTX_SRX_P0

A_MTX_C_SRX_N0

PCIE_MTX_GRX_N11

PCIE_MTX_GRX_N1

PCIE_MTX_GRX_N10PCIE_MTX_GRX_N8PCIE_MTX_GRX_N7PCIE_MTX_GRX_N2

PCIE_MTX_GRX_P6

PCIE_MTX_GRX_P12PCIE_MTX_GRX_P13PCIE_MTX_GRX_P11

PCIE_MTX_GRX_P15

PCIE_MTX_GRX_P9PCIE_MTX_GRX_P8

PCIE_GTX_C_MRX_N14PCIE_GTX_C_MRX_P14PCIE_GTX_C_MRX_P15PCIE_GTX_C_MRX_N15

PCIE_GTX_C_MRX_P0PCIE_GTX_C_MRX_N0

PCIE_GTX_C_MRX_P11PCIE_GTX_C_MRX_N11PCIE_GTX_C_MRX_P12PCIE_GTX_C_MRX_N12

PCIE_GTX_C_MRX_N8PCIE_GTX_C_MRX_P8PCIE_GTX_C_MRX_P4

PCIE_GTX_C_MRX_N4

PCIE_GTX_C_MRX_P5PCIE_GTX_C_MRX_N5PCIE_GTX_C_MRX_P6PCIE_GTX_C_MRX_N6

PCIE_GTX_C_MRX_P[0 15]

PCIE_GTX_C_MRX_N[0 15]

PCIE_MTX_C_GRX_N10PCIE_MTX_C_GRX_N11

PCIE_MTX_C_GRX_P14PCIE_MTX_C_GRX_N14PCIE_MTX_C_GRX_P15

PCIE_MTX_C_GRX_P0PCIE_MTX_C_GRX_N0PCIE_MTX_C_GRX_P1PCIE_MTX_C_GRX_N1

PCIE_MTX_C_GRX_N3

PCIE_MTX_C_GRX_N5

PCIE_MTX_C_GRX_P2PCIE_MTX_C_GRX_P3PCIE_MTX_C_GRX_N2

PCIE_MTX_C_GRX_P4PCIE_MTX_C_GRX_P5PCIE_MTX_C_GRX_N4

PCIE_MTX_C_GRX_P6PCIE_MTX_C_GRX_N6PCIE_MTX_C_GRX_P7PCIE_MTX_C_GRX_N7PCIE_MTX_C_GRX_P8PCIE_MTX_C_GRX_N8PCIE_MTX_C_GRX_P9PCIE_MTX_C_GRX_N9PCIE_MTX_C_GRX_P10PCIE_MTX_C_GRX_P11PCIE_MTX_C_GRX_P12PCIE_MTX_C_GRX_N12PCIE_MTX_C_GRX_P13PCIE_MTX_C_GRX_N13

PCIE_MTX_GRX_N6PCIE_MTX_GRX_N5

PCIE_MTX_GRX_P10PCIE_MTX_GRX_P1

PCIE_MTX_GRX_P14PCIE_MTX_GRX_N12

, 星期四三 09, 2006月

8.25KOhm FOR RS485 DNI FOR RS690

10KOhm FOR RS485 1.47KOhm FOR RS690

150 Ohm FOR RS485

100 Ohm FOR RS485 2KOhm FOR RS690 R121:

R119:

R213:

R214:

ATI side check , use +1.2V or not

R1211 2 100_0402_1%

C1511 20.1U_0402_16V7K

C1551 20.1U_0402_16V7KC1521 20.1U_0402_16V7K

C1351 20.1U_0402_16V7K

C1681 20.1U_0402_16V7K

C1711 20.1U_0402_16V7KC1691 20.1U_0402_16V7K

C1561 20.1U_0402_16V7K

C1601 20.1U_0402_16V7K

C1421 20.1U_0402_16V7KC1381 20.1U_0402_16V7K

GPP_TX2P AD4GPP_TX2N AE5GPP_TX3P AD5GPP_TX3N AD6

SB_TX1P AC8SB_TX1N AD9

C1541 20.1U_0402_16V7KC1481 20.1U_0402_16V7K

Trang 13

HTPVDD

PLLVDD

HTPVDD+1.8VS

+3VS+1.8VS

, 星期四三 09, 2006月

High, LOAD ROM STRAP DISABLE

LOAD_ROM#: LOAD ROM STRAP ENABLE

Low, LOAD ROM STRAP ENABLE

ATI check , CRT / TV/ LVDS can delete or not when I use RX485

@1

2

R81010K_0402_5%

C9491U_0402_6.3V4Z

@1

2

T6 PAD

R1344.7K_0402_5%

R1281 2@2.7K_0402_5%

C9501U_0402_6.3V4Z

@

1

2

T9PAD

R1231 @715_0402_1%2

C1764.7U_0805_10V4Z

R8091 20_0603_5%

R8500_0603_5%

T11PADR1331 2@2.7K_0402_5%

C9471U_0402_6.3V4Z

@1

2

R1311 2@2.7K_0402_5%

R1293K_0402_5%

@

T5 PAD

T7PAD

C9511U_0402_6.3V4Z

@1

2

R1251K_0402_5%

C1744.7U_0805_10V4Z

1

2

T4 PADR1261 2 0_0402_5%

T10PAD

L67

MBK1608800YZF_0805

R8490_0603_5%

R8460_0603_5%

TXOUT_L1N A13TXOUT_L2P H14TXOUT_L2N G14TXOUT_L3P D17

TXOUT_U0P A15TXOUT_L3N E17

TXOUT_U0N B16TXOUT_U1P C17TXOUT_U1N C18TXOUT_U2P B17TXOUT_U2N A17TXOUT_U3P A18TXOUT_U3N B18

TXCLK_LP E15TXCLK_LN D15TXCLK_UP H15TXCLK_UN G15LPVDD D14LPVSS E14

LVSSR5 D12LVSSR6 C19LVSSR7 C15LVSSR8 C16

LVDS_DIGON E12LVDS_BLON G12LVDS_BLEN F12

LVSSR12 F14LVSSR13 F15

R1321 2@2.7K_0402_5%

T8PAD

Trang 14

+1.2V_HT

Title

, 星期四三 09, 2006月

S3

OFF OFF OFF OFF OFF OFF

G3

OFF

S0

ON ON ON ON ON ON ON

OFF OFF OFF OFF OFF AVDD

Power Signal

VDDA18

HTPVDD PLLVDD

S1

AVDDDI VDDR

LVDDR18D LPVDD

OFF OFF OFF

ON ON ON

OFF OFF OFF

ON ON ON

OFF OFF OFF

OFF OFF OFF OFF OFF OFF

S4/S5

OFF

OFF OFF OFF OFF OFF OFF OFF

1

2

C1902.2U_0603_6.3V6K

1

2

C1912.2U_0603_6.3V6K

1

2

C18310U_0805_10V4Z

VSSA35 Y9VSSA36 Y11

VSSA37 R9VSSA38 AD1VSSA39 AC5VSSA40 AC6VSSA41 AC7VSSA42 AD3VSSA43 AC9VSSA44 AC10VSSA45 G6

VSSA31 Y15VSSA29 AC4VSSA23 P9

VSSA14 AE6VSSA12 AE10VSSA1 M3

VSSA93 Y12VSSA94 Y14VSSA95 AA3

1

2

C2141U_0402_6.3V4Z

VDDA_12_11 L9

VDDA18_8

AE1 VDDA18_7AD2 VDDA18_6AC3 VDDA18_5AB4 VDDA18_4W7

VDDC_1 L11VDDC_2 L13VDDC_3 L15VDDC_4 M12VDDC_5 R15VDDC_6 M14VDDC_7 N11VDDC_8 N13VDDC_9 N15VDDC_10 J11VDDC_11 H11VDDC_12 P12VDDC_13 P14VDDC_14 R11

VDDA_12_10 D3VDDA_12_9 B1

C1891U_0402_6.3V4Z

1

2

C2084.7U_0805_10V4Z

Trang 15

SB_OSCIN_R

NBSRC_CLKP_R

GPP_CLK4P_RGFX_CLKP_R

GPP_CLK0P_RGPP_CLK4N_R

GFX_CLKN_R

SBSRC_CLKP_RSBSRC_CLKN_RNBSRC_CLKN_R

HTREFCLK_RNB_OSCIN_R

SBLINK_CLKP_RSBLINK_CLKN_R

CLK_48M_USB_RCLK_48M_SIO_R

FS0SB_CK_SDAT

SB_CK_SCLKICH_SMBDATA

, 星期四三 09, 2006月

Reserved

48.00 48.00 USB

48.00 48.00 48.00 48.00 48.00

Reserved

FS2

Hi-Z SRCCLK

X/6 X/3

CPU FS1

X

EXT CLK FREQUENCY SELECT TABLE(MHZ)

180.00 220.00 100.00 133.33 200.00

Parallel Resonance Crystal

1- PLACE ALL SERIAL TERMINATION

RESISTORS CLOSE TO U800

2- PUT DECOUPLING CAPS CLOSE TO U800

POWER PIN

Ioh = 5 * Iref (2.32mA) Voh = 0.71V @ 60 ohm

R1772.2K_0402_5%

L8MBK2012121YZF_0805

L6MBK2012121YZF_0805

C2272.2U_0603_6.3V6K

@1

C22933P_0402_50V8J

IREF

48

GNDA 49VDDA 50

ATIGCLKT2 35ATIGCLKC2 34

SRCCLKT5 18SRCCLKC5 19SRCCLKT4 20SRCCLKC4 21SRCCLKT3 24SRCCLKC3 25SRCCLKT2 26SRCCLKC2 27

CLKREQA# 57CLKREQB# 32

48MHz_0 6

FS1/REF1 63FS0/REF0 64

SMBDAT

10 SMBCLK9

VDDREF

2

SRCCLKT0 47SRCCLKC0 46

22

SRCCLKT1 43SRCCLKC1 42SRCCLKT7 12SRCCLKC7 13

48MHz_1 7CLKREQC# 33

1

2

C2262.2U_0603_6.3V6K

R1931 2 0_0402_5%

R173475_0402_1%

R1832 1 @0_0402_5%

R19151.1_0402_1%

Trang 16

VGA_TV_YVGA_TV_COMP

I2C_DATMEMID0

MEMID2

THERM_SDATHERM_SCL

POWER_SEL

THERM_SCL

THER_ALERT#

THERM_SDAD-

D+

PCIE_MTX_C_GRX_P0PCIE_MTX_C_GRX_P1

PCIE_MTX_C_GRX_N5PCIE_MTX_C_GRX_P7

PCIE_MTX_C_GRX_P2PCIE_MTX_C_GRX_P3PCIE_MTX_C_GRX_P4PCIE_MTX_C_GRX_P5PCIE_MTX_C_GRX_P6PCIE_MTX_C_GRX_N7PCIE_MTX_C_GRX_P8PCIE_MTX_C_GRX_N8PCIE_MTX_C_GRX_N9PCIE_MTX_C_GRX_P10PCIE_MTX_C_GRX_N10PCIE_MTX_C_GRX_P11PCIE_MTX_C_GRX_N11PCIE_MTX_C_GRX_P12PCIE_MTX_C_GRX_N12PCIE_MTX_C_GRX_P13PCIE_MTX_C_GRX_N13PCIE_MTX_C_GRX_P14PCIE_MTX_C_GRX_N14PCIE_MTX_C_GRX_P15PCIE_MTX_C_GRX_N15

PCIE_GTX_MRX_N0PCIE_GTX_C_MRX_P0

PCIE_GTX_C_MRX_N0

PCIE_GTX_MRX_P1PCIE_GTX_MRX_N1PCIE_GTX_C_MRX_P1

PCIE_GTX_C_MRX_N1

PCIE_GTX_C_MRX_N2

PCIE_GTX_C_MRX_N3

PCIE_GTX_C_MRX_N4PCIE_GTX_C_MRX_P5

PCIE_GTX_MRX_P5PCIE_GTX_C_MRX_P6

PCIE_GTX_C_MRX_N9

PCIE_GTX_C_MRX_N10

PCIE_GTX_C_MRX_N11

PCIE_GTX_C_MRX_N12

PCIE_GTX_C_MRX_N13

PCIE_GTX_C_MRX_N15

PCIE_GTX_MRX_P0

PCIE_GTX_MRX_N14PCIE_GTX_C_MRX_N14

Compal Electronics, Inc.

Keep away from other signal at last 25mils

Minimize distance from X1 pin3 to U3 pin1

Low -> VDDC=1.2V High -> VDDC=1.0V

0: 50% TX output swing 1: Full TX output swing

Straps: (Internal pull down)

GPIO[0]

1: TX de-emphasis enable

Transmitter power saving enable Transmitter de-emphasis enable

128M shareMemory256M shareMemory64M shareMemoryReserved

PCIE Lane Reversal

MEMID[2:0]

Vedio Memory Config (VGA Internal PD)

Size Vender Chips

1 0 1

1 1 1

16M16 Samsung 4 32M16 Samsung 4 Resreved

Frequence VGA

16M16 Samsung 2

Resreved

A-test A-test

DVPCNTL_0 AF2DVPCNTL_1 AF1DVPCNTL_2 AF3DVPCLK AG1DVPDATA_0 AG2DVPDATA_1 AG3DVPDATA_2 AH2DVPDATA_3 AH3DVPDATA_4 AJ2DVPDATA_5 AJ1DVPDATA_6 AK2DVPDATA_7 AK1DVPDATA_8 AK3DVPDATA_9 AL2DVPDATA_10 AL3DVPDATA_11 AM3DVPDATA_12 AE6DVPDATA_13 AF4DVPDATA_14 AF5DVPDATA_15 AG4DVPDATA_16 AJ3DVPDATA_17 AH4DVPDATA_18 AJ4DVPDATA_19 AG5DVPDATA_20 AH5DVPDATA_21 AF6DVPDATA_22 AE7DVPDATA_23 AG6

R AK24

G AM24

B AL24

HSYNC AJ23VSYNC AJ22

DDC1DATA AH22DDC1CLK AH23

GENERICA AK22GENERICB AF23

H2SYNC AF15V2SYNC AG15

Y AJ15

C AJ13COMP AH15

TP4C2421 2 0.1U_0402_16V7K

R2112.2K_0402_5%

Trang 17

VGA_LVDSA1+

VGA_LVDSA0-VGA_LVDSA2+

VGA_LVDSA1-

VGA_LVDSA2-ENVDD

VGA_DVI_CLK

VGA_LVDSBC+

VGA_LVDSBC-VGA_LVDSB0+

VGA_LVDSB1+

VGA_LVDSB0-VGA_LVDSB2+

DVI_TX0+_LDVI_TX1-_LDVI_TX1+_LDVI_TX2-_LDVI_TX2+_L

DVI_TXC+

DVI_TXC-DVI_TX0+

DVI_TX0-DVI_TX1+

DVI_TX1-DVI_TX2+

Title

HPD1 AF11

TXCLK_UP AJ21TXCLK_UN AK21TXOUT_U0P AG18TXOUT_U0N AH18TXOUT_U1P AK20TXOUT_U1N AJ20TXOUT_U2P AG20TXOUT_U2N AH20TXOUT_U3P AH21TXOUT_U3N AG21

TXCLK_LN AL18TXCLK_LP AM18TXOUT_L0P AL19TXOUT_L0N AK19TXOUT_L1P AM20TXOUT_L1N AL20TXOUT_L2P AM21TXOUT_L2N AL21TXOUT_L3P AJ18TXOUT_L3N AK18

VARY_BL AD12DIGON AE11GENERICD AD23

TXCM AL9TXCP AM9

TX0M AK10TX0P AL10

TX1M AL11TX1P AM11

TX2M AL12TX2P AM12

TX3M AK9TX3P AJ9

TX4M AK11TX4P AJ11

TX5M AK12TX5P AJ12

AVSSQ AK23AVSSN AK25AVSSN AJ24

VSS1DI AL23TPVSS AL8

A2VSSN AM17A2VSSN AL17

VSS2DI AJ17

PVSS AH14

MPVSS A5

LPVSS AE18A2VSSQ AK13

LVSSR AK17LVSSR AJ19LVSSR AF18LVSSR AH17LVSSR AG17LVSSR AG19LVSSR AH19LVSSR AF22LVSSR AF17LVSSR AF21

PCIE_VSS AB23PCIE_VSS P24PCIE_VSS R24PCIE_VSS T24PCIE_VSS U24PCIE_VSS V24PCIE_VSS W24PCIE_VSS Y24PCIE_VSS AC24PCIE_VSS AH24PCIE_VSS V25PCIE_VSS AA25PCIE_VSS R26PCIE_VSS AA26PCIE_VSS T27PCIE_VSS AE27PCIE_VSS AG31PCIE_VSS W26

PCIE_PVSS W23R6352 10_0402_5%DVI@

C2670.1U_0402_16V4Z

Trang 18

FBCD38FBCD40FBCD42FBCD44FBCD46FBCD48FBCD50FBCD52FBCD54FBCD56FBCD58FBCD60

FBCA2FBCA0

FBCA3FBCA5

FBCA8FBCA10FBCA9FBCA11FBCA6

FBCDQM#3FBCDQM#1

FBCDQM#4FBCDQM#6

FBCDQS1FBCDQS3

FBCDQS6FBCDQS4

FBCDQS0FBCDQS2

FBCDQS#1FBCDQS#3

FBCDQS#6FBCDQS#4

FBCDQS#0FBCDQS#2

FBCODT0

FBCCLK0FBCCLK0#

FBCCLK1FBCCLK1#

FBC_CKE0

FBC_CKE1FBCRAS0#

FBCA12FBC_BA0

FBCCLK0#

FBCCLK1FBCCLK1#

Title

R637 56_0402_5%

12

R238100_0402_1%

T32

PAD

R242100_0402_1%

R245243_0603_1%

R2434.7K_0402_5%1 2

DQMA#_0 H31DQMA#_1 J29DQMA#_2 J26DQMA#_3 G23DQMA#_4 E21DQMA#_5 B15DQMA#_6 D14DQMA#_7 J17

QSA_0 J31QSA_1 K29QSA_2 K25QSA_3 F23QSA_4 D20QSA_5 B16QSA_6 D16QSA_7 H15

QSA_0# K31QSA_1# K28QSA_2# K26QSA_3# G24QSA_4# D21QSA_5# C16QSA_6# D15QSA_7# J15

ODTA0 F29ODTA1 D24

CLKA0 D31CLKA0# E31

CLKA1 B20CLKA1# C19

R240100_0402_1%

R639 56_0402_5%

64BIT@

12

DQMB#_0 B8DQMB#_1 D9DQMB#_2 G9DQMB#_3 K7DQMB#_4 M5DQMB#_5 V2DQMB#_6 W4DQMB#_7 T9

QSB_0 B9QSB_1 D10QSB_2 H10QSB_3 K6QSB_4 N4QSB_5 U2QSB_6 U4QSB_7 V8

QSB_0# B10QSB_1# E10QSB_2# G10QSB_3# J7QSB_4# M4QSB_5# U3QSB_6# V4QSB_7# V9

ODTB0 D6ODTB1 J4

CLKB0 B4CLKB0# B5

CLKB1 N2CLKB1# P3

Trang 19

+1.2VS

+VDD_CORE

+3VS+3VS

+1.8VS

+2.5VS

+VDD1DI+2.5VS

?mA

10/20/05"

For PCIE_PVDD_12 only

L need close to chip

10/20/05"

100mA

Modify 11/18

L47BLM18PG121SN1D_0603

C3590.1U_0402_16V4Z

12

C3560.1U_0402_16V4Z

12

C2751U_0402_6.3V4Z

12

C342

0.1U_0402_16V4Z

12

L15BLM15AG121SN1D_0402

C3690.1U_0402_16V4Z

12

C288

22U_0805_6.3V6M

12

C281

0.1U_0402_16V4Z

L17BLM15AG121SN1D_04021 2

12

C3630.1U_0402_16V4Z

12

C3700.1U_0402_16V4Z

12

C366

22U_0805_6.3V6M

12

C3510.1U_0402_16V4Z

12

C322

0.1U_0402_16V4Z

L11BLM18PG121SN1D_06031 2

C2910.1U_0402_16V4Z

12

L14BLM15AG121SN1D_04021 2

L60BLM18PG121SN1D_06031 2

C318

0.1U_0402_16V4Z

C2930.1U_0402_16V4Z

12

C339

0.1U_0402_16V4Z

L16BLM15AG121SN1D_04021 2

C35722U_0805_6.3V6M

12

C292

0.1U_0402_16V4Z

12

PCIE_VDDR_12 N29PCIE_VDDR_12 N28PCIE_VDDR_12 N27PCIE_VDDR_12 N26PCIE_VDDR_12 N25

VDDC AC11VDDC AC12VDDC P14VDDC U15VDDC W14VDDC W15VDDC R17VDDC R15VDDC V15VDDC V16VDDC T16VDDC U16VDDC T17VDDC U17VDDC V14VDDC R18VDDC T18VDDC V18VDDC P18VDDC P19VDDC R19VDDC W19VDDC AD11

VDDCI W10VDDCI T14VDDCI W17VDDCI P16VDDCI T23VDDCI K14VDDCI U19VDDPLL AC15

LPVDD/VDDL0 AE19

LVDDR/VDDL0 AF20LVDDR/VDDL0 AE20LVDDR/VDDL0 AF19

LVDDR/VDDL1 AC21LVDDR/VDDL1 AC22LVDDR/VDDL1 AD22

LVDDR/VDDL2 AE21LVDDR/VDDL2 AD21LVDDR/VDDL2 AE22

TXVDDR AJ6TXVDDR AK6TXVDDR AL6TXVDDR AM6

TPVDD AM8AVDD

12

C336

0.1U_0402_16V4Z

L13BLM15AG121SN1D_04021 2

C2771U_0402_6.3V4Z

12

C352

0.1U_0402_16V4Z

12

L71BLM18PG121SN1D_06031 2

C271220U_D2_4VM@

12

L18BLM15AG121SN1D_04021 2

C347

0.1U_0402_16V4Z

12

C3380.1U_0402_16V4Z

12

C360 0.1U_0402_16V4Z

12

C365

0.1U_0402_16V4Z

12

C3530.1U_0402_16V4Z

12

C334

0.1U_0402_16V4Z

12

C808

22U_0805_6.3V6M

@

12

L12BLM18PG121SN1D_06031 2

C806

0.1U_0402_16V4Z

12

C348

22U_0805_6.3V6M

12

C317

220U_D2_4VM

@12

C358

0.1U_0402_16V4Z

12

C36422U_0805_6.3V6M

12

C3550.1U_0402_16V4Z

12

C301

0.1U_0402_16V4Z

C2791U_0402_6.3V4Z

12

C35422U_0805_6.3V6M

12

C276

1U_0402_6.3V4Z

12

C3350.1U_0402_16V4Z

12

Trang 20

FBCA6FBCA12

FBCA2FBCA0FBCA3FBCA5FBCA8FBCA10FBCA9FBCA11

FBCA6

FBC_BA0FBC_BA0

FBC_BA1FBC_BA1

FBC_BA1FBC_BA0

FBCA2FBCA1FBCA0

FBCA3FBCA4FBCA5

FBCA8FBCA7

FBCA10FBCA9FBCA11FBCA12

FBCA6

FBCDQS2FBCDQS#2

FBCDQS0FBCDQS#0

FBCD4

FBCD23FBCD21FBCD20

FBCD19FBCD18

FBCD16

FBCD5FBCD6FBCD2FBCD1FBCD0

FBCCLK0FBCCLK0#

FBCDQS#3FBCDQS3FBCDQS#1FBCDQS1FBCDQM#1

FBCD27FBCD25FBCD30

FBCD31FBCD24FBCD26

FBCD28

FBCD10FBCD11

FBCD12FBCD8

FBCD9FBCD15FBCD14

+VRAM_VREFC+1.8VS

+VRAM_VREFC

+1.8VS+1.8VS

+0.9VS

Title

(SSTL-1.8) VREF = 5*VDDQ(SSTL-1.8) VREF = 5*VDDQ

R256 56_0402_5%

M56@

12

C3760.047U_0402_16V4Z

1

2

C3800.1U_0402_16V4Z

1

2

R2471K_0402_1%

C3741U_0402_6.3V4Z

R249 56_0402_5%

M56@

12

C3820.1U_0402_16V4Z

1

2

C3710.1U_0402_16V4Z

1

2

C3900.1U_0402_16V4Z

C3880.1U_0402_16V4Z

R258 56_0402_5%

M56@

12

R268 56_0402_5%

M56@

12

R269 56_0402_5%

M56@

12

R255 56_0402_5%

M56@

12

C3750.047U_0402_16V4Z

DQ10 D7DQ9 C2DQ8 C8DQ7 F9DQ6 F1

DQ5 H9DQ4 H1DQ3 H3DQ2 H7DQ1 G2DQ0 G8

BA1

L3 BA0L2

WE

K3 VDDQ10 G9

VDDQ1 A9VDDQ2 C1VDDQ3 C3VDDQ4 C7VDDQ5 C9VDDQ6 E9VDDQ7 G1

VSSQ1 A7VSSQ2 B2VSSQ3 B8VSSQ4 D2VSSQ5 D8

VSSQ6 E7VSSQ7 F2VSSQ8 F8VSSQ9 H2VSSQ10 H8

VSS1 A3VSS2 E3VSS3 J3VSS4 N1VSS5 P9

UDQS

A8 UDQSB7

LDQS

E8 LDQSF7

VDDQ8 G3

VDDQ9 G7

VDD1 A1VDD2 E1

VDD3 J9VDD4 M9VDD5 R1

1

2

C3721U_0402_6.3V4Z

C3860.01U_0402_16V7K

R260 56_0402_5%

M56@

12

C3730.1U_0402_16V4Z

BA1

L3 BA0L2

WE

K3 VDDQ10 G9

UDQS

A8 UDQSB7

R259 56_0402_5%

M56@

12

R266 56_0402_5%

M56@

12

R264 56_0402_5%

M56@

12

Trang 21

FBCA1

FBCA8FBCA10FBCA9FBCA11

FBCA6

FBCCLK1FBCCLK1#

FBC_BA0FBC_BA0

FBC_BA1FBC_BA1

FBCCLK1

FBCDQS#[0 7]FBCDQM#[0 7]

FBCDQS[0 7]FBCA[0 12]FBCD[0 63]

FBC_BA1FBC_BA0

FBCCLK1#

FBCDQS#7FBCDQS7

FBCDQM#7

FBCDQS#5FBCDQS5FBCDQM#5

FBCDQS#6FBCDQS6

FBCDQS#4FBCDQS4FBCDQM#4

FBCRAS1#

FBC_CKE1FBCODT1FBCCAS1#

FBCWE1#

FBCCS1#

FBCA2FBCA4

FBCD56FBCD61FBCD63

FBCD60FBCD58

FBCD59FBCD57FBCD62

FBCD44FBCD46FBCD42FBCD45

FBCD40FBCD43

FBCD37FBCD32

FBCD36FBCD38

FBCD54FBCD51FBCD53FBCD49

FBCD52FBCD55

FBCD48FBCD50FBCD34

+VRAM_VREFD+1.8VS

+VRAM_VREFD

+1.8VS+1.8VS

+0.9VS

Title

(SSTL-1.8) VREF = 5*VDDQ(SSTL-1.8) VREF = 5*VDDQ

C4080.01U_0402_16V7K

BA1

L3 BA0L2

WE

K3 VDDQ10 G9

UDQS

A8 UDQSB7

LDQS

E8 LDQSF7

VDDQ8 G3

VDDQ9 G7

VDD1 A1VDD2 E1

R273 56_0402_5%

M56@

12

BA1

L3 BA0L2

WE

K3 VDDQ10 G9

UDQS

A8 UDQSB7

1

2

C4100.1U_0402_16V4Z

1

2

C4060.01U_0402_16V7K

64BIT@

1

2

C3980.047U_0402_16V4Z

64BIT@

1

2

C4040.1U_0402_16V4Z

1

2

C3941U_0402_6.3V4Z

Trang 22

PCIRST#

VBAT_INA_RST#

SERIRQ

PCI_PLOCK#

PCI_PIRQH#

PCI_AD19CLK_PCI_LAN_R

LPC_AD2

A_MRX_C_STX_P0

PCI_REQ#2

PCI_AD22PCI_AD5

LPC_FRAME#

PCI_PERR#

PCI_AD26

PCI_AD12PCI_AD3

A_MTX_C_SRX_N0

PCI_REQ#4PCI_AD13

PCI_AD11

PCI_AD27PCI_AD24PCI_AD14

PCI_AD1CLK_PCI_1394_R

LPC_AD3LPC_AD0

PCI_AD31PCI_AD16

PCI_GNT#0PCI_REQ#1CLK_PCI_PCM_R

PCI_PIRQG#

PCI_AD28PCI_CLK6_R

LPC_DRQ#0PM_CLKRUN#

LPC_DRQ#1

PCI_AD25PCI_AD21PCI_AD17PCI_AD15

PCI_AD8PCI_AD6

PCI_I RDY#

PCI_CBE#2

PCI_AD9PCI_AD7

LPC_AD0

32K_X232K_X1

SB_TX2PSB_TX2NSB_TX3NSB_TX3P

BMREQ#

CLK_PCI_PCM_RCLK_PCI_LAN_R

CLK_PCI_SIO_RCLK_PCI_MINI_RCLK_PCI_1394_R

CLK_PCI_LAN_R

CLK_PCI_PCMCLKOUT1

CLKOUT3CLKOUT5

CLK_PCI_LAN

CLK_PCI_SIOCLK_PCI_1394

+3VALW+3VALW

+3VS

+3VS+3VS

PLACE THESE PCIE AC COUPLING

CAPS CLOSE TO U600

PLACE THESE COMPONENTS CLOSE TO U600, AND USE GROUND GUARD FOR 32K_X1 AND 32K_X2

FOR SB460, THIS BALL

FOR SB600, CONNECT TO CPU_PG/LDT_PG

2

R2821 2@22_0402_5%

R30320M_0603_5%

12

PCIRST# AJ9

CBE0#/ROMA10 AB9CBE1#/ROMA1 AF9

CBE2#/ROMWE# AJ5CBE3# AG3

FRAME# AA2DEVSEL#/ROMA0 AH6IRDY# AG5

TRDY#/ROMOE# AA1PAR/ROMA19 AF7STOP# Y2

PERR# AG8REQ0# AJ8REQ1# AE2REQ2# AG9

REQ3#/PDMA_REQ0# AH8GNT0# AD11

GNT1# AF2GNT2# AH7GNT3#/PLL_BP66/PDMA_GNT0# AB12

SERR# AC11

CLKRUN# AG7

LAD0 AG24

LAD1 AG25LAD2 AH24LAD3 AH25

LFRAME# AF24LDRQ0# AJ24

SERIRQ AF23

RTC_GND D1

PCICLK4 W3PCICLK5 U3PCICLK6 V1

AD0/ROMA18 W7

AD1/ROMA17 Y1AD2/ROMA16 W8AD3/ROMA15 W5

AD4/ROMA14 AA5AD5/ROMA13 Y3AD6/ROMA12 AA6

AD7/ROMA11 AC5AD8/ROMA9 AA7AD9/ROMA8 AC3AD10/ROMA7 AC7AD12/ROMA5 AD4AD13/ROMA4 AB11AD14/ROMA3 AE6

AD15/ROMA2 AC9AD16/ROMD0 AA3AD17/ROMD1 AJ4

AD18/ROMD2 AB1AD19/ROMD3 AH4

AD20/ROMD4 AB2AD21/ROMD5 AJ3AD22/ROMD6 AB3

AD23/ROMD7 AH3AD24 AC1AD25 AH2AD26 AC2AD27 AH1

AD28 AD2AD29 AG2AD30 AD1

AD31 AG1AD11/ROMA6 AJ7

REQ4#/PLL_BP33/PDMA_REQ1# AH5GNT4#/PLL_BP50/PDMA_GNT1# AG4

PCIE_RX0N

T26

INTE#/GPIO33 AD3

INTF#/GPIO34 AF1INTG#/GPIO35 AF4INTH#/GPIO36 AF3LOCK# AF6

CLKOUT3 7

CLKOUT4 10CLKOUT5 11CLKOUT6 14

R81210K_0402_5%

C4200.1U_0402_16V4Z

R2978.2K_0402_5%

1

2

C9441U_0402_6.3V4Z

2C427

1U_0402_6.3V4Z

1

2

R2791 33_0402_5%2R2841 2@22_0402_5%

R7771 2 @10K_0402_5%

C94215P_0402_50V8J1

2

R2891 2@49.9_0402_1%

C43010P_0402_50V8K

2

R2928.2K_0402_5%

C42110U_0805_10V4Z

2

L68FBM-L11-160808-800LMT_0603

1 12

2

C42910P_0402_50V8K

R3071K_0603_5%2 1

C4190.1U_0402_16V4Z

C4281U_0402_6.3V4Z1

2

R8361 2 22_0402_5%

C4151 20.01U_0402_16V7K

Trang 23

EC_SWI#

PM_SLP_S3#

CPU_PWRGDSB_CK_SCLK

USB20_N5USB20_P4USB20_N4USB20_N6

ICH_AC_SDIN2ICH_AC_SDIN0

AZ_SDATA_OUTAZ_RST#

AZ_BIT_CLK

AZ_SY NC

ICH_AC_SDIN2ICH_AC_SDIN0

USB20_P0

EC_SMI#

USB_OC#0USB_OC#3CP_PE#

, 星期四三 09, 2006月

TEST POINT TP602 FORSB460_FANOUT0

SB600 ONLY(NC for SB460)

BALLS(C6 AND C5) ARE FOR SB600 ONLY (NC FOR SB460)

SB460 ONLY

PLACE C443,C444 AND C445 CLOSE TO U16

@1

USB_OC0#/GPM0#

A8

USB_HSDP5+ D16USB_HSDM5- E16USB_HSDP4+ D18USB_HSDM4- E18USB_HSDP3+ G16USB_HSDM3- H16USB_HSDP2+ G18USB_HSDM2- H18

USB_HSDP1+ D19USB_HSDM1- E19USB_HSDP0+ G19USB_HSDM0- H19

AVSSC A13

AVSS_USB_1 A16

AVDDRX_0 A9AVDDRX_1 B10AVDDTX_3 B16

AVDDTX_0 B9AVDDTX_1 B11

AVDDRX_2 B12

AVDDC A12USB_OC4#/GPM4#

A6

USB_OC3#/GPM3#

C8

AVSS_USB_16 E21AVSS_USB_15 E11AVSS_USB_14 D21AVSS_USB_12 C20AVSS_USB_11 C19AVSS_USB_9 C17

AVSS_USB_3 C10AVSS_USB_2 C9

USB_HSDP6+ G14USB_HSDM6- H14

AVDDTX_2 B13

AVDDRX_3 B14

AVSS_USB_13 D11AVSS_USB_8 C16

USB_OC6#/GEVENT6#

B4 USB_OC7#/GEVENT7#

C4

AVSS_USB_6 C13AVSS_USB_7 C14AVSS_USB_4 C11

AVSS_USB_18 F12AVSS_USB_19 F14AVSS_USB_20 F16AVSS_USB_21 F18AVSS_USB_10 C18

@1

Trang 24

SATA_LED#

SATA_DTX_SRX_N0

IDE_D14

IDE_A1IDE_DACK#

IDE_D8IDE_D1IDE_IOW#

SATA_CAL

IDE_D12IDE_D3

IDE_D15IDE_D6IDE_DREQ

IDE_D10IDE_D9

IDE_D0IDE_CS3#

+1.8VS

Title

, 星期四三 09, 2006月

PLACE SATA_CAL RES & CAP VERY CLOSE TO BALL

OF U16

R360 IS 1K 1% FOR 25MHz XTAL, 4.99K 1% FOR 100MHz INTERNAL CLOCK

NOTE:

PLACE SATA AC COUPLING CAPS CLOSE TO U16

C649 CLOSE TO THE BALL OF U600

VCC_SB=1.2V WHEN SB600 VCC_SB 1.8V WHEN SB460

C650 CLOSE TO THE

BALL OF U600

C4581U_0402_6.3V4Z

SATA@

1

2

R7780_0402_5%

PATA@

R36310M_0603_5%

C4480.01U_0402_16V7K

Y325MHZ_20PF_6X25000017

SATA@

R7790_0402_5%

C4490.01U_0402_16V7K

PIDE_DACK# AB28PIDE_DRQ AC27PIDE_IOR# AC29PIDE_IOW# AC28PIDE_CS1# W28PIDE_CS3# W27PIDE_D0 AD28PIDE_D1 AD26PIDE_D2 AE29PIDE_D3 AF27PIDE_D4 AG29PIDE_D5 AH28PIDE_D6 AJ28PIDE_D7 AJ27PIDE_D8 AH27PIDE_D9 AG27PIDE_D10 AG28PIDE_D11 AF28PIDE_D12 AF29PIDE_D13 AE28PIDE_D14 AD25PIDE_D15 AD29

C46027P_0402_50V8J

SATA@

C4470.01U_0402_16V7K

PATA@

C4522.2U_0603_6.3V6K

@

Trang 25

+1.8VS

+1.2V_HT

+3VALW+1.8VS

, 星期四三 09, 2006月

1

2

C4850.1U_0402_16V4Z

12

1

2

L24MBK1608800YZF_08051 2

1

2

C4710.1U_0402_16V4Z

S5_1.8V_1

G4

S5_1.8V_4

H3 S5_1.8V_3H2

VSS_13 F2VSS_12 E24

VSS_23 M18VSS_22 M15

P27 PCIE_VSS_29T21 PCIE_VSS_30T24 PCIE_VSS_31T27 PCIE_VSS_32T28 PCIE_VSS_33T29 PCIE_VSS_34U27 PCIE_VSS_35V22 PCIE_VSS_36V23 PCIE_VSS_37V24 PCIE_VSS_38V25 PCIE_VSS_39V26 PCIE_VSS_40V27 PCIE_VSS_41V28

Trang 26

, 星期四三 09, 2006月

PCI_CLK1 PCI_CLK0

DEFA ULT

RTC_CLK

PCI_AD24

USE EEPROM PCIE STRAPS

USE DEFAULT PCIE STRAPS

DEFA ULT

BYPASS ACPI BCLK

USE ACPI BCLK

DEFA ULT

IDE_DACK#

USE IDE PLL USE

LONG RESET

USE SHORT RESET

USE PCI PLL

DEFA ULT

BYPASS IDE PLL

DEFA ULT

USE SHORT RESET

DEFA ULT

H, H = PCI ROM

NOTE: FOR SB460, PCICLK[8:7] ARECONNECTED TO SUBSTRATEBALLS PCICLK[1:0]

ROM TYPE:

L, L = FWH ROM

DEFA ULT

PCI_CLK1 PCI_CLK0

PULL HIGH RTC_IRQ#

AUTO PWR ON

MANUAL PWR ON

CLK_PCI_MINI

USB PHY POWERDOWN DISABLECLK_PCI_PCM

DEFA ULT

USB PHY POWERDOWN ENABLE

N OT SUPPORTED

SB460 ONLY

LPC_FRAME#

DEFA ULT

ENABLE THERMTRIP#

DISABLE THERMTRIP#

XTAL MODE

LOW

PCIE_CM_SET HIGH

BOOTFAILTIMER ENABLED

BOOTFAILTIMER DISABLED

NOTE: FORSB460,PCI_AD23 ISRESERVED

NOTE: R365 PU RESISTOR FOR RTC_IRQ# IS REQUIRED FOR SB460

TO KEEP THE INPUT FROM FLOATING.

DEFA ULT

USE DEBUG STRAPS

IGNORE DEBUG STRAPS

CLK_PCI_1394

ACPWRON SPDIF_OUT PCI_CLK2 PCI_CLK3 PCI_CLK5 LFRAME#

CLK_PCI_LPC CLK_PCI_LAN CLK_PCI_LAN CLK_PCI_LPC

R38410K_0402_5%

R37110K_0402_5%

@

R37310K_0402_5%

@

R39510K_0402_5%

@

R36810K_0402_5%

R39410K_0402_5%

@

R39810K_0402_5%

@

R37510K_0402_5%

@

R39310K_0402_5%

@

R38110K_0402_5%

R39910K_0402_5%

@

R39610K_0402_5%

@

R37010K_0402_5%

R38510K_0402_5%

@

R38310K_0402_5%

@

R38610K_0402_5%

R38710K_0402_5%

R39010K_0402_5%

@

R36910K_0402_5%

R38910K_0402_5%

R38810K_0402_5%

R36710K_0402_5%

R39710K_0402_5%

@

R37610K_0402_5%

R38010K_0402_5%

@

R36510K_0402_5%

R37810K_0402_5%

@

R37910K_0402_5%

@

R65010K_0402_5%

R37710K_0402_5%

R38210K_0402_5%

R36610K_0402_5%

@

R37410K_0402_5%

R64910K_0402_5%

Trang 27

IDE_D15IDE_D11IDE_D8

IDE_D13

I DE_IRQ

IDE_D2IDE_D0

IDE_D5IDE_D7

IDE_D4IDE_D6IDE_RESET#

IDE_LED#

IDE_DREQIDE_IOW#

IDE_IOR#

ID E_IORDYIDE_DACK#

I DE_IRQIDE_A1IDE_CS1#

IDE_CSEL

PDIAG#

IDE_A2IDE_CS3#

IDE_RESET#

IDE_D7IDE_D5IDE_D3IDE_D1

IDE_D8IDE_D10IDE_D12IDE_D14

+5VS

+5VS+5VS

,星期四三月09, 2006

401412THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC

AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

HDD CONN

80mils

CDROM CONN

80mils 80mils

(NEW)

SATA HDD Conn.

IDE_CSEL Grounding for Master (When use SATA HDD) Open or High for Slaver (Normal)

Modify 11/07 for EMI

C49810U_0805_10V4Z

C5000.1U_0402_16V4Z

1

2

R406100K_0402_5%

@

1

2

R782100K_0402_5%

33

34 3435

Định dạng
Số trang	55
Dung lượng	1,13 MB