Lecture Computer organization and assembly language - Lecture 32: Intel x86 Instruction Encoding - TRƯỜNG CÁN BỘ QUẢN LÝ GIÁO DỤC THÀNH PHỐ HỒ CHÍ MINH

Optional Scaled Index Byte if the instruction uses a scaled index memory addressing mode. Displacement[r]

CSC 221

Computer Organization and Assembly

Language

Lecture 32:

Intel x86 Instruction Encoding

Lecture Outline

• Encoding Real x86 Instructions

• x86 Instruction Format Reference

• x86 Opcode Sizes

• x86 ADD Instruction Opcode

• Encoding x86 Instruction Operands, MOD-REG-R/M Byte

• REG Field of the MOD-REG-R/M Byte

• MOD R/M Byte and Addressing Modes

• SIB (Scaled Index Byte)

• Layout Scaled Indexed Addressing Mode

Lecture Outline

• Encoding ADD Instruction Example

• Encoding ADD CL, AL Instruction

• Encoding ADD ECX, EAX Instruction

• Encoding ADD EDX, DISPLACEMENT Instruction

• Encoding ADD EDI, [EBX] Instruction

• Encoding ADD EAX, [ ESI + disp8 ] Instruction

• Encoding ADD EBX, [ EBP + disp32 ] Instruction

• Encoding ADD EBP, [ disp32 + EAX*1 ] Instruction

• Encoding ADD ECX, [ EBX + EDI*4 ] Instruction

• Encoding ADD Immediate Instruction

Encoding Real x86 Instructions

• It is time to take a look that the actual machine

instruction format of the x86 CPU family

• They don't call the x86 CPU a Complex Instruction Set Computer (CISC) for nothing!

• Although more complex instruction encodings exist, no one is going to challenge that the x86 has a complex instruction encoding:

Encoding Real x86 Instructions

Prefix Bytes

0 to 4 special

prefix values

that affect the

operation of

instruction.

One or Two byte

Instruction opcode

(two bytes if the

special 0Fh opcode

expansion prefix is

present)

spcifies the addressing mode and Instruction operand size.

This byte is only required if the instruction supports register or memory

operands.

Optional Scaled Index Byte if the instruction uses a scaled index memory addressing mode.

0,1, 2, or 4 byte value that specifies a memory address displacement for the instruction.

Imm./Constant data

This is a 0,1, 2, or 4 byte constant value if the instruction has an immediate operand.

Encoding Real x86 Instructions

• Although the diagram seems to imply that instructions can be up to 16 bytes long, in actuality the x86 will not allow instructions greater than 15 bytes in length

• The prefix bytes are not the opcode expansion prefix

discussed earlier - they are special bytes to modify the behavior of existing instructions

x86 Instruction Format Reference

• Another view of the x86 instruction format:

Instruction Prefix

Address-Size Prefix

Operand-Size Prefix

Segment Override

Number 0 or 1 0 or 1 0 or 1 0 or 1

of Bytes

Number 0 or 1 0 or 1 0 or 1 0, 1, 2 or 4 0, 1, 2 or 4

of Bytes OpCode Mod-R/M SIB Displacement Immediate

7 6 5 4 3 2 1 0

7 6 5 4 3 2 1 0

Bits (b) General Instruction Format (a) Optional Instruction Prefix

x86 Instruction Format Reference

following fields (but no instruction has all parts)

memory

x86 Instruction Format Reference

within a segment (usually given as a named variable or a label in code)

– it could be a relative address like the 8-bit value used for jumping forward or backward from the

current location in the code segment

– or it could be the location of a variable in the data segment

– or it could be a FAR reference to code or data in another segment

x86 Instruction Format Reference

code segment

variable in the current data segment

variable in the current code segment and ecx is

an index register