6.3.3 ClassE Amplifiers The Class E amplifier proposed by the Sokals [7] [8] [9] and further analysed byRaab [10] [11] is designed to avoid discharging the shunt capacitance of theswitch
Trang 1For high efficiency one usually requires two major factors: optimum waveformshape and a device output impedance which is significantly lower than the inputimpedance to the load network.
This chapter will provide a brief introduction to power amplifier design andwill cover:
1 Load pull measurement and design techniques
2 A design example of a broadband efficient amplifier operating from 130
to 180 MHz
3 A method for performing real time large signal modelling on circuits
ISBNs: 0-471-49793-2 (Hardback); 0-470-84175-3 (Electronic)
Trang 2When power amplifiers are designed the small signal S parameters become
modified owing to changes in the input, feedback and output capacitances due to
changes in g m due to saturation and charge storage effects It is therefore oftenuseful to obtain large signal parameters through device measurement andmodelling It is also important to decide on the most important parameters in thedesign such as:
1 Measurement of the device under the actual operating conditions
including the correct RF power levels
2 Correct impedance matching at the input and orrect load network
optimisation for the relevant operating conditions incorporating the effect
of large signal feedback
3 Both CW and pulsed measurements and designs
4 Measurement for optimum power out and efficiency
These load pull techniques also incorporate jigs which enable accurate large signalmodels to be developed These models can then be used in a more analytical way
to design an amplifier as illustrated in the design example
A system for making load pull measurements is shown in Figure 6.1 and offersboth CW and pulsed measurements The system consists of a signal generator and
Trang 3a directional coupler on the input side of the device jig The directional couplermeasures both the incident and reflected power with a typical coupling coefficient
of -around -20dB dB Note the signal generator often incorporates an isolator toprevent source instability and power variation as the load is varied
Figure 6.1 Large signal measurement set-up
The signals are then applied to a three stage jig capable of being split into threeparts as shown in Figure 6.2 This jig includes an input matching network, a deviceholder and an output matching network and can be split after the measurement
The matching networks could include microstrip matching networks, LC matching
networks and transmission line tuneable stub matching networks The printedmatching networks are varied using silver paint
M a tc h in g n e tw o rk s
M IC R O S T R IP L IN E
Figure 6.2 Three piece large signal jig
The output of the amplifier jig is connected to a power detector In fact thepower detector for either the input or output of the directional coupler could
Trang 4consist of a modern spectrum analyser Most modern analysers are capable of both
CW and pulsed power measurements
The procedure is as follows:
1 Bias the device and allow to stabilise Monitor temperature and ensure
adequate heat sinking Use forced air cooling or water cooling ifnecessary
2 Monitor the current provided as this is important to prevent device
damage and for calculation of efficiency
3 Apply an input signal to the amplifier and adjust the input and output
matching networks iteratively using either silver paint or trimmercapacitors or sliding stub tuners These should be adjusted to obtain bothlow reflected power from the input and the required output power andefficiency Note that this is an iterative process and it is quite possible toobtain non optimum maxima The variable matching networks should also
be arranged to offer a reasonable tuning range of impedance
4 Now split the jig and while terminating the input and output in 50Ω
measure the impedance into the jigs from the device end (A or B) Forgood input match this reverse impedance is the complex conjugate of theamplifier input impedance Note however that the impedance looking intothe output jig (from the device) is not necessarily a match but it is thecorrect load impedance to obtain the required output power, gain andefficiency
5 Now redesign the input and output matching networks to obtain all the
required components centred on reasonable values and then test theamplifier again Also remove any external stubs that were used byincorporating their operation into the amplifier matching networks Notethat the losses in the initial matching network may have been significant
so the second iteration may produce slightly different results
6 Test for stability by varying the bias and supply voltage over the full
operating range and by applying a variable load network capable ofvarying the impedance seen by the amplifier
Note that it is also possible to use a similar test jig with 50Ω lines to measure
the small signal S parameters while varying the bias conditions and thereby deduce
a large signal equivalent circuit model This is used in the design example given to
Trang 5produce an efficient broadband power amplifier Although the techniques areapplied to a Class E amplifier they are equally applicable to any of the amplifierclasses.
on DC and small signal S parameter measurements, to allow more detailed analysis
of the Class E amplifier The non-linearities incorporated in the model include thenon-linear transconductance of the device, including the reverse biased diodeinherent in the MOS structure, and non-linear feedback and output capacitors Thetechnique used to develop this model can be applied to other non-linear devices.Close correlation is shown between experimental and CAD techniques at 150MHz CAD techniques for rapidly matching the input impedance of the non-linearmodel are also presented
In real switching amplifiers there are three main loss mechanisms:
1 The non-zero on-resistance of the switching device
2 The simultaneous presence of large voltages and currents during the
switching transitions
Trang 63 The loss of the energy stored in the parasitic shunt capacitance of the
switching device at switch-on
The losses caused by the resistance can be reduced by ensuring that the resistance is considerably less than the load resistance presented to the switchingdevice
on-The switching transition losses can be reduced by choosing a device with a fastswitching time Efficiency can be further increased if the overlap of the voltageand current waveforms can be reduced to minimise the power losses during theswitching transitions The loss of the energy stored in the shunt capacitance atswitch-on (½CV2) can be reduced by choosing a device with a low parasitic shuntcapacitance At VHF even a small parasitic shunt capacitance can result in largelosses of energy The requirement to discharge this capacitor at switch-on alsoimposes secondary stress on the switching device
6.3.3 ClassE Amplifiers
The Class E amplifier proposed by the Sokals [7] [8] [9] and further analysed byRaab [10] [11] is designed to avoid discharging the shunt capacitance of theswitching device and to reduce power loss during the switching transitions This isachieved by designing a load network for the amplifier, which determines thevoltage across the switching device when it is off, to ensure minimum losses.Typical Class E amplifier waveforms are shown in Figure 6.3
Figure 6.3 Class E amplifier voltage and current waveforms
Trang 7The design criteria for the voltage are that it:
1 Rises slowly at switch-off
2 Falls to zero by the end of the half cycle
3 Has a zero rate of change at the end of the half cycle
A slow rise in voltage at switch-off reduces the power lost during the switch offtransition Zero voltage across the switching device at the end of the half-cycleensures that there is no charge stored in the parasitic shunt capacitance when itturns on, so that no current is discharged through the device Zero rate of change atthe end of the half cycle reduces power loss during a relatively slow switch-ontransition by ensuring that the voltage across the switching device remains at zerowhile the device is switching on
The circuit developed by the Sokals (Figure 6.4) uses a single switching device
(BJT or FET) and a load network consisting of a series tuned LC network (L2, C2)
an RF choke (L1) and a shunt capacitor (C1) which may be partly or wholly made
up of the parasitic shunt capacitance of the switching device
Figure 6.4 Basic Class E amplifier
The RF choke (L1) is sufficiently large to provide a constant input from the
power supply The series LC circuit (L2, C2) is tuned to a frequency lower than theoperating frequency and can be considered, at the operating frequency, as a seriestuned circuit in series with an extra inductive reactance The tuned circuit ensures asubstantially sinusoidal load current (Figure 6.5) and the inductive reactance
Trang 8causes a phase shift between this current and the fundamental component of theapplied voltage The difference between the constant input current and thesinusoidal load current flows through the switching device when it is on and
through the shunt capacitor (C1) when it is off The capacitor/switch current istherefore also sinusoidal; however, it is now 180° out of phase with respect to theload current and contains a DC offset to allow for the current flowing through the
RF choke (L1)
Figure 6.5 Class E current waveforms F c = 147 MHz
As the voltage across the switching device when it is off is the integral of the
current through the shunt capacitor (C1), the phase shift introduced by the LCcircuit adjusts the point at which the current is diverted from the switch to thecapacitor This ensures that the voltage waveform (Figure 6.5) meets the criteriafor Class E operation by integrating the correct portion of the offset sinusoidalcapacitor current This point is determined by ensuring that the integral of thecapacitor current over the half-cycle is zero and that the capacitor current hasdropped to zero by the end of the half-cycle
Owing to the fact that the LC series tuned circuit is tuned to a frequency which
is lower than the operating frequency, the conventional Class E amplifier has ahighly frequency dependent amplitude characteristic (Figure 6.6) It is this change
of impedance which prevents optimum Class E operation from being achievedover a wide bandwidth
Trang 9Figure 6.6 Narrow band Class E amplifier frequency response
6.3.4 Broadband Class E Amplifiers
To enable the design of broadband Class E amplifiers [14] a closer examination ofthe voltages and currents of the narrow band amplifier is required (Figure 6.5) Asthe voltage across the switch is defined by the integral of the current flowing
through the shunt capacitor (C1), and as the AC component of this current also
flows through the series LC circuit (L2, C2) when the switch is off, then the loadangle of the series tuned circuit defines the optimum angle for producing thecorrect voltage waveform This load angle defines the phase shift between thefundamental components of the voltage across the switch and the current flowing
through the series tuned circuit (L2, C2) In the basic Class E amplifier circuit theharmonic impedance of the series tuned circuit is assumed to be high because of its
Q The value of the shunt capacitor (C1) must also be correct to produce the correctvoltage when the switch is off and to satisfy the steady state conditions The loadangle of the total network is also therefore important
Simulation and analysis of an ideal narrow band circuit (Figure 6.6) shows thatthe load angle of the off-tuned series tuned circuit should be 50°and the angle ofthe total circuit should be 33°
If the load network is designed without incorporating a shunt capacitor a simplebroadband network can be designed This should be designed with a greater loadangle (50°), which reduces to the required 33° when a shunt capacitor is added.The slope in susceptance with frequency caused by this capacitor is removed asdescribed later
Trang 10A circuit capable of presenting a constant load angle over a very largebandwidth is shown in Figure 6.7 and its susceptance diagram in Figure 6.8.
Figure 6.7 Broadband load angle network
Figure 6.8 Susceptance of broadband circuit
The circuit consists of a low Q series tuned circuit in parallel with an inductor.
At the resonant frequency of the tuned circuit the slope of its susceptance curve isdesigned to cancel the slope of the susceptance curve of the inductor This allowsthe circuit to maintain a constant susceptance over a wide bandwidth An analysis
of this circuit is given in Section 6.3.9 at the end of this chapter and it is shown thatoptimum flatness can be achieved when:
Trang 11The load network impedance at the harmonics should be purely reactive to ensure
no losses in the load network The impedance should also be fairly high to ensurethat the integral of the current through the shunt capacitor, and hence the currentthrough the capacitor, should be similar to that in the narrow band circuit to meetthe criteria for Class E operation It should also be high to avoid harmonic powerbeing dissipated in the on-resistance of the switching device
To reduce the power output at the harmonics this circuit was combined with abroadband matching network and a third order bandpass filter to produce a circuitwhich presented a load angle of 50° over the band 130MHz to 180 MHz The filterwas based on a Chebyshev low pass filter design, obtained from Zverev [12],which had been converted to a bandpass filter The matching network wasarranged to increase the output power of the amplifier by decreasing the loadpresented to the device The final network was designed to deliver 12 W into a
50Ω load using a 12V power supply This network can be considered as the
broadband equivalent of the off-tuned series LC circuit of the simple Class E
amplifier, which presents a load angle of 50° at the operating frequency
When the shunt capacitor is added to this network a slope in susceptance isintroduced owing to the capacitor’s frequency dependence A slope was thereforeplaced on the impedance curve of the network using a CAD AC optimisationpackage so that when the shunt capacitance was included in the network itpresented a constant 33° load angle and a constant magnitude of input impedance
of 12Ω over the band 130 MHz to 180 MHz The impedance of the load networkwithout the capacitor now has a load angle of 50° in the middle of the band whichslightly increases at higher frequencies and slightly reduces at lower frequencies.During AC optimisation it was found that a number of components could beremoved without degrading the performance The final network and its impedanceare shown in Figures 6.9 and 6.10
Trang 12Figure 6.9 Broadband load network
Figure 6.10 Broadband load network impedance
The broadband amplifier was then simulated in the time domain (Figures 6.11and 6.12) using a switch with the following characteristics:
1 1Ω on-resistance
2 1 MΩ off-resistance
3 1 ns switching time
Trang 13Figure 6.11 Broadband Class E amplifier current waveforms
Figure 6.12 Broadband Class E amplifier voltage and current waveforms
The simulation showed that the amplifier, with a 12 V supply, was capable ofdelivering 12W (11dBW) into a 50Ω load with 85% efficiency over the band130MHz to 180 MHz (Figures 6.13 and 6.14) A discrete fourier transform showed