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Lecture Fundamentals of control systems: Chapter 9 - TS. Huỳnh Thái Hoàng

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Lecture "Fundamentals of control systems - Chapter 9: Design of discrete control systems" presentation of content: Introduction, discrete lead - lag compensator and PID controller, design discrete systems in the Z domain,.... Invite you to reference.

Trang 1

Lecture Notes

Fundamentals of Control Systems

Instructor: Assoc Prof Dr Huynh Thai Hoang

Department of Automatic Control Faculty of Electrical & Electronics Engineering

Ho Chi Minh City University of Technology

Email: hthoang@hcmut.edu.vn

huynhthaihoang@yahoo.com

Trang 2

Chapter 9

DESIGN OF DISCRETE CONTROL SYSTEMS

Trang 3

 Introduction

Content

 Introduction

 Discrete lead – lag compensator and PID controller

 Design discrete systems in the Z domain

 Design discrete systems in the Z domain

 Controllability and observability of discrete systems

 Design state feedback controller using pole

placement

 Design state estimator

 Design state estimator

Trang 4

Discrete lead lag compensators

and PID controllers

Trang 5

 State feedback control

 State feedback control

+

C

) ( )

( )

1

+x(k  1 )  A d x(k)  B d u(k) C d

Trang 6

Transfer function of discrete difference term

u(k)

e(k)

D

u(k) e(k)

e kT

e kT

u ( )  ( )  [(  1 ) ]

T

z E z

z

E z

z

GD ( ) 

Trang 7

Transfer function of discrete integral term

t

 ( ))

(

 Continuous integral:u t   ed

0

)()

T k

)()

Trang 8

Transfer function of discrete PID controller

 Continuous PID controller:

s K

K K

z

z T

K z

z T

K K

z

1

1 2

K z

z T

K K

Trang 9

Digital PID controller

z T

K K

z

U z

1

1 2

) (

)

( )

) (

) ( )

( )

z T

z z

PID

1 2

) (

) (

)]

1 (

) ( [ )

1 (

K

k e k

e K

k u k

u

D I

P

Trang 10

Digital PID control programming

float PID control(float setpoint float measure)

Note: Kp, Ki, Kd, uk, uk_1, ek, ek_1, ek_2 must be declared as

global variables; uk 1, ek 1 and ek e must be initialized

to be zero; umax and umin are constants

Trang 11

TF

TF of discrete phase lead/lag compensator of discrete phase lead/lag compensator

 Continuous phase lead/lag compensator:

a

s K s

GC

 )

) 2

( )

K

G

) 2 (

) 2 (

) (

)

( )

bT

K z

GC

) 2

) 2 (

) 2

) 2

Trang 12

Approaches to design discrete controllers

Indirect design: First design a continuous controller, then discretize the controller to have a discrete control system The performances of the obtained discrete control system are approximate those of the continuous control system provided y p that the sample time is small enough.

Direct design: Directly design discrete controllers

in Z domain.

Methods: root locus, pole placement, analytical

method, … ,

Trang 13

D i di t t ll i th Z d i

Design discrete controllers in the Z domain

Trang 14

Procedure for designing discrete lead compensator using the RL

) (

)

C

C C

p z

z

z K

Step 1: Determine the dominant poles from desired

transient response specification:

* 2 , 1

(POT) Overshoot

*

Ts

e z

e z

    zTn 1  

Trang 15

Procedure for designing discrete lead compensator using the RL

Step 2: Determine the deficiency angle so that the

dominant poles lie on the root locus of the system after compensated:

* 2 , 1

) arg(

poles from

ngles

Trang 16

Procedure for designing discrete lead compensator using the RL

Step 3: Determine the pole & zero of the lead compensator

Step 3: Determine the pole & zero of the lead compensator

Draw 2 arbitrarily rays starting from the dominant pole such that the angle between the two rays equal to * The

* 1

z

intersection between the two rays and the real axis are the

positions of the pole and the zero of the lead compensator

Two methods often used for drawing the rays:

 Bisector method

 Pole elimination method

Step 4: Calculate the gain K C using the equation:

1 )

( ) ( z G z

1

z z

C z G z G

Trang 17

Design discrete lead compensator using RL

Design discrete lead compensator using RL – – Example Example

50 )

(

s s

s

Design the compensator G C (z) so that the compensated system

has dominant poles with   0 707, (rad/sec)n  10

Trang 18

Design discrete lead compensator using RL

Design discrete lead compensator using RL – – Example (cont’) Example (cont’)

Solution:

50 )

z

) (

s s

50 )

1

s s

) 1 (

5

)]

5 0 1

( )

1 5

0

[(

) 1

(

5 0 5

0 5

0 1

e z

z

e e

z e

z z

) 1 (

)

e z z

a a

0 )(

1 (

) (

z z

G

Trang 19

Design discrete lead compensator using RL

Design discrete lead compensator using RL – – Example (cont’) Example (cont’)

 The desired poles: z*  rej

2 , 1

where

493

0

10 707 0 1

e e

r Tn

where

707

0 707

0 1

10 1

0

1 0 493 e j

320

0 375

0

* 2 ,

Trang 20

Design discrete lead compensator using RL

Design discrete lead compensator using RL – – Example (cont’) Example (cont’)

 The deficiency angle Im z

3 2

1

*

)(

Trang 21

Design discrete lead compensator using RL

Design discrete lead compensator using RL – – Example (cont’) Example (cont’)

 Determine the pole and the zero of the compensator

 Determine the pole and the zero of the compensatorusing the pole elimination method:

607

0

z C

607

OA

p C   

607

0

OB

578

0

AB

029

Trang 22

Design discrete lead compensator using RL

Design discrete lead compensator using RL – – Example (cont’) Example (cont’)

 C l l t th i K G ( G ) ( ) 1

Calculate the gain K C: GC ( z ) G ( z ) z z*  1

1

)18.021

.0()607

0)(

1(

)029

z K

]180)

3200

3750

(210

1)

1320

.0375

.0)(

029

0320

.0375

.0(

]18.0)

320

0375

.0(21.0[

j

K C

1702

.0471

0

267

024

1)

G

Conclusion: The TF of the lead compensator is:

029

0

24.1)

(

z z

G C

Trang 23

Design discrete lead compensator using RL

Design discrete lead compensator using RL – – Example (cont’) Example (cont’)

Root locus of the Root locus of the

Trang 24

Procedure for designing discrete lag compensator using the RL

z

z

)(

)

C

C C

p z

z

z K s

The discrete lag compensator:

Step 1: Denote  1 p C Determine  to meet the steady

Step 1: Denote Determine  to meet the state error requirement:

Step 2: Chose the zero of the lag compensator: zC   1

Step 3: Calculate the pole of the compensator:

)1

()

( z* 

C z GH z G

Trang 25

Design discrete lag compensator using RL

Design discrete lag compensator using RL – – Example Example

(

Design the lag compensator G C (z) so that the compensated

) 5 (

) (

s s

Trang 26

Design discrete lag compensator using RL

Design discrete lag compensator using RL – – Example (cont’) Example (cont’)

( 1 Z

) 5 (

50 )

(

s s

s G

50 )

1

s s

( 10

5 0 5

0 5

0

) 1 (

5

)]

( )

[(

) 1

(

e z z

0 )(

1 (

) (

z z

z G

) (

) 1 (

)

e z z

a a

Trang 27

Design discrete lag compensator using RL

Design discrete lag compensator using RL – – Example (cont’) Example (cont’)

 The characteristic equation of the uncompensated system:

 The characteristic equation of the uncompensated system:

0 )

(

1  G z

)607

0)(

1(

18.021

z

))(

(

 Poles of the uncompensated system:

547

0699

.0

2 ,

z  

Trang 28

Design discrete lag compensator using RL

Design discrete lag compensator using RL – – Example (cont’) Example (cont’)

(lim

18.021

0)

1(li

0)(

1(

)1

(

lim1

.0

0

  0,099

Trang 29

Design discrete lag compensator using RL

Design discrete lag compensator using RL – – Example (cont’) Example (cont’)

Step 2: Chose the zero of the lag compensator:

Step 2: Chose the zero of the lag compensator:

Chose: z C  0.99

Step 3: Calculate the pole of the lag compensator:

)1

0

99,

0)

z

G C C

Step 4: Determine the gain of the compensator

1)

()( z* 

z

C z G z G

1)

607

0)(

1(

)18.021

.0()999

0(

)99.0(

z z

z K

Trang 30

Design discrete lag compensator using RL

Design discrete lag compensator using RL – – Example (cont’) Example (cont’)

Root locus of the uncompensated system

Root locus of the compensated system uncompensated system compensated system

Trang 31

Design discrete PID controller using analytical method

10)

Trang 32

Design discrete PID controller using analytical method

 The controller to be designed is a PI controller (to meet

 The controller to be designed is a PI controller (to meetthe requirement of zero error to step input):

1)

( K I T z

1

12

)(

K K

z

G C P I

 The discrete TF of the open-loop system:

 The discrete TF of the open-loop system:

(

05.0

10)

1( z 1 Z

11

)1

(05

0)

1

2

0 1

K z

z T

K K

z

1

12

1(

1.0

0)

0(

)(

z

z GH

Trang 33

Design discrete PID controller using analytical method

 The characteristic equation of the closed-loop system:

 The characteristic equation of the closed-loop system:

0 )

( )

(

1  G C z GH z

0 819

0

091 0 1

1 2

z T K

K P I

0 )

819 0 091

0 091

0 ( )

819

1 091

0 091

0 (

Trang 34

Design discrete PID controller using analytical method

 The desired poles: z1,2  rej

2 707 0 2

T

where

059

0

2 707 0

2707

.012

0056

.0

*

2 ,

z   

 The desired characteristic equation:

 The desired characteristic equation:

0)

018

0056

.0)(

018

0056

.0

2

z2  0.112z  0.0035  0

Trang 35

Design discrete PID controller using analytical method

 Balancing the coefficients of the system characteristic

 Balancing the coefficients of the system characteristic

equation and the desired characteristic equation, we have:

0819

.0091

.0091

.0

112

0819

.1091

.0091

.0

I P

I P

K K

K K

09.15

I

P

K K

1

113

.609

.15)

G C

Conclusion

0 )

819 0 091

0 091

0 ( )

819 1 091

0 091

0 (

2  K PK Iz   K PK I  

z

Trang 36

Design of discrete control systems es g o d sc ete co t o syste s

in state space domain

Trang 37

) ( )

( )

1 (

k k

y

k u k

k

d

d d

x C

B x

A

x

 The system is complete state controllable if there exists

 The system is complete state controllable if there exists

an unconstrained control law u(k) that can drive the

system from an initial statey x(k( 00)) to a arbitrarily final y

state x(k f) in a finite time interval k0  k k f Qualitatively, the system is state controllable if each state variable can

be influenced by the input

be influenced by the input

Trang 38

) ( )

( )

1 (

k k

y

k u k

k

d

d d

x C

B x

Note: we use the term “controllable” instead of

“complete state controllable” for short.

Trang 39

Discrete state feedback control

( )

1 (k A d x k B d u k

(

) ( )

( )

1 (

k k

k u k

C

B x

A x

 Consider a system described by the state-space equation:

 The state feedback controller: u ( k )  r ( k )  Kx ( k )

y ( k )  Cd x ( k )

x ( k  1 )  [ AB K ] x ( k )  B r ( k )

 The state equation of the closed-loop system:

) ( )

( ] [

) (

Trang 40

Pole placement method

If the system is controllable then it is possible to

If the system is controllable, then it is possible to

determine the feedback gain K so that the closed-loop

system has poles at any location

Step 1: Write the characteristic equation of the loop systemp y det[ det[ z I IA A   B B K K ] ]   0 0 (1)

closed-d d

Step 2: Write the desired characteristic equation:

0 )

) 1

pi  are the desired poles

(2), we can find the state feedback gain K

Trang 41

Discrete pole placement design

Discrete pole placement design – – Example 1 Example 1

 Given the control system:

 Given the control system:

+

r(k) u(k)

C y(k)

) ( )

( )

1 (k A d x k B d u k

K

) ( )

( )

0 0

316

0

092

Trang 42

Discrete pole placement design

Discrete pole placement design – – Example 1 (cont’) Example 1 (cont’)

 The closed-loop characteristic equation:

 The closed-loop characteristic equation:

0 ]

d d

z

092 0

316 0

1 0

316

0

092

0 368

0 0

316

0 1

1 0

z

0 316

0 368

0 316

0

092

0 316

0 092

0

1 det

2 1

k

k k

092 0

316 0

( 316 0

) 316

0 368

0 )(

092

0 1

k z

k z

368

0 0

d

B

A

) 368

1 316

0 092

0

092

0 316

0 ( 316

0

d

B

0 )

368

0 316

0 066

0 (

Trang 43

Discrete pole placement design

Discrete pole placement design – – Example 1 (cont’) Example 1 (cont’)

 The desired poles: *  j

 The desired poles: z1,2  rej

493

0

10 707 0 1

e e

r Tn

where:

707

0 707

0 1

10 1

0

707 0

493

02

320

0 375

0 )(

320

0 375

0

Trang 44

Discrete pole placement design

Discrete pole placement design – – Example 1 (cont’) Example 1 (cont’)

 Balancing the coefficients of the system characteristic

 Balancing the coefficients of the system characteristic

equation and the desired characteristic equation, we have:

0 )

368

0 316

0 066

0 (

75 0 )

368

1 316

0 092

0 (

2 1

2 1

k k

k k

1

12 3

2

1

k k

Conclusion: K   3 12 1 047 

0)

368

0316

.0066

.0()

368

1316

.0092

.0

z

0 243

0 75

0

2  z  

z

Trang 45

Discrete pole placement design

Discrete pole placement design – – Example 2 Example 2

 Given the control system:

 Given the control system:

1 Write the state equations of the discrete open loop system

2 Determine the state feedback gain K = [k1 k2] so that the closed loop system has a pair of complex poles wit h =0 5 closed loop system has a pair of complex poles wit h =0.5 ,

n=8 rad/sec.

Trang 46

Discrete pole placement design

Discrete pole placement design – – Example 2 (cont’) Example 2 (cont’)

Solution:

Solution:

1 Write the state equations of the discrete open loop system

Step 1: State space equations of open loop continuous system:

s

X s

(

2  s

s

U s

) ( )

1 s X s

sX x1(t) x2(t)

) ( )

( )

1 (sX2 sU R s

0 )

(

) ( 1

0

1 0

) (

)

1

t u

t x t

) ( 1

0 )

( 10 )

0 10 )

( 10 )

t x

t x t

1

Trang 47

Discrete pole placement design

Discrete pole placement design – – Example 2 (cont’) Example 2 (cont’)

Step 2: Transient matrix:

Step 2: Transient matrix:

) (ss IA -

1

1 0

1 0

1 0

) 1 (

) (

s

s s s

s

)]

( [ )

1 1

1

1

s s

( 1

Trang 48

Discrete pole placement design

Discrete pole placement design – – Example 2 (cont’) Example 2 (cont’)

Step 3: State space equation of the open loop system:

Step 3: State space equation of the open loop system:

(

) ( )

( )

1 (

k k

c

k u k

k

d

d d

x C

B x

A x

1 0

0

) 1

0

095

0 1

0

) 1

(

1 )

t t

0

1 0

Trang 49

Discrete pole placement design

Discrete pole placement design – – Example 2 (cont’) Example 2 (cont’)

2 Calculate the state feedback gain K:

2 Calculate the state feedback gain K:

The closed loop characteristic equation:

0 ]

det[ IAB K

d d

z

 

005 0

095 0

1 0

0

005

0 905

0 0

095

0 1

1 0

z

0 095

0 905

0 095

0

005

0 095

0 005

0

1 det

2 1

k

k k

z

0 )

005

0 095

0 ( 905

0 )

095

0 905

0 )(

005

0 1

Trang 50

Discrete pole placement design

Discrete pole placement design – – Example 2 (cont’) Example 2 (cont’)

Th d i d d i t l *  j

The desired dominant poles: z1 , 2  rej

67 0

8 5 0 1

e e

r Tn

67 0

e e

r

693

0 5

0 1

8 1

0

02

516 0

0 516

.

02

428

0 516

0 )(

428

0 516

0

0 448

0 03

1

z

Trang 51

Discrete pole placement design

Discrete pole placement design – – Example 2 (cont’) Example 2 (cont’)

Balancing the coefficients of the closed loop characteristic

Balancing the coefficients of the closed loop characteristic

equation and the desired characteristic equation, we have:

0 )

905

0 095

0 0045

0 (

03 1 )

905

1 095

0 005

0 (

2 1

2 1

k k

k k

6

0 44

905

0 095

0 0045

0 ( )

905

1 095

0 005

0

2  kkzkk  

z

Trang 52

Discrete pole placement design

Discrete pole placement design – – Example 2 (cont’) Example 2 (cont’)

3 Calculate system response and performances:

State space equation of the closed-loop system:

(

) ( )

( )

1 (

k k

c

k r k

k

d

d d

d

x C

B x

K B

A x

Student continuous to calculate the response and

performance by themselves following the method

performance by themselves following the method

presented in the chapter 8

Trang 53

D i f di t t t ti t

Design of discrete state estimators

Trang 54

The concept of state estimation

 To be able to implement state feedback control

 To be able to implement state feedback control

system, it is required to measure all the states of the system

from the output measurement.

 State estimator (or state observer) ( )

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