Lecture Operating systems: Internals and design principles (6/E): Chapter 1 - William Stallings

Chapter 1 Computer system overview. After studying this chapter, you should be able to: Describe the basic elements of a computer system and their interrelationship, eplain the steps taken by a processor to execute an instruction, understand the concept of interrupts and how and why a processor uses interrupts,...

Chapter 1 Computer System Overview

Patricia Roy Manatee Community College, Venice, FL

Operating System

more processors

devices

Basic Elements

– Two internal registers

• Memory address resister (MAR)

– Specifies the address for the next read or write

• Memory buffer register (MBR)

– Contains data written into memory or receives data read from memory

Basic Elements

– I/O address register

– I/O buffer register

Computer Components:

Top-Level View

Processor Registers

– Enable programmer to minimize main memory references by optimizing register use

– Used by processor to control operating of the processor

– Used by privileged OS routines to control the execution of programs

User-Visible Registers

programs and system programs

– Stack pointer: Points to top of stack

Control and Status Registers

– Contains the address of an instruction to be fetched

• Instruction register (IR)

– Contains the instruction most recently fetched

– Contains status information

Control and Status Registers

– Bits set by processor hardware as a result of operations

– Example

• Positive, negative, zero, or overflow result

Basic Instruction Cycle

Instruction Fetch and Execute

memory

the instruction to be fetched next

Characteristics of a Hypothetical

Machine

Example of Program Execution

Classes of Interrupts

Program Flow of Control

Interrupt Stage

• If interrupt

– Suspend execution of program

– Execute interrupt-handler routine

Transfer of Control via Interrupts

Instruction Cycle with Interrupts

Program Timing: Short I/O Wait

Program Timing: Long I/O Wait

Simple Interrupt Processing

Changes in Memory and Registers for an Interrupt

Changes in Memory and Registers for an Interrupt

Sequential Interrupt Processing

Nested Interrupt Processing

execute

executed depend on their relative priority and whether they are waiting for I/O

control may not return to the program that was executing at the time of the interrupt

Memory Hierarchy

The Memory Hierarchy

Going Down the Hierarchy

memory by the processor

Cache and Main Memory

Cache Principles

memory

block of memory read into cache

• Because of locality of reference, it is likely that future memory references are in that block

Cache/Main-Memory Structure

Cache Read Operation

– Larger block size yields more hits until

probability of using newly fetched data

becomes less than the probability of reusing data that have to be moved out of cache

– Chooses which block to replace

– Least-recently-used (LRU) algorithm

Cache Principles

– Dictates when the memory write operation takes place

– Can occur every time the block is updated

– Can occur when the block is replaced

• Minimize write operations

• Leave main memory in an obsolete state

Programmed I/O

action, not the processor

the I/O status register

operation is complete

Interrupt-Driven I/O

• Processor is interrupted when I/O module ready to

exchange data

• Processor saves context of

program executing and

begins executing

interrupt-handler

Direct Memory Access

directly to or from memory

the transfer is complete