Điện tử viễn thông part 1 3 ghép kênh trung kế mạng trung kế khotailieu

Ghép kênh đồng bộ• All clocks derived from a single clock • Receiver clock derived from incoming signal • Transmitter clock for opposite direction derived from... ABX Analog / Digital Ma

TỔNG ĐÀI &

KỸ THUẬT CHUYỂN MẠCH

Chương 1: Lý thuyết tổng quan và cơ sở

TRƯỜNG ĐẠI HỌC ĐIỆN LỰC KHOA ĐIỆN TỬ - VIỄN THÔNG

Giảng viên: Phan Thị Thanh Ngọc

EPU - 2012III Ghép kênh trung kế - Mạng trung kế

ABX Analog / Digital

ABX Analog / Digital

+

420kHz

612kHz

Supergroup Group 1

X5

1

12

16 supergroups are multiplexed into one 960 channels trunk line

ABX Analog / Digital

A or  law logarithmic encoder

A or  law logarithmic decoder

11 or 12 8

Signaling : least significant bit stolen

once every 6 frames Signaling rate : 1.3 kb/s = 8000 / 6

Frame synchronization by bit 0

1 frame = 193 bit (= 24 * 8 + 1)

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Hệ thống Bell D2 Đồng bộ hóa đa khung bằng bit 0

m E1

m

0

m E2

m

0

m E3

m

1

m E4

m

0

m E5

m

1

m E6

m

1

TS1

TS2

TS3

TS4

TS22

TS23

TS24

8000 Hz

8 (17% are 7) 24

8000 Hz 8

32 30

2048 kb/s A

2 kb/s

4 + 64 kb/s

Ghép kênh đồng bộ

• All clocks derived from a single clock

• Receiver clock derived from incoming signal

• Transmitter clock for opposite direction derived from

ABX

Analog / Digital

Master Clock

» thermal dilatation of cables (10 -9 )

» adjustment of satellite position (300 km) – frequency shifts due to velocity changes

» dielectric properties of cables – frequency shifts due to Dopler effect

» for mobile communications

• Consequence : Need of Elastic Buffers

E.S.

Autonomous Clocks

• Single clock for entire world impossible

– Reliability – Political susceptibility

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Autonomous clocks

• However small, frequency differences will cause

over- or under-flows of the elastic stores.

• Over- and Under-flows are called "slips"

• Slips should affect entire frames, not bits

• Effect of slips are best studied with elastic stores

containing no more than than one data frame

E.S.

Write clock

Read clock

Capacity = 1 frame

Effect of Slips

Slip = double read frame duplicated

Write Clock

Read Clock fast

Slip = double write frame lost

Write Clock

Read Clock slow

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Slips

• Unavoidable if autonomous clocks

• Should miss or duplicate entire frames, not bits

• Cause little trouble with voice transmission

• Cause serious trouble with data transmission

– Missing or duplicated frame = 125 S phase shift.

– V29 (FAX) modem : Carrier = 1800 Hz, T = 556 S

– Phase error = (125 * 360) / 556 = 81 0

• Causes transmission error in signaling channels

• Requires multi-frame resynchronisation

• Clocks should be accurate enough to limit slips

– No more than one slip in 20 hours

– Clock accuracy > 1.7 10 -9

Ghép kênh đồng bộ của phần lớn các luồng dữ liệu đồng bộ

D C B A E

T

F

E S

T F D 1 0 R C Q B P A

1 Frame

S C

fout > n * MAX(fin)

Levels 0 and 1 : Strictly synchronous

Levels 2, 3 and 4 : plesiochronous

Bit rates in kb/s

CCITT level 2

Data rate = 8448 Mb/s, Frame = 848 bits, T ~ 100 S

Four 2048 kb/s are multiplexed (bit interleaving).

Frames not related to frames of multiplexed channels

A multiplexed frame contains 205 or 206 bits from each of

the multiplexed channels.

Minimal channel data rate = 2042 kb/s

Maximal channel data rate = 2052 kb/s

The stuffing control bits are transmitted 3 times

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CCITT level 2

1111010000XR

CCCC

CCCC

CCCC SSSS

200 data bits

208 data bits

208 data bits

204 data bits

212 data bits

Elastic Storefor removing clock jitter

explicitly present in the multiplexed stream

> Full demultiplexing required at each node !

Kiến trúc đồng bộ số

• Synchronous trunk network.

– Common clock or synchronized clocks

• Design principles

– Based upon 125 S frames

– Each frame caries payload and section overhead

– The payload itself is a set of Virtual Containers

– Virtual containers carry overhead and payload

– At the lowest level of this recursive structure, the

payload contains standard CEPT 2048 kb/s frames

• Compatibility, at the higher levels, with the North

American synchronous hierarchy, SONET.

Each individual byte represents

a synchronous 64 kb/s data flow

STM-1 virtual container

(VC4)

STM-1 Virtual Container VC4

(155.52 Mb/s serial signal)

Section overhead

Each tributary = One CEPT 2048 b/s frame + overhead

A VC4 can carry 63 * 30 = 1890 telephone circuits

Các vòng SDH

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Đồng bộ khung SDH