DSP-Lec 02-Quantization

Quantization process –Quantization error ™ Quantization by rounding: replace each value xnT by the nearest q antization le el quantization level.. ™ Quantization by truncation: replace e

Chapter 2

Quantization

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Ha Hoang Kha, Ph.D.

Ho Chi Minh City University of Technology Email: hhkha@hcmut.edu.vn @

1 Quantization process

Fig: Analog to digital conversion

™ The quantized sample x Q (nT) is represented by B bit, which can take

2 B possible values

2 possible values

™ An A/D is characterized by a full-scale range R which is divided

into 2B quantization levels Typical values of R in practice are

between 1-10 volts

1 Quantization process

Fig: Signal quantization

™ Quantizer resolution or quantization width

2B

R

™ A bip l ADC R ≤ x nT( ) < R

™ A bipolar ADC ( )

2 x nT Q 2

™ A unipolar p ADC 0 ≤ x nT Q Q( ) < R

1 Quantization process –Quantization error

™ Quantization by rounding: replace each value x(nT) by the nearest

q antization le el

quantization level

™ Quantization by truncation: replace each value x(nT) by its below

( ) Q( ) ( )

quantization level

™ Quantization error: Q

™ Consider rounding quantization:

e

Fig: Uniform probability density of quantization error

1 Quantization process –Quantization error

™ The mean value of quantization error

1

Q

™ The mean-square error (power)

( )

Q

σ = = ∫ = ∫ =

™ The mean square error (power)

( )

12

Q

σ

™ Root mean square (rms) error: 2 Q

™ Root-mean-square (rms) error:

12

rms

™ R and Q are the ranges of the signal and quantization noise, then the Q g g q , signal to noise ratio (SNR) or dynamic range of the quantizer is

defined as

⎛ ⎞

20 log 20 log (2 )B log (2) 6

dB

R

Q

⎛ ⎞

⎝ ⎠

which is referred to as 6 dB bit rule

which is referred to as 6 dB bit rule

1 Quantization process –Example

™ In a digital audio application, the signal is sampled at a rate of 44

KHz and each sample quantized using an A/D converter having a full-scale range of 10 volts Determine the number of bits B if the rms quantinzation error mush be kept below 50 microvolts Then

rms quantinzation error mush be kept below 50 microvolts Then, determine the actual rms error and the bit rate in bits per second

2 Digital to Analog Converters (DACs)

™ We begin with A/D converters, because they are used as the building blocks of s ccessi e appro imation ADCs

blocks of successive approximation ADCs

Fig: B-bit D/A converter

™ Vector B input bits : b=[b1, b2,…,bB] Note that bB is the least

significant bit (LSB) while b1 is the most significant bit (MSB)

™ For unipolar signal, xQ є [0, R); for bipolar xQ є [-R/2, R/2)

2 DAC-Example DAC Circuit

Rf

∑ I i

™ Full scale R=VREF, B=4 bit

16Rf 8Rf

4Rf

2Rf xQ =Vout

MSB

LSB

MSB

Fig: DAC using binary weighted resistor

-VREF

3

REF

b

∑

b

b b b

⎛ 1 2 3 4 ⎞

2 4 8 16

b

b b b

x =V = I R⋅ =V ⎛ + + + ⎞

∑

Q

x Q = R − (b1 − +b2 − + b3 − +b4 ) (= Q b Q 1 − + b2 − +b3 − + b4 )

2 D/A Converters

™ Unipolar natural binary 1 2

( 2 2 2 )B

where m is the integer whose binary representation is b=[b1, b2,…,bB]

m = b12 − +b22 − + + b B2

™ Bipolar offset binary: obtained by shifting the xQ of unipolar natural binary converter by half-scale R/2:

( 2 2 2 )B

™ Two’s complement code: obtained from the offset binary code by

complementing the most significant bit, i.e., replacing b1 by

2

B

R

1 1 1

2

Q

2 D/A Converters-Example

™ A 4-bit D/A converter has a full-scale R=10 volts Find the quantized

l l f h f ll

analog values for the following cases ?

a) Natural binary with the input bits b=[1001] ?

b) Offset binary with the input bits b=[1011] ?

) T ’ l bi i h h i bi b [1101] ?

c) Two’s complement binary with the input bits b=[1101] ?

3 A/D converter

™ A/D converters quantize an analog value x so that is is represented

b B bits b=[b b b ]

by B bits b=[b1, b2,…,bB]

Fig: B-bit A/D converter

3 A/D converter

™ One of the most popular converters is the successive approximation A/D con erter

Fig: Successive approximation A/D converter

™ After B tests, the successive approximation register (SAR) will hold the correct bit vector b

3 A/D converter

™ Successive approximation algorithm

where the unit-step function is defined by ( ) 1 0

if x

u x

if x

≥

⎧

= ⎨ <

⎩

This algorithm is applied for the natural and offset binary with

truncation quantization q

3 A/D converter-Example

™ Consider a 4-bit ADC with the full-scale R=10 volts Using the

s ccessi e appro imation algorithm to find offset binar of

successive approximation algorithm to find offset binary of

truncation quantization for the analog values x=3.5 volts and x=-1.5 volts

v

3 A/D converter

™ For rounding quantization, we

shift b Q/2

™ For the two’s complement code the sign bit b is treated shift x by Q/2: code, the sign bit b1 is treated

separately

3 A/D converter-Example

™ Consider a 4-bit ADC with the full-scale R=10 volts Using the

s ccessi e appro imation algorithm to find offset and t o’s

successive approximation algorithm to find offset and two’s

complement of rounding quantization for the analog values x=3.5 volts

v

™ Problems 2.1, 2.2, 2.3, 2.5, 2.6