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Nội dung

Metal Oxide Silicon FET MOSFET There are two basic types of MOSFET - Depletion-type MOSFET D-MOSFET - Enhancement-type MOSFET E-MOSFET  The gate terminal of a MOSFET is insulated from

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• DC and AC load line analysis

• FET amplifier configurations and design

• FET applications

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 An FET (field-effect transistor) operates on either electrons or holes flow. Hence it

is a unipolar transistor, i.e single-type of current carriers

 Whereas a BJT is a current controlled device , a FET is a voltage controlled device

 It has an extremely high input resistance (in the order of 107 to 1012)

 It requires virtually no input (gate) current IG = 0 A

 Also used as amplifier and logic switches

 It is preferred over BJT as the input stage of a multi-stage amplifier.

 FETs generate low noise and are more temperature stable than BJTs (It does not depend on electron-hole pair for current conduction.)

 Therefore they are more suitable for amplification of very small signals

 As there is no minority carrier storage time (no p-n junction recovery time) for FETs, they are widely used (very popular indeed) in switching applications.

Introduction of FET

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FET analogy, bias, and currents

The source of water pressure can be

likened to the applied voltage from drain to source that will

establish a flow of water (electrons) from the spigot (source)

The “gate" through an applied signal

(potential), controls the flow of water (charge) to the "drain”

The drain and source terminals are at opposite ends or the n-channel as

introduced in Figure

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Introduction of FET

There are two major types of FETs.

(a) Junction FET (JFET), and (b) Metal Oxide Semiconductor (or silicon) FET (MOSFET)

(i) Depletion-type MOSFET (D-MOSFET) (ii) Enhancement-type MOSFET (E-MOSFET), and (iii) Vertical MOSFET (VMOS).

Each type can be further classified into n-channel or p-channel MOSFETs.

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Major Types of FETs

FET

p-channel n-channel Depletion Type Enhancement Type

p-channel n-channel Conventional

p-channel n-channel p-channel n-channel

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Metal Oxide Silicon FET (MOSFET)

There are two basic types of MOSFET

- Depletion-type MOSFET (D-MOSFET)

- Enhancement-type MOSFET (E-MOSFET)

The gate terminal of a MOSFET is insulated from its channel region by the Silicon Oxide (SiO2) layer.

MOSFET is also called an Insulated-Gate FET (IGFET)

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FET Properties

• Advantages:

– High input impedance (M )

(Linear AC amplifier system)

– Temperature stable than BJT

– Smaller than BJT

– Can be fabricated with fewer processing

– BJT is bipolar – conduction both hole and electron

– FET is unipolar – uses only one type of current carrier

– Less noise compare to BJT

– Usually use as logic switch

• Disadvantages

– Easy to damage compare to BJT

7

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8

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JFET Fundamentals

9

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• There are 2 types of JFET

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• N channel JFET:

– Major structure is n-type material (channel) between

embedded p-type material to form 2 p-n junction.

– In the normal operation of an n-channel device, the Drain (D) is positive with respect to the Source (S) Current flows into the Drain (D), through the channel, and out of the Sour

ce (S)

gate-to-source voltage (VGS), the drain current (ID) is control led by that voltage

N-channel JFET

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• Current can flow initially because plenty of electrons are available in the channel.

• Gate : Apply negative voltage to increase the depletion width, so as to reduce the current When the gate voltag

e is negative enough, current will stop.

• Hence, this is a depletion device.

N-channel JFET

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Pinch off in JFET (that bop)

N-channel JFET

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• P channel JFET:

– Major structure is p-type material (channel) between embedded n-type material to form 2 p-n junction.

– Current flow : from Source (S) to Drain (D)

– Holes injected to Source (S) through p-type channel and flowed to Drain (D)

P-channel JFET

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JFET Characteristic Curve (N-Channel)

ID versus VDS for VGS = 0 V

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JFET for V GS = 0 V and 0<V DS <|V p |

Channel becomes narrower as

VDS is increased

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Pinch-off (V GS = 0 V, V DS = V P ).

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Application of a negative voltage to the

gate of a JFET.

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JFET Characteristic Curve (N-Channel)

• For negative values of VGS, the gate-to-channel junction

is reverse biased even with VDS=0

• Thus, the initial channel resistance is higher (in which

the initial slope of the curves is smaller for values of

VGS closer to the pinch-off voltage (VP)

• The resistance value is under the control of VGS

• If VGS is less than pinch-off voltage, the resistance

becomes an open-circuit ;therefore the device is in

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n-Channel JFET characteristics curve

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n-Channel JFET characteristics curve

JFET Characteristic Curve

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JFET Characteristic Curve (P-Channel)

• Operation is almost the same as n-channel FETs.

• Voltage polarity and current direction reversed.

• BUT… for p-channel devices,

– The carriers are holes (not electrons) So, mobility is

lower and minority carrier lifetime shorter.

– Consequence: p-channel devices are usually POORER!

• Higher threshold voltage, higher resistance, and lower current capability.

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p-Channel JFET

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p-Channel JFET characteristics with I DSS = 6 mA

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Characteristics for n-channel

JFET

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+

+ +

Characteristics for p-channel

JFET

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Operation of n-channel JFET

• JFET is biased with two voltage sources:

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Transfer Characteristics

The input-output transfer characteristic of the JFET is not as straight forward as it is for the BJT In BJT:

which  is defined as the relationship between IB (input current) and IC (output current).

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Transfer Characteristics

In JFET, the relationship between VGS (input

voltage) and ID (output current) is used to

define the transfer characteristics It is called

as Shockley’s Equation:

The relationship is more complicated (and not linear)

As a result, FET’s are often referred to a

square law devices

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• Defined by Shockley’s equation:

• Relationship between ID and VGS.

• Obtaining transfer characteristic curve axis point from Shockley:

– When VGS = 0 V, ID = IDSS

– When VGS = VGS(off) or Vp, ID = 0 mA

) ( 2

) (

off GS

GS DSS

V

V I

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Transfer Characteristics

JFET Transfer Characteristic Curve JFET Characteristic Curve

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Answer 1

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Answer 2

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JFET Biasing

39

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DC JFET Biasing

• Just as we learned that the BJT must be biased for proper operation, the JFET also must be biased for operation point ( ID, VGS, VDS)

• In most cases the ideal Q-point will be at the

middle of the transfer characteristic curve, which is

about half of the IDSS.

• 3 types of DC JFET biasing configurations :

– Fixed-bias

– Self-bias

– Voltage-Divider Bias

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VDS +

reverse-e – Sourcreverse-e (G-S) terminal, thus no current flows thro ugh RG (IG = 0).

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• DC analysis

– All capacitors replaced with open-circuit

VDS +

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For graphical solution, use VGS = - VGG to draw the load line

– For mathematical solution, replace VGS = -VGG in Shockley’s

2

) (

1 1

GG DSS

off GS

GS DSS

D

V

V I

V

V I

I

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Graphical solution for the network

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Self-bias

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DC analysis of the self-bias configuration.

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Mathematical Solutions

• Replace in the Shockley’s Equation:

• By using, quadratic equation and formula, choose value of ID that

relevant within the range (0 to IDSS): nearly to IDSS/2

• Find VGS by using ;also choose VGS that within the range (0

to VP)

2

) ( 2

) (

1

; 1

D

off GS P

P

GS DSS

D

V

R I I

I therefore

V

V V

V I

I

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Example : Self-bias configuration

GSQ DQ D G

1 V

2 I

Det

3 V

e rmine the following for

4 V

the network

5 Vs

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Graphical Solutions:

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Sketching the transfer characteristics curve

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Sketching the self-bias line

When I = 4mA, V = When I = 8mA, V

- 4V

= - 8V

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Graphical Solutions: Determining the Q-point

Q-point

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Mathematical Solutions

V V

and mA

I choose therefore

V V

k mA k

mA

R I V

R I V

mA I

mA I

I kI

kI I

I

MI kI

kI m

k I

m k

I m

I

V

R I I

R I V

recall V

V I

I

GS D

S D GS

S D GS

D D

D D

D D

D

D D

D

D D

D

P

S D DSS

S D GS

P

GS DSS

D

6 2 588

2

;

6 2 9

13

) 1 ( 588

2 )

1 ( 9

13

588 2 9

13

0 288

0 132

8

8 96

288 0 36

1 6

6

36 36

8

6

) 1 ( 6

8 6

) 1 ( 1

8

) (

1 1

21 1

2

2

2

2 2

2 2

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IDQ = 2.6mA

ID=IS

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Voltage-divider bias

A

IG=0A

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Sketching the network equation for the

S V =0V

V = V

V I

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-Effect of R S on the resulting

Q-point.

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Example : Voltage-divider bias

Determine the following for th

4 V

e netw k

5 V

or

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R + R 270kΩ 16V

2.1MΩ + 0.27MΩ = 1.82V

1.5kΩ

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Determining the Q-point for the network

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Mathematical solutions

• How to get I DS , V GS and V DS for divider bias configuration by using mathe matical solutions?

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voltage-Exercise 3:

DS D S

1 I andV

2 V

Determine the followi

3 V

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Drawing the self bias line

1.5kΩ

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Determining the Q-point

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Exercise 4

Determine the required values of R and R

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Determining V GSQ for the network.

DQ

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72

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Enhancement and Depletion MOSFET

Enhancement — the channel is originally not

conducting when gate voltage is 0, and we

have to apply a positive gate voltage (bigger t

han a threshold Vth or VT) to make it conduct

(enhance it).

Depletion — In fact, we also have another

kind of MOSFET, in which the channel can co

nduct even when gate voltage is not applied

Then, we need to apply reverse gate voltage

to cut it off This is called depletion MOSFET.

 NOTE THAT DUE TO A SEMICONDUCTOR

DOPING PROPERTY:

 For n-channel MOSFET, both enhancement and

depletion types can be made

 For p-channel MOSFET, only enhancement type can

be made

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The structure of an E-MOSFET does not have a physical channel between

the source and drain terminals during transistor fabrication, as shown belo w.

It is because of this reason; the gate-source voltage must be large enough

to attract the current carriers into the region directly beneath the gate termi nal to induce a channel in the substrate.

These carriers form a channel that is able to carry current from the drain

terminal to the source terminal.

p-substrate n-doped material

SiO2

Metal Contact

Source Terminal

Gate Terminal

Drain Terminal

n-channel Enhancement-type MOSFET (NMOS)

Induced n-Channel

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E-MOSFET (cont’d)

operate in the

enhancement mode.

The operating voltages

for the various type of

E-MOSFET are shown

p-channel (PMOS) –value –ve

> VT

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E-MOSFET (NMOS)

n-channel physical structure:

p - substrate Induced n-channel

Source

Terminal

Gate Terminal

Drain Terminal

n-channel Enhancement-type MOSFET

Gate Terminal (G)

Substrate TerminalDrain Terminal (D)

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p-channel physical structure:

E-MOSFET (PMOS)

Gate Terminal (G)

Substrate Terminal Drain Terminal (D)

Source Terminal (S)

Gate Terminal (G)

SourceTerminal

GateTerminal

DrainTerminal

p-channel Enhancement-type MOSFET

p-channel ENMOSFET

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Operation of n-channel E-MOSFET (NMOS)

 E-MOSFET can only operate in the enhancement modes.

 Since there is no physical channel built into the structure, when VGS= 0 V , there

is no current ID flow between drain terminal and the source terminal.

When VGS is biased positive at the gate terminal G for a n-channel E-MOSFET,

negative charged carriers (the free electrons) are induced into the area directly b eneath the gate terminal insulator

 The charged carriers (the free electrons) are actually minority carriers within the

p-substrate

 These carriers will form an n-type channel (consists of free electrons) stretching

from the drain terminal D to the source terminal S, facilitating the drain current ID

to flow through

 The value of VGS that is just sufficient to produce a significant channel for current

to flow from drain region D to the source region S is known as the Threshold Voltage, VT The value of VT is typically in the range from 1 to 3V.

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E-MOSFET Operation Modes (NMOS)

 There are three operation

modes for MOSFET

 Saturation region

 Linear/Triode/Ohmic

 Cutoff

 As VDS increases, the channel

pinches down at the drain

end and iD increases more

slowly When VDS > VGS – VT, i

D becomes constant

 Gate current = 0 (always)

 The channel conduction is

determined by VGS

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 Jdahjd

 xx

Trang 81

 Jdahjd

 xx

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Characteristic of enhancement-type MOSFET

(E-MOSFET operation in the saturation)

• Because of no channel between Drain to Source n-channel ENMOSFET is

capable of operating with ID=0 at VGS=0 ID will conduct starting from the point defined by (ID = 0 when VGS = VT )(VT is the transition frequency of ENMOSFET

• The saturation current is proportional to (VGS–VT)2: ID = K (VGS–VT)2

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Output characteristic of E-MOSFET

 E-MOSFET can only operate

in the enhancement modes

 Hence, the gate-source

voltage VGS must be larger tha

n the threshold voltage VT.

 No current (ID = 0A) flows

through the E-MOSFET when

the gate-source voltage VGS is

smaller the threshold voltage

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E-MOSFET in Triode Region

84

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Transfer characteristic of E-MOSFET ( VGS – ID)

The transfer characteristic curve obeys the

following equation.

D = K (VGS - VT)2 for (VGS > VT).

The values of the threshold voltage VT and

the proportional constant K are given in the E-MOSFET transistor data sheet.

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 

 GSON T 2DON

2 T GS D

VV

KI

bygivenis

Kwhere

VV

KI

VGSON ,IDON and VT are ENMOSFET parameters, Value “K” in the ID

equation can be found from these three parameters.

Example:

ENMOSFET parameters are I DON =10mA,

V GSON =8V and V T =2V and Find I D if V GS =+5V

 

5V2V 10936 2.5mA36

10I

36

10K

V2V8KmA10

2 D

Trang 87

E-MOSFET characteristic and parameters

E-MOSFET is a voltage-controlled current device.

Unlike the BJT where the collector current I C is related to the base current I B by the

dc beta value DC , the E-MOSFET drain current I D is not related to its gate-to-source v oltage V GS in that simple way.

Let consider the E-MOSFET circuit shown and set the gate-to-source voltage V GS >

V T , and then vary the d.c voltage V DD to observe the changes in drain-to-source voltage V DS and the drain current I D

+

_ +

Active Region

Saturation Region

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The induced n-channel in the p-substrate does not become sufficiently conductive to

allow drain current to flow until V GS reach a certain threshold voltage ( V T ).

As V DS increases from zero (by increasing V DD ), the drain current I D increases

proportionally initially until it reaches certain value (at point B)

During this region, the channel resistance between the drain and the source terminals

is essentially constant

The drain current I D increases linearly with V DS This is known as the Ohmic region

because in this region V DS and I D are related by the Ohm’s law

Sometimes, this operating region is also known as the voltage-control-resistance

region where the channel resistance R DS is controlled by the gate-to-source voltage V G

S

E-MOSFET characteristic and parameters (cont’d)

p-substrate Induced n-Channel

n-doped

material

SiO2

Metal Contact

Source

Terminal

Gate Terminal Terminal Drain

n-channel Enhancement-type MOSFET

Breakdown Region

Constant Current Region or

Active Region

Saturation Region

Trang 89

As VDS continue to increase further, the channel becomes narrower at the

drain end This narrowing occur because the VGD becomes smaller when VD

S becomes larger (because VGD = VGS – VDS), thus reducing the positive field

at the drain end.

As a consequence, the resistance of the channel begins to increase, and

drain current begins to level off.

This leveling off occur when VGD = VT That is, the positive voltage at the

drain end reaches the threshold voltage and the channel width at the drain end shrinks to zero.

Further increases in VDS do not change the shape of the channel and

current ID does not increase any further (i.e ID saturates).

The drain-to-source voltage VDS at which the drain current first becomes

constant is known as the saturation voltage, VDS(sat)

VDS(sat) = VGS – VT

The operating region after VDS(sat) occurs is known as the constant-current

region or the active region or the saturation region.

E-MOSFET characteristic and parameters (cont’d)

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