11, 349–358, 2015 A 65 nm CMOS Ultra-Low-Power Impulse Radio-Ultra-Wideband Emitter for Short-Range Indoor Localization Mohamad Al Kadi Jazairli∗ and Denis Flandre ICTEAM Institute, Univ
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Low Power Electronics Vol 11, 349–358, 2015
A 65 nm CMOS Ultra-Low-Power Impulse Radio-Ultra-Wideband Emitter for Short-Range Indoor Localization Mohamad Al Kadi Jazairli∗ and Denis Flandre ICTEAM Institute, Université Catholique de Louvain, Louvain-la-Neuve, 1348, Belgium
(Received: 14 April 2015; Accepted: 15 July 2015) This paper presents an ultra-low-power IR-UWB pulse generator based on a dedicated design of a
chain comprising of a voltage controlled ring oscillator, a buffer and a pulse shaping filter A control
voltage can be used to set the pulse repetition frequency The design was made using 65 nm CMOS
technology The design was optimized in order to meet target specifications (pulse width, repetition
frequency, PSD, etc.) that are suitable for short-range indoor localization The generator produces
a pulse having 0.5 ns width and 930 mV peak-to-peak amplitude prior to the antenna The−10 dB
bandwidth is from 1 to 7 GHz with an amplitude less than−40 dBm/MHz which makes it compliant
with the FCC spectral mask The energy consumption is 1.5 pJ per pulse while the energy driven
to the antenna is 60 to 65% of the total energy consumed by the circuit per pulse According to the
state-of-the-art, this is the minimum consumption that we were able to achieve
Keywords: Impulse Radio, Low Power, Pulse Generator, Transmitter, UWB
1 INTRODUCTION
Ultra-Wideband (UWB) technology appears very
promis-ing for radio communication and localization UWB
sig-nals have a very wide bandwidth with allocated frequency
spectrum from 3.1 GHz to 10.6 GHz and with a
max-imum emitted power being restricted to −41 dBm/MHz
in compliance with the Federal Communications
Com-mission (FCC).1 Energy can be spread over a very wide
bandwidth to very low levels allowing UWB radios and
narrowband broadcasters to share the spectrum without
causing undesirable interference; this in turn generates
numerous interesting and novel application
opportuni-ties These characteristics of UWB implementations are
of utmost interests for low-cost, short-range sensors
and smart devices with ultra low power consumption
Another advantage of the low power transmitter is the
size reduction of the transmitted antenna which allows
a single die transmitter to be implemented in an area
of 4 mm2.2
In this work, one of our objectives is to design an
extremely low power CMOS-integrated pulse generator
for short-range indoor localization In order to achieve
this, we considered the common form of UWB that is
∗ Author to whom correspondence should be addressed.
Email: mohamad.alkadi@uclouvain.be
called IR (Impulse Radio) which employs sub-nanosecond pulses without a carrier signal The transmitter can be used
in both amplitude modulation (PAM) and pulse-position modulation (PPM)
Several IR-UWB circuits have been proposed in the lit-erature To produce the UWB output pulse, some papers used the LC topology3–5 while others used the ring oscil-lator topology.6 7 Those who used the LC topology man-aged to produce a sub-nanosecond pulse (∼0.5 ns) but
in expense of high consumption of energy per pulse
(> 4 pJ/pulse) While those who used the ring
oscilla-tor topology managed to consume less energy per pulse
(< 5 pJ/pulse) but failed to produce a sub-nanosecond
pulse Here our target was to reach sub-nanosecond pulse with an energy consumption of less than 1 pJ/pulse Other implementations details will be compared in a later sections
We have expanded the Voltage Control Ring Oscil-lator (VCRO) circuit architecture presented in Ref [8]
In Ref [8], 0.5 m SOS technology was used to produce
a single pulse with 800 ps width but without taking into consideration the exact UWB requirements on the pulse shape Here by porting this VCRO to 65 nm CMOS and introducing a proper design of buffer and pulse shaper, along with the right element sizes and filter shaping cir-cuit, we can generate a pulse shape with a Power Spectral
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P3
2
1
1
M0
C1
VCRO Buffer Antenna
Pulse Shaping Filter
VCCA
V control
RL VCCB
Fig 1 Proposed UWB pulse generator.
Density (PSD) which complies with the FCC mask One of
the most important issues addressed in the design has been
achieving ultra low power consumption while maintaining
the same quality of the pulse shape and its corresponding
PSD for usual variations of process, supply voltage and
temperature (PVT)
This paper consists of several sections Section 2
addresses the required UWB pulse specification as well
as the evaluation of the minimum transmitted energy
per pulse that a generator should produce in order to
allow detection by the receiver for short-range
localiza-tion applicalocaliza-tions Seclocaliza-tion 3 describes the proposed UWB
pulse generator Section 4 gives a detailed explanation
of the VCRO analysis In Section 5, the results obtained
from the simulations and measurements are interpreted
Section 6, presents the experimental result of
transmit-ting train of pulses Section 7 investigates the effect of
PVT variations and subsequent calibrations on the pulse
generator
1.2
0
Time (ns)
1.2
400 ps
470 mV 0
0
Fig 2 Simulated pulse shape at the output of VCRO (upper curve), at
the output of buffer (middle curve) and at the 50 antenna resistance
(lower curve).
10
Normalized FCC mask
Normalized transfer response
of the pulse shaping filter
–20 0
Frequency (GHz)
–40
Pulse Shaping Filter Antenna
Ca Cb
Fig 3 Implementation and frequency response of the pulse shaping filter.
2 REQUIRED PULSE SPECIFICATIONS FOR LOCALIZATION
In a localization application, several requirements have
to be set in order to achieve an optimized UWB pulse generator.9 10 The shape of the IR-UWB pulse plays a major role in determining the quality of the pulse gener-ator According to Ref [10], the IR-UWB pulse must be
a monocycle pulse with a very short pulse width (shorter than 1 ns) to target a cm precision By applying the mono-cycle pulse directly to an UWB transmit antenna, it is transformed into a Gaussian-like pulse This Gaussian-like pulse is vital for fitting the PSD inside the regulation of the FCC mask Another factor that should be taken into consideration is the rate of the pulse repetition frequency (PRF), which has to be in the range of 1 to 500 MHz, this values of the PRF guarantees the possibility for each TX-RX pair to unambiguously distinguish between scat-tered pulses and direct lign-of-sight (LOS) pulses for any target position within the area and any nodes location.11
Finally, for the power consumption issue, according to Refs [12, 13], we can consider a low SNR of −10 dB that is still sufficient for good localization design The dependency on the pulse shape and the SNR is extensively studied in Refs [14 and 15]
To generate a pulse with minimal power consumption, first we have to determine the minimum Energy per pulse that could be transmitted in an indoor area and detected
Time (ns)
–1.2 0 1.2
φ1 φ2
0
Fig 4 Typical voltage versus time plots of the VCRO (Fig 1) node (1) (upper curve) and voltage difference between nodes (3) and (4) versus time (lower curve).
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Fig 5 The voltages at different interval nodes of the VCRO (Fig 1)
and the current flow in both phase 1 (a) and phase 2 (b) of Figure 4.
by the receiver This can be done calculating the
transmit-ted energy while taking into consideration several terms
such as the path loss between the transmitter and receiver,
Signal to Noise Ratio (SNR) and the level of noise floor
From standard telecommunication theory, the received
energy can be basically defined by the following equation:
Er= Et
where Er is the received Energy, Et is the transmitted
energy and PL is the path loss that can be determined by
the following equation for line-of-sight path:
PL =
4 · d · f c c
2
(2)
where d is the transmitter receiver distance, fc is the
cen-tral frequency and c is the speed of light.
Using the central frequency fc= 475 GHz (as shown in
Section 4), the path loss has been calculated using Eq (2)
to be 45.8 dB for 1 m distance and 65.8 dB for 10 m
distance between the transmitter and the receiver
The SNR can be determined from the following
equation:
SNR= Er
where N0is the noise spectral density in Watts per Hertz
Several values of SNR have been considered and for
each of these values, the minimum transmitted energy per
1.2
Inverter 1&2
Vin (v)
Inverter 3
1.2
1
0.8
0.6
0.4
0.2
Fig 6 Inverter DC characteristics (switching curve) for VCCA = 1.2 V.
Table I Transistor sizes and threshold voltages for each component in the VCRO shown in Figure 1.
Inverters 1 and 2 Inverter 3 p-MOS M0 C1
n-MOS: W= 0.12 m W= 0.36 m 5 fF
L= 0.1 m L= 0.1 m
Vt= High Vt= Low
p-MOS: W= 0.54 m W= 0.12 m W= 0.8 m
L= 0.1 m L= 0.1 m L= 0.1 m
Vt= Low Vt= High Vt= Low
pulse has been calculated using Eqs (1) and (3) while maintaining the worst case value of path loss (i.e., for 10 m
and N0/2 = 10−19W/Hz.14 15 ) The minimum E twas found
to be 0.48 pJ for SNR= 0 dB and 4.8 pJ for SNR = 10 dB For a short-range indoor application with a 5 m distance,
the minimum E t is 0.11 pJ at SNR= 0 dB and 1.1 pJ at SNR= 10 dB
These values of the transmitted energy per pulse should
be taken into consideration when implementing a very low power pulse generator, since at lower values there is a high probability of losing the transmitted signal
3 PROPOSED UWB PULSE GENERATOR
Figure 1 depicts the proposed UWB pulse generator It consists of a voltage controlled ring oscillator (VCRO),
a buffer and a pulse shaping filter
3.1 Voltage Control Ring Oscillator VCRO
In order to achieve a low-power, low-complexity and tunable VCRO, we considered the VCRO configuration shown in Figure 1 The basis of the VCRO is an impulse oscillator consisting of three CMOS inverter stages.8 16
A capacitor C1 and a p-MOS transistor M0 are inserted
before the last stage as shown in Figure 1 so as to define the pulse width and the delay between two consecutive pulses The way how C1 and M0 control these param-eters is explained in Section 4 The gate voltage of M0 (Vcontrol) is used to control the repetition frequency of the pulse generator To guarantee minimum pulse width, the last inverter is designed to have a fast switching transi-tion from High-to-Low as compared to the first and second
450 µm
100 µm
35 µm
30 µm
Fig 7 Fabricated UWB pulse generator.
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930 mV
1000 mV
Fig 8 Pulse shape at the output of the buffer (a) Measured and
(b) Simulated.
inverters Furthermore, the pulse width will be reduced by
scaling CMOS technology A typical waveform at the
out-put of the VCRO is shown in Figure 2 (upper curve)
3.2 Pulse Shaping Filter
As mentioned in Section 2, a proper filtering is required in
order to obtain a Gaussian–like pulse at the output antenna
so as to make it compliant with the FCC spectral mask
Figure 3 shows the normalized frequency response of the
pulse shaping filter and the normalized FCC spectral mask
for indoor UWB devices.17 In our simulators, the values
of the capacitors Ca= 0.25 pF, Cb = 0.15 pF and
induc-tor L= 2.5 nH are optimized to produce the Gaussian-like
waveforms shown in Figure 2 (lower curve) It is worth
mentioning that a pulse shaping circuit can also be
imple-mented within the UWB transmit antenna and thanks to
the low-pass filtering effect the generated pulse will be
shaped by the antenna frequency response Therefore, in
the experimental part of this work, we considered using
the pulse shaping filter built-in inside the antenna instead
of adding a separate pulse shaping filter
3.3 Buffer
To ensure that enough current is fed into the capacitors and
inductor of the pulse shaping filter, the buffer is designed
10
Frequency (GHz)
–20
0
0
5 –60
–40
FCC Mask
Fig 9 Measured power spectral density (PSD) of the output pulse.
–40
–60
Frequency (GHz)
0
Fig 10 Simulated power spectral density (PSD) of the output pulse.
as shown in Figure 1 The inverters here do not only isolate the VCRO from the high load of the pulse shaping filter but also provide current driving capability for the pulsed oscillator The first and second inverters in the buffer play a major role in the determination of the pulse width Adding
a middle p-MOS transistor in the second inverter as in
Ref [18] provides a fast switching transition from High-to-Low as compared to the first inverter in the buffer which reduces the minimum pulse width as shown in Figure 2 (middle curve) The supply voltage VCCB can be further used as a pulse output enable signal
4 VCRO ANALYSIS AND DESIGN
For design optimization purposes, we need to understand the operation scheme of the VCRO and how the capaci-tor C1 and the transiscapaci-tor M0 affect the time delay of the output signal.19 We divide the timing of one pulse into
two phases 1 and 2, as shown in Figure 4 Also, since
nodes number (3) and (4) in Figure 1 are essential nodes where the charging and discharging of the capacitor take place, we plot the difference of these voltages along with the output voltage versus time in Figure 4 It is worthwhile
noting that phase 1 (1) represents the case where V3 is
higher than V4 and hence V3 is the source of the
transis-tor M0, and phase 2 (2) represents the case where V4
is higher than V3 and hence V4 becomes the source of transistor M0 as depicted in Figure 5
Vcontrol (mV)
100 400
800
600
200
0
340 360 380 400 420
Measured PRF
Measured PW
Simulated PW Simulated PRF
Fig 11 Simulated and measured pulse repetition frequency (solid curves) and pulse width (dotted curves) as a function of Vcontrol for VCCA = VCCB = 1.2 V.
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Vcontrol (mV)
200
400
600
800
Total power consumption VCRO power consumption Buffer power consumption Energy consumption
0.4 0.8 1.2 1.6 2
0 0
Fig 12 Simulation of the power consumption and energy consumption
per pulse as a function of Vcontrol for VCCA = VCCB = 1.2 V.
Phase 1 starts with a high output voltage V1 that
sub-sequently yields a zero voltage at node (2) which in turn
gives a high voltage at node (3) equal to VCCA Given
that V4 from the previous period is still low due to the
delay introduced by M0 and C1, node (3) and node (4)
will be the source and the drain of the PMOS transistor
M0 respectively Moreover, since VSD > VSG–Vt, with
VSG= VCCA − Vcontrol, and Vt the absolute value of
the threshold voltage, this transistor operates in the
satu-ration region as long as V4 < Vcontrol+ Vt and its
con-trol current iD charges the capacitor C1 as shown in the
Figure 5(a) As long as M0 is operating in the
satura-tion mode, the charging of the capacitor C1 at a constant
current raises the voltage at node (4) at a steady rate as
observed in Figure 5(a) until V4 reaches a value close to
VCCA This high V4 value switches the last inverter and
gives a new zero output voltage at node 1
In phase 2, the initial zero voltage at node (1) yields
a voltage at node (2) equal to VCCA and a zero voltage
at node (3) Since node 4 is high from previous phase,
the source and drain of transistor M0 will be at node (4)
and node (3) respectively Given that VSD > VSG− Vt,
this transistor operates in the saturation mode and its
con-trol current iD charges the capacitor C1 as shown in
Figure 5(b) However, on the contrary to 1, the charging
of the capacitor decreases the source voltage at node (4)
Vcontrol (mV)
200
400
600
0
2 1.6 1.2 0.8 0.4 0
Fig 13 Measured power consumption and energy consumption per
pulse as a function of Vcontrol for VCCA = VCCB = 1.2 V.
Frequency (GHz) control (mV)
–100
100
0 20 40 60 80
–20 –40 –60 –80
(a)
(b)
Fig 14 (a) UWB antenna, (b) Antenna impedance as a function of frequency.
causing a decrease in VSD and VSG while maintaining
VSD > VSG− Vt Thus, the saturation current decreases
till it reaches a zero value when V4–V3 =0 which in turn makes the 3rd inverter switching from low to high and
reinitiates 1.
The duration that transistor M0 stays in any of these two phases depends on the values of Vcontrol, of C1, and of the switching thresholds between High-to-Low and
Low-to High for the last inverter To approach minimum pulse width, we designed the last inverter having a lower logic threshold as compared to the first and second inverters
as shown in Figure 6 Using this analysis, the threshold
voltage (V T), the width W and the length L of the
inverters transistors and of M0 are chosen to optimize the sizes of the inverters to get the minimum pulse width as shown in Table I
The design was made in a 65 nm CMOS technology with low power and general purpose LP/GP transistor
930mV
350mV
16mV
(a)
(b)
(c)
Fig 15 (a) The signal transmitted from the pulse generator through the antenna, (b) the received signal at 1 cm, (c) the received signal at 100 cm.
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400
300
200
100
0
200 150
100 50
Distance (cm)
Measured received amplitude Theoretical received amplitude
Fig 16 The measured received amplitude (solid line) and theoretical
received amplitude (dotted line) versus distance.
property.20 A process called LP/GP Mix is available and
employs Low Power and General Purpose devices on the
same chip The advantage of using such 65 nm CMOS
process is the high performance, low power consumption
and the availability of multi threshold voltages LP devices
were used for the pulse generator to minimize power
con-sumption, GP devices were used for the buffer for high
speed pulse integrity The capacitor C1 was made using
n-MOS transitors that is placed inside an NWell so that
the bottom plate is all N type beneath the poly Figure 7
shows the fabricated pulse generator It is to be noted that
the pulse shaping filter was not fabricated on chip in order
to validate the CMOS emitter separetely and study whether
an adequate antenna can replace the pulse shaping circuit
Therefore, all the measurement results in the next section
are done without the pulse shaping circuit
5 MEASUREMENT RESULTS AND
ANALYSIS
5.1 Impulse Shape
The measurements were realized by connecting the 65 nm
die on a probe station using DC decoupled probes for
the power supply and Vcontrol, as well as connecting
500
0 400 800 1200
100 150 200 250 300 350 400 450
0
400 300 200 100
TT Vcontrol (mV)
T FF F SS S SF F FS Measured Me VDD=1.2V, T=25°c
Fig 17 Simulation of (a) Pulse repetition frequency versus Vcontrol, (b) Pulse width at Vcontrol = 100 (mV) for different process corners compared with measurements.
Time (s)
0
0.6
500 ps 0.8
0.4 1.2
Fig 18 Zoomed-in output waveform sensitivity using Monte-Carlo simulation.
a special 50 RF probe to the output buffer load to
guarantee minimum resistance and capacitor effect from the cables and pads Using the 16 GHz analog band-width Agilent DSO-X91604A digital sampling oscillo-scope, we measured the pulse shape shown in Figure 8(a)
at the output First, we compared the simulated result using the ELDO circuit simulator with the actual device output
In Figure 8, the peak-to-peak amplitude at the output of the buffer is 930 mV for the measured result while it is
1 V for the simulated result The pulse width is about
500 ps for the measured and 400 ps for the simulated result Moreover, it is worth mentioning that the signal shapes corresponding to other values of Vcontrol are sim-ilar to the ones shown in Figure 8 The measured spectra
of the output impulse train are shown in Figure 9, while the simulated power spectral density (PSD) is shown in Figure 10 Given the minimal emitted pulse energy, PSD
is always lower than−40 dBm/MHz, which makes it com-pliant with the FCC mask for all frequency band It is important to mention that this spectra result is obtained without connecting the pulse shaping circuit Here, the UWB antenna parameters work as a pulse shaping circuit and cut the spectra at low frequency making it comply with the FCC mask
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Vcontrol (mV)
800
0
100
600
400
200
699
695
691
250 246 242
32 30 28 27
3.2 3 2.8
400
Fig 19 Sensitivity of the pulse repetition frequency versus Vcontrol.
5.2 Pulse Frequency and Pulse Width
Our UWB pulse generator further provides a tunable pulse
repetition frequency In Figure 11, for supply voltages
VCCA and VCCB set to 1.2 V, and for typical
pro-cess conditions, the simulated pulse frequency decreases
from 700 to 50 MHz as the control voltage increases
from 100 mV to 350 mV The pulse width (red dotted
curve in Fig 11) varies slightly when the pulse frequency
decreases, from 350 ps at 700 MHz to 420 ps at 10 MHz
As to the measured result (shown in Fig 11), it validates
the controelability of the transmitter The pulse frequency
decreases from 450 MHz to 3 MHz as the control
volt-age increases from 100 mV to 350 mV The pulse width
(the black dotted curve in Fig 11) varies slightly when
the pulse frequency decrease, from 495 ps at 450 MHz
to 410 ps at 3 MHz The quantitative difference between
the simulated and measured result are due to the fact that
our circuit operates closer to the slow process corner than
to the simulated typical process corner as explained in
Section 7
5.3 Power and Energy Consumption
The total power consumption of the transmitter sums up
the VCRO and buffer In Figure 12, the simulated power
consumption dominated by the buffer stage is decreased
At 120°C
Frequency (GHz)
–40
–20
–40
500
0
400 300 200 100
Pulse width (ps)
600 700 800
25ºC –40ºC 120ºC
25ºC –40ºC 120ºC
Pulse Repetition Frequency-PRF (MHz)
(a)
(b)
At 25°C At–40°C
VDD=1.2V,Process:TT
Fig 20 Normalized power spectral density (PSD), (b) Pulse width and PRF of the output pulse simulated at different temperatures.
from 720 W for a pulse repetition frequency of 700 MHz
to 118 W for a pulse repetition frequency of 98 MHz
at 1.2 V supply voltage In terms of energy consumed per pulse, the pulse width corresponds to an increase from
1 pJ to 1.2 pJ as Vcontrol increases from 100 to 250 mV
as shown in Figure 12 The measured results shown in Figure 13 confirm the trends and orders of magnitude with process deviations The power consumption including the
buffer stage is decreased from 521 W for a pulse repeti-tion frequency of 450 MHz to 82 W for a pulse repetirepeti-tion
frequency of 100 MHz at 1.2 V voltage supply In terms of energy consumed per pulse, this corresponds to an increase from 1.1 pJ to 1.5 pJ as Vcontrol increases from 100 mV
to 250 mV as shown in Figure 13
Regarding the driven energy per pulse to the 50 load,
this corresponds to an increase from 0.75 pJ to 0.9 pJ as Vcontrol increases from 100 to 250 mV, which implies that approximately 60–65% of the energy consumed is driven
to the antenna As explained in Section 2, these values of energy per pulse are the minimum values that the pulse generator must transmit in order to be detected by the receiver
Finally, it is important to mention that we can stop the output pulse emission at any time by either applying a zero voltage on VCCB, or by applying a voltage higher than 400 mV on Vcontrol By applying such voltage, the transistor M0 will not operate in on regime anymore, so
no oscillation can take place
6 TRANSMISSION OF PULSES
We next connected the pulse generator with the UWB antenna designed at UCL21 shown in Figure 14(a), and
we transmitted the signal from the pulse generator through
a paired emitter and received antennas so as to study the received signal by using a Digital Sampling Oscillo-scope The variation of the UWB antenna impedance with respect to the frequency is shown in Figure 14(b) The upper blue curve represents the real resistance value of the antenna By taking a look at our operating bandwidth
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which is between 2.5 GHz and 7 GHz, we find that the
resistance varies between 20 and 70 The lower red
curve in Figure 14(b) represents the imaginary part of the
impedance, it varies between −20 and 20 in our
operating frequency range It is worth mentioning that the
negative value represents a capacitive reactance (1.3 pF at
X = −20 ) while the positive value represents an
induc-tive reactance (10 nH at X = 20 It is notable that
in Section 5 we took into consideration these values as
well as the extra capacitance and resistance values that are
added to the circuit from the cables and the instruments
while simulating our design in order to reach an
accu-rate comparison between the simulated and the measured
result
The control voltage is set to obtain a 100 MHz pulse
repetition frequency The pulse generator generates the
train of pulses shown in Figure 15(a) at the input of
the UWB antenna The received signal is shown in
Figures 15(b), (c) The peak to peak amplitude is around
350 mV for 1 cm distance between the transmitted and
received antenna, while it is 16 mV for 100 cm
dis-tance between the antennas The drop in voltage between
Figures 15(a)–(c) is due to the cable losses between the
pulse generator and the antenna as well as due to the
dis-tance In Figures 15(b) and (c), we can easily recognize
the effect of the UWB antenna, where the design of the
antenna converts the simple pulse to a monocycle impulse
shape, giving the output pulse the necessary shape to make
it comply with FCC mask In Figure 16, the solid curve
represents the measured received amplitude as a function
of the distance between the antennas The dotted line
rep-resents the simulated receiving amplitude as directly
pro-portional to 1/d, where d is the distance between the
antennas This was done because ideally the amplitude
should decrease in a ratio of 1/d as a function of distance.
From the two curves in Figure 16 we observe that the
measured curve follow a trend very close to the theoretical
curve calculated for ideal propagation It is important to
note that a bigger range can be obtained by optimizing the
VCCA,VCCB (V)
500
0
400 300 200 100
600 700 800
Pulse width (ps)
Pulse Repetition Frequency-PRF (MHz)
1.1V 1V 1.2V1.3V 1.4V
1.1V 1V 1.2V1.3V 1.4V
Fig 21 (a) Simulated output voltage, (b) Pulse width and PRF at different supply voltages.
Table II Measured results.
pulse shaping circuit and the antenna as well as minimiz-ing the parasitics from the cables in order to reduce the energy losses
7 PVT VARIATIONS
The pulse generator of Figure 1 is examined under Process, Voltage and Temperature (PVT) variations
In Figure 17(a), the results of corner simulations are shown for an input control voltage Vcontrol varying between 100 and 500 mV It is observed that the SF (Slow NMOS, Fast PMOS) and FF (Fast NMOS, Fast PMOS) corners provide a very high repetition frequency compared
to the other cases, which mean that with fast PMOS we obtain fast repetition frequency This is expected since the repetition frequency is directly proportional to the phase
2 (as explained in Section 4) and M0 in which the PMOS
transistor plays the major role for the duration of phase
2 Also from Figure 17, we can see that the measurement
results fall between TT (Typical NMOS, Typical PMOS) and SS (Slow NMOS, Slow PMOS) corners
For a localization application, which is our target, the maximum required pulse frequency is up to 200 MHz In Figure 17, we can observe that all the corners meet the requirements for localization within the range of 200 MHz
A Monte Carlo simulation of 50 runs around typical process (TT) parameters is done to estimate the system sensitivity to device mismatch Figure 18 shows a
zoomed-in version of the output waveform sensitivity The output signal shows a reasonable timing difference but not for amplitude or pulse width as a result of device mismatch
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Table III Comparison with previously reported pulse generators.
Technology per pulse (pJ/pulse) amp (mVpp) Pulse width (ns) Pulse type Band (GHz) area (mm 2 )
variations Figure 19 shows the repetition rate sensitivity
with the variation of device mismatch It can be easily
seen that the difference in pulse frequency is very small
and can be neglected
The PSD results at different temperatures are shown
in Figure 20(a) The −10 dB bandwidth at −40 C is
4.2 GHz which is from 2.2 to 6.6 GHz, while at 120C
the bandwidth becomes 5.2 GHz which is from 2.2 to
7.4 GHz Figure 21(a) shows different output voltage
cor-responding to a variation of the supply voltage VCCA=
VCCB The peak-to-peak amplitude across the 50
out-put load slightly decreases when the supply voltage is
decreased to 1.1 V, and slightly increases when the supply
voltage is increased to 1.3 V As shown if Figures 20(b)
and 21(b) the difference caused by the variation of
tem-perature and voltage on the pulse repletion frequency and
pulse width is very small and would have a negligible
effect in applications such as localization.9 10
8 CONCLUSION
In conclusion, an ultra-low-power frequency-tunable UWB
pulse generator has been reported in this paper The pulse
repetition frequency varies from 450 MHz to 3 MHz and
the power consumption varies from 521 W to 82 W
for VCCA= VCCB = 1.2 V when Vcontrol varies from
100 mV to 250 mV The energy consumed per pulse
increase from 1.1 pJ to 1.5 pJ, this is the minimum energy
per pulse that a pulse generator can transmit so that to be
detected by the receiver in a short-distance indoor
applica-tions Measured results are summarized in (Table II) and
very favorably compare to state-of-the art (Table III) in
terms of low energy consumption for achieved pulse peak
amplitude, short pulse width, large frequency band and
small active die area
Acknowledgment: The authors would like to thank
Professor Luc Vandendorpe and Dr Achraf Mallat for their
kind suggestions and help, Professor Christophe Craeye
and Dr Farshad Keshmiri for the design and the
fabrica-tion of UWB antenna, Pascal Simon for the assistance with
measurements in the WELCOME lab (Wallonia
Electron-ics and Communications Measurements)
References
1 Revision of part 15 of the Commission’s Rules Regarding UWB Transmission System, ET Docket 98-153, Federal Communications Commission (2002).
2 www.tagent.com.
3 D Lin, B Schleicher, A Trasser, and H Schumacher, Si/SiGe HBT UWB impulse generator tunable to FCC, ECC and Japanese
spec-tral masks, IEEE Radio and Wireless Symposium (RWS), Phoenix,
Arizona, USA (2011), pp 66–69.
4 X Wang, S Fan, B Qin, L Lin, Q Fang, H Zhao, H Tang,
J Liu, Z Shi, A Wang, L Yang, and Y Cheng, A 0.05
pJ/p-mV 5th-derivative pulse generator for full-band IR-UWB transceiver
in 0.18 m CMOS, IEEE Radio and Wireless Symposium (RWS),
Phoenix, Arizona, USA (2011), pp 70–73.
5 K K Lee, O Naess, and T S B Lande, A 3.9 pI/pulse
differ-ential IR-UWB pulse generator in 90 nrn CMOS, IEEE
Microelec-tronics and ElecMicroelec-tronics (PrimeAsia 2011), Macau, China (2011),
pp 115–118.
6 L B Leene, S Luan, and T G Constandinou, A 890fJ/bit UWB transmitter for SOC integration in high bit-rate transcutaneous
bio-implants, IEEE International Symposium on Circuits and Systems
(ISCAS), Beijing, China (2013).
7 M Shen, Y.-Z Yin, H Jiang, T Tian, and J H Mikkelsen,
A 3–10 GHz IR-UWB CMOS pulse generator with 6 mW peak power dissipation using a slow-charge fast-discharge
tech-nique IEEE Microwave and Wireless Components Letters 24, 634
(2014).
8 W Tang, A G Andreou, and E Culurciello, A low-power
silicon-on-sapphire tunable ultra-wideband transmitter, IEEE
Inter-national Symposium on Circuits and Systems (ISCAS 2008), Seattle,
Washington, USA (2008), pp 1974–1977.
9 A Mallat, P Gerard, M Drouguet, F Keshmiri, C Oestges,
C Craeye, D Flandre, and L Vandendorpe, Testbed for IR-UWB based ranging and positioning: Experimental performance and
com-parison to CRLBs, IEEE International Symp on Wireless Pervasive
Computing (ISWPC 10), Modena, Italy (2010), pp 163–168.
10 A G Amigo, P Closas, A Mallat, and L Vandendorpe,
Cramér-Rao bound analysis of UWB based localization approaches, IEEE
International Conference on Ultra-Wideband (ICUWB 2014), Paris,
France (2014), pp 13–18.
11 E Paolini, A Giorgetti, M Chiani, R Minutolo, and M Montanari, Localization capability of cooperative anti-intruder radar systems.
EURASIP Journal on Advances in Signal Processing 2008, 1 (2008),
Article ID 726854.
12 A Mallat, C Oestges, and L Vandendorpe, CRBs for UWB mul-tipath channel estimation: Impact of the overlapping between the
MPCs on MPC gain and TOA estimation, IEEE International
Con-ference on Communications (ICC 2009), Dresden, Germany (2009),
pp 1–6.
13 B Silva, P Zhibo, J Akerberg, J Neander, and G Hancke, Experi-mental study of UWB-based high precision localization for industrial
Trang 10Delivered by Ingenta to: unknown Copyright: American Scientific Publishers
applications, IEEE International Conference on Ultra-Wideband
(ICUWB 2014), Paris, France (2014), pp 280–285.
14 A Mallat, S Gezici, D Dardari, C Craeye, and L Vandendorpe,
Statistics of the MLE and approximate upper and lower
bounds–Part I: Application to TOA estimation IEEE Transactions
on Signal Processing 62, 5663 (2014).
15 A Mallat, S Gezici, D Dardari, and L Vandendorpe, Statistics of
the MLE and approximate upper and lower bounds–Part II:
Thresh-old computation and optimal pulse design for TOA estimation IEEE
Transactions on Signal Processing 62, 5677 (2014).
16 M A K Jazairli, A Mallat, L Vandendorpe, and D Flandre, An
Ultra-Low-power frequency-tunable pulse generator using 65 nm
CMOS technology, IEEE International Conference on
Ultra-Wideband (ICUWB 2010), Nanjing, China (2010), pp 1–4.
17 S Sanghoon, K Dong-Wook, and H Songcheol, A CMOS UWB
pulse generator for 6–10 GHz applications IEEE Microwave and
Wireless Components Letters (MWCL) 19, 83 (2009).
18 G V Fierro and G E Flores-Verdad, A CMOS low complexity
gaussian pulse generator for ultra wideband communications, IEEE
Mohamad Al Kadi Jazairli
Mohamad Al Kadi Jazairli received a B.S degree in Electrical Engineering from Beirut Arab University (BAU), Beirut, Lebanon,
in 2005, and a M.S degree in Molecular Electronics and System Design from Linköping University, Linköping, Sweden, in 2008 Since then he joined the Institute of Information and Communication Technologies, Electronics and Applied Mathematics (ICTEAM),
at Université catholique de Louvain (UCL), Louvain-La-Neuve, Belgium, where he is currently pursuing his doctoral studies His research interests are in the field of ultra-low-power analog circuits, UWB communication, RFID and sensor design.
Denis Flandre
Denis Flandre Denis Flandre (M’85–SM’03) received the M.S degree in Electrical Engineering, the Ph.D degree and the Research Habilitation from the Université catholique de Louvain (UCL), Louvain-la-Neuve, Belgium, in 1986, 1990 and 1999, respectively His doctoral research was on the modelling of Silicon-on-Insulator (SOI) MOS devices for characterization and circuit simulation, his Post-doctoral thesis on a systematic and automated synthesis methodology for MOS analog circuits Since 2001, he is full-time Professor at UCL He is currently involved in the research and development of SOI MOS devices, digital and analog circuits, as well as sensors and MEMS, for special applications, more specifically high-speed, low-voltage low-power, microwave, biomedical, radiation-hardened and high-temperature electronics and microsystems He has authored or co-authored more than 900 technical papers or conference contributions He is co-inventor of 11 patents He has organized or lectured many short courses on SOI technology, devices and circuits in universities, industrial companies and conferences He has received several scientific prizes and best paper awards.
He has participated or coordinated numerous research projects funded by regional and European institutions He has been a member
of several EU Networks of Excellence on High-Temperature Electronics, SOI technology, Nanoelectronics and Micro-nano-technology Professor Flandre is a co-founder of CISSOID, a spin-off company of UCL focusing on SOI and high-reliability integrated circuit design and products He is scientific advisor of two other UCL start-ups : INCIZE (Semiconductor characterization and modeling for design of digital, analog/RF and harsh environment applications) and e-peas (Energy harvesting and processing solutions for longer battery life, increased robustness in all IoT applications) He is an active member of the SOI Industry Consortium and of the EUROSOI network He is an IEEE Senior member.
International Midwest Symposium on Circuits and Systems (MWS-CAS 2009), Cancun, Mexico (2009), pp 70–73.
19 M A K Jazairli and D Flandre, Low power pulse generator as a
capacitive interface for MEMS applications, IEEE Ph.D Research
in Microelectronics and Electronics (PRIME 2009), Cork, Ireland
(2009), pp 312–315.
20 F Arnaud, Low cost 65 nm CMOS platform for low power and
general purpose applications, Symp VLSI Tech., Los Angeles, USA
(2004), pp 10–11.
21 F Keshmiri, R Chandra, and C Craeye, Design of a UWB antenna
with stabilized radiation pattern, IEEE AP S/USNC/URSI
Interna-tional Symposium, San Diego, USA (2008), pp 1–4.
22 K K Lee, M Z Dooghabadi, H A Hjortland, O Ncess, and
T S Lande, A 5.2 pJ/pulse impulse radio pulse generator in 90
nm CMOS, IEEE International Symposium on Circuits and Systems
(2011), pp 1299–1302.
23 M J Zhao, B Li, and Z H Wu, 20-pJ/pulse 250 Mbps
low-complexity CMOS UWB transmitter for 3–5 GHz applications IEEE
Microw Wireless Compon Lett 23, 158 (2013).