High k metal insulator metal (MIM) capacitors for RF mixed signal IC applications

It is further demonstrated that lanthanide doping into HfO2 can alleviate the two undesired properties of thin dielectric MIM capacitors; high leakage current and poor capacitance linear

HIGH-ĸ METAL-INSULATOR-METAL (MIM) CAPACITORS FOR RF/MIXED-SIGNAL

IC APPLICATIONS

KIM SUN JUNG

NATIONAL UNIVERSITY OF SINGAPORE

2005

Fo und ed 1905

High-κ Metal-Insulator-Metal (MIM) Capacitors

for RF/Mixed-Signal IC Applications

KIM SUN JUNG

M Eng

A THESIS SUBMITTED FOR THE DEGREE OF DOCTOR OF PHILOSOPHY NATIONAL UNIVERSITY OF SINGAPORE

2005

ACKNOWLEDGMENTS

I cannot fully express my gratitude to my supervisor Associate Professor Cho Jin who has given me support and guidance throughout my study in National University of Singapore (NUS) The seven years I have worked with him as a research engineer, a master student, and a Ph.D candidate has changed the direction of my life and laid a cornerstone of my future endeavor I sincerely thank him

Byung-I would like to express my deepest gratitude to my co-supervisors Professor Li Ming-Fu, who has led the MIM research project to an unprecedented success as a principal investigator, and Dr Yu Mingbin in Institute of Microelectronics (IME) Without their support and advice, much of this thesis would have been impossible My gratitude also to the other advisers and colleagues in MIM research group: Dr Zhu Chunxiang, Professor Albert Chin, Professor Kwong Dim-Lee, Dr Ding Shi-Jin, Dr

Hu Hang, Yu Xiongfei, Yang Tian, and Lim Hsiang-Fang I have truly enjoyed the time working with all of them and appreciate all of their contributions and hard works

I would also like to extend my gratitude to other teaching staffs in Silicon Nano Device Laboratory (SNDL): Professor Daniel Chan, Associate Professor Yoo Won-Jong, Associate Professor Ganesh Samudar, and Dr Lee Sungjoo for their valuable pieces of comment and advice on my research work during internal meetings and seminars I particularly thank Dr Lee Sungjoo for his kind advice on my future career

Special gratitude to Mr Joo Moon Sig and Mr Park Chang Seo for their help in many ways Their long professional experiences in a major IC manufacturer have significantly contributed to my progress as well as many other students in SNDL My warmest thanks to Dr Loh Wei Yip for many stimulating and joyful discussions both

in and outside the laboratory

The technical staff and my fellow students in SNDL are also gratefully acknowledged: Mr Yong Yu Fu, Patrick Tang, Mr O Yan Wai Linn, Lau Boon Teck,

Mr Whang Sung Jin, Hwang Wan Sig, Wu Nan, Chen Jinghao, Yeo Chia Ching, Debora Poon, Wang Xinpeng, Gao Fei, Ren Chi, Shen Chen, Zerlinda Tan, Zhang Qingchun, and Wang Ying Qian It was a joyful experience working with all of them

I am also greatly indebted to the members of Na-Sum Korean Church in Singapore: Pastor Jung Jae-Hwang, Pastor Kim Taek-Ho, Elder Kang Gwang-Hyun, Dr Lee Kahng-Soo, Dr Kim Yong-Dahl, Dr Hahn Kyu-Hyun, Prof Jung Jin-Wook, Mr Sohn Yong-Seok, Mr Choo Sung-Woon, Ms Kim Yoo-Kyung, and all of those who have prayed for my family and eagerly helped us in many ways

Last but not least, my deepest thanks to my wife, Eun-Jung, whose encouragement and sacrifice throughout those seven years have made this work possible, and to my son Irgene who has brought me so much joy Special recognition also belongs to my parents for their love and support

ABSTRACT

In this thesis, a series of novel high-ĸ MIM capacitors are developed for signal IC applications Firstly, the feasibility of a HfO2-based MIM capacitor is investigated using the dielectrics deposited by the reactive sputtering method Satisfactory DC properties are obtained even without typical high temperature post-deposition anneal steps, indicating that the HfO2–based dielectrics are promising candidates for analog MIM capacitors where the process temperature is limited by the melting temperatures of interconnect metals It is further demonstrated that lanthanide doping into HfO2 can alleviate the two undesired properties of thin dielectric MIM capacitors; high leakage current and poor capacitance linearity Secondly, an advanced and industry-ready dielectric deposition technique, atomic layer deposition (ALD), is introduced, and HfO2-Al2O3 laminate MIM capacitors are developed Compared with various high-κ MIM capacitors, the laminate MIM capacitor exhibits superior electrical characteristics such as high capacitance density in the RF regime, low leakage current and voltage linearity, high breakdown field, plus promising device reliability When compared with the MIM capacitors using a sandwich dielectric structure, the laminate MIM capacitors exhibit superior performance, including lower

RF/mixed-leakage current, higher EBD, longer time-to-breakdown, and polarity-independent electrical properties It is found that the alternate insertion of Al2O3 layers effectively suppress HfO2 crystallization, and interrupts grain boundary channels extending from the top to the bottom, and can provide good interfacial quality near the bottom electrode Thirdly, an innovative dielectric structure is conceived, by intentionally inserting low-ĸ SiO2 into the high-ĸ stack, to solve the inherent poor voltage linearity

in high-ĸ MIM capacitors A well-engineered HfO2/SiO2 stacked dielectric MIM

capacitor can achieve a high capacitance density while maintaining small VCC values,

a property which is hard to acquire using high-ĸ dielectrics alone The compensation effect of HfO2 and SiO2 stack structure is observed in the temperature dependence of the capacitance as well, and such combination is also advantageous for leakage current characteristics Finally, a novel MIM capacitor using a new high-ĸ material, Nb2O5, whose ĸ value is higher than 40, is developed In combination with HfO2/Al2O3barriers, the MIM capacitor delivers a high capacitance density of 17 fF/µm2 with excellent reliability and RF properties, which is suitable for long-term RF bypass or decoupling capacitors Furthermore, the first ever high-ĸ MIM capacitors in Cu/low-ĸ BEOL technology is demonstrated, and show that higher resonant frequencies can be obtained by replacing conventional Si3N4 in MIM capacitors with high-ĸ dielectrics

CONTENTS

ACKNOWLEDGEMENTS i

CONTENTS v

CHAPTER 1 INTRODUCTION

1.1 RF and Mixed-Signal Technologies 1

1.1.1 System-on-a-Chip (SOC) Technology 1

1.1.2 Integrated Passive Devices 2

1.2 Motivation and Purpose of Thesis 4

1.3 Thesis Outline and Original Research Contributions 5

References 6

CHAPTER 2 LITERATURE ANDTECHNOLOGY REVIEW 2.1 MIM Capacitors 7

2.1.1 Evolution of Capacitors in Analog ICs 7

2.1.2 Potential Applications of MIM Capacitors 9

2.1.2.1 Capacitors in RF Circuits 10

2.1.2.2 Capacitors in Mixed-Signal ICs 10

2.1.2.3 DRAM Applications 11

2.1.2.4 Decoupling Capacitors in MPU 12

2.1.2.5 Capacitor Array 12

2.2 Parameters of RF/MS Capacitors 14

2.2.1 Dielectric Constant and Capacitance Density 14

2.2.2 Temperature Coefficient of Capacitance (TCC) 15

2.2.3 Frequency Effect 15

2.2.4 Bias Effect and Voltage Linearity 16

2.2.5 Leakage Current 19

2.2.6 Dissipation Factor 20

2.2.7 Compatibility with BEOL Integration 20

2.3 International Technology Roadmap for Semiconductors (ITRS) 21

2.4 Technology Trends and Challenges 23

References 25

CHAPTER 3 HfO 2 AND LANTAHANIDE-DOPED HfO 2 FOR HIGH PERFORMANCE MIM CAPACITORS 3.1 Introduction 31

3.2 PVD HfO2 MIM Capacitors 32

3.2.1 Device Fabrication 32

3.2.2 Capacitance Density and Leakage Current 33

3.2.3 Voltage Linearity and Capacitance Density 35

3.3 Lanthanide-doped HfO2 for High Density MIM Capacitors 37

3.3.1 Tb-doped HfO2 by Co-sputtering 38

3.3.2 Capacitance Density and Leakage Current 40

3.3.3 Tb Concentration and Voltage Linearity 42

3.3.4 Properties at High Temperature 45

3.4 Benchmark 47

3.5 Summary 48

References 49

CHAPTER 4 ALD HfO 2 AND Al 2 O 3 MULTILAYERED DIELECTRICS FOR HIGH PERFORMANCE ANALOG CAPACITORS 4.1 ALD HfO2-Al2O3 Laminate MIM Capacitors 52

4.1.1 Device Fabrication 53

4.1.2 Capacitance Density and Voltage Linearity 54

4.1.3 Leakage Current and Reliability 56

4.2 HfO2-Al2O3 Laminate vs Sandwich Structure 59

4.2.1 Experimental Conditions 59

4.2.2 Results and Discussions 60

4.3 Summary 67

References 68

CHAPTER 5 HfO 2 /SiO 2 STACKED DIELECTRICS FOR HIGH PRECISION

ANALOG/MIXED-SIGNAL CAPACITORS

5.1 Introduction 72

5.2 Principle and Experiments 73

5.3 Results and Discussion 76

5.3.1 Voltage Dependence of Capacitance 76

5.3.2 Frequency and Temperature Dependence of Capacitance 80

5.3.3 Leakage Current Characteristics 82

5.4 Benchmark 84

5.5 Process Window and Extendibility 85

5.6 Summary 88

References 89

CHAPTER 6 NIOBIUM OXIDE BASED MIM CAPACITORS FOR HIGH CAPACITANCE DENSITY APPLICATIONS 6.1 Introduction 92

6.2 DC Properties 93

6.2.1 Experiments 93

6.2.2 Capacitance and Leakage Current 95

6.2.3 Thin Film Properties of Nb2O5 99

6.3 RF Characteristics 102

6.3.1 Device Fabrication and RF Characterization 102

6.3.2 RF Properties of Nb2O5-based MIM Capacitor 105

6.4 High-ĸ MIM Capacitors in Cu/Low-ĸ BEOL 109

6.5 Summary 112

References 113

CHAPTER 7 CONCLUSIOINS 7.1 Summary and Conclusions 116

7.2 Future Research Trend 118

LIST OF FIGURES

Fig 1.1 Process portfolio for system-on-a-chip (SOC) 2

Fig 1.2 Integration of passive components in a single chip results in

significant reduction of system size and removes reliability concerns related to soldered joints

3

Fig 2.1 (a) Typical MIM capacitor structure in Al metallization line and its

location in multi-layer metallization lines (b) An example of MIM capacitor in DRAM application

8

Fig 2.2 Cross sectional view of digital-analog mixed-signal circuit, where

MIM capacitor is integrated in the Cu back-end-of-the-line

Fig 2.7 Voltage dependence of the MIM capacitor using 62nm thick Ta2O5 18

Fig 2.8 Transfer curves of analog-to-digital converter (ADC) with and

without quadratic voltage coefficient (QVC) error

19

Fig 3.1 TEM picture showing the 16.4 nm and 27.1 nm thick HfO2 films 32

Fig 3.2 Capacitance densities of MIM capacitors using three different HfO2

thicknesses Densities from 4.7 up to 8.1 fF/µm2 have been achieved

33

Fig 3.3 Leakage currents for 16.4 nm and 27.1 nm thick HfO2 MIM

capacitors, which are low enough for most RF and analog applications The requirements for specific applications are indicated with dashed lines

34

Fig 3.4 Performance comparison with results in recent publication The

hatched area is where both the capacitance and the leakage current densities meet the ITRS requirement

35

Fig 3.5 (a) Quadratic VCC, α, versus HfO2 thickness HfO2 thicker than 42

nm is required to meet the requirement of 100 ppm/V2 (b) Capacitance density versus the reciprocal of dielectric thickness

36

HfO2 film thinner than 32 nm is required if ĸ = 15 to meet the requirement of 4 fF/µm2, while the film thinner than 42 nm is required if ĸ = 19

Fig 3.6 Atomic concentration of Tb in HfTbO film versus Tb sputtering

power The DC power to Hf target is fixed at 200 W 39

Fig 3.7 XPS depth profile of the sample prepared by 40 W Tb sputter

power

39

Fig 3.8 Capacitance densities of MIM capacitors using HfxTbyO with

different Tb concentrations High densities of 13.7 and 13.3 fF/µm2have been achieved for pure HfO2 and 4% Tb-doped samples, respectively

40

Fig 3.9 Leakage current densities of MIM capacitors using HfO2 and

HfxTbyO with different Tb concentrations The Lowest leakage current is found in 4% Tb-doped sample

41

Fig 3.10 Capacitance density at 100 kHz (!) and leakage current density at

3.3 V (") against Tb doping concentration The optimal Tb doping concentration is found at 4 % in this work

42

Fig 3.11 Normalized capacitance for pure HfO2 and 4% Tb-doped HfO2

Capacitance linearity is improved by Tb doping 43

Fig 3.12 (a) Quadratic VCC, Vcq, against Tb doping concentration Vcq

decreases with Tb concentration (b) Linear VCC, β, against Tb doping concentration β = 0 is obtainable with Tb doping concentration at about 5%

Fig 4.1 Dependence of capacitance density on the frequency for 13 and

43nm laminate MIM capacitors at zero bias

55

Fig 4.2 DC bias dependence of normalized capacitance (Δ C/C0) at 100 kHz

and 1 MHz for 13 and 43 nm laminate MIM capacitors

55

Fig 4.3 Leakage current versus DC bias for the 13 and 43nm laminate MIM

capacitors The insert illustrates the cumulative probability dependent on breakdown voltage of the MIM capacitors with two thicknesses of laminate

57

Fig 4.4 (a) Cumulative TDDB curves under various constant voltage

stressing for 13nm laminate MIM capacitor measured at room

58

temperature (b) Lifetime projection of 13nm laminate MIM capacitor, using 50% failure time as the criteria from Fig 4.4(a)

Fig 4.5 Schematic descriptions of the four different dielectric structures

used in this work S- and L-stand for sandwich and laminate

structures, respectively, while the numbers indicate the overall dielectric thickness in nm

60

Fig 4.6 Dependences of leakage current (J) on DC bias (V) at 125oC for the

laminate (L-53 and L-56) and sandwich (S-57 and S-59) MIM

capacitors

61

Fig 4.7 Cumulative probability of breakdown-electric-field (EBD) at 125oC

Fig 4.8 Cross-sectional TEM images associated with the laminate L-56 (a),

where the inset shows clearly the alternate Al2O3 and HfO2 layers (open and solid arrows represent Al2O3 and HfO2 layers,

respectively.) and the sandwich S-59 with 2nm Al2O3 barrier (b), where the inset reveals the size and shape of HfO2 grains

62

Fig 4.9 Comparisons of leakage current at 3.3V and 125oC, α, β and

capacitance density (at 100kHz) for the laminate and sandwich MIM capacitors together with the reported ones Star (*) means the leakage current at room temperature

64

Fig 4.10 Typical traces of leakage current (J) versus stress time at constant

electric field stress of 1.47 MV/cm and 125oC for the HfO2, sandwich and laminate capacitors

66

Fig 4.11 Stress-time-dependent normalized leakage current, I(t)/I(t=0), for

the sandwich and the laminate capacitors at a constant stress of 4.1V The laminated dielectric consists of 1nm Al2O3/5nm HfO2/1nm Al2O3/5nm HfO2/1nm Al2O3; the sandwiched dielectric is composed of 1.5nm Al2O3/10nm HfO2/1.5nm Al2O3 The inset shows distributions of EBD associated with the laminate and sandwich capacitors at 125oC

66

Fig 5.1 Technology requirement for analog/mixed-signal capacitors

Increasing capacitance density while keeping voltage linearity <

±100ppm/V2 is a challenge due to the reciprocal relationship between high-ĸ thickness and voltage linearity

73

Fig 5.2 When two different capacitors are connected in series, voltages

divided in the stack decide the voltage linearity of CStack Achieving

α ≈ 0 is possible by optimizing EOT1 (ε1/d1) and EOT2 (ε2/d2), provided α1 and α2 have opposite signs

74

Fig 5.3 Thickness measurement on PECVD SiO2 from center (1) to edge

(49) of 8-inch wafer Native oxide thickness is about 10 Å

75

Fig 5.4 The diagrams and XTEM picture of the HfO2/SiO2 stack MIM

capacitors used in this work Single layer HfO2 (12, 35, and 60 nm) and SiO2 (4 nm) MIM capacitors are also prepared for the comparison

76

Fig 5.5 Normalized C-V curves of HfO2/SiO2 stack MIM capacitors

measured at 100 kHz, showing voltage linearity of the stack capacitors can be manipulated by changing SiO2 thickness

77

Fig 5.6 The ∆C/Co curve of H/S-2 is compared with the theoretical curve,

calculated from single layer HfO2 and SiO2 MIMs using the formula

in Fig 5.2

77

Fig 5.7 (a) The trends of α and Cdensity with change of SiO2 thickness (b)

Change in α and β values with respect to Cdensity Stack H/S-2 shows

the best performance; 6 fF/µm2 and 14 ppm/V2

79

Fig 5.8 (a) HfO2/SiO2 stack MIM capacitors using different HfO2

thicknesses from 7 to 15 nm with SiO2 thickness fixed at 4 nm (b) The trend of α is reversed while β holds the same trend

79

Fig 5.9 Adding SiO2 layer improves TCC of HfO2 MIM capacitors by the

compensation effect due to negative TCC of SiO2 MIM capacitors

80

Fig 5.10 Frequency dependence of quadratic VCC α of the stack MIMs

Non-dispersive SiO2 also benefits the frequency dependence of high-ĸ MIM capacitors

81

Fig 5.11 Frequency dependence of Cdensity and tandδ of the stack MIMs

Stable frequency response of capacitance and tanδ values are observed up to 1 MHz

81

Fig 5.12 J-V characteristics for both positive and negative biases of stack

H/S-2 Smaller leakage current is observed under negative bias due

to the asymmetric barrier shape

83

Fig 5.13 Increasing SiO2 thickness causes on-set of Frenkel-Poole type

conduction at higher voltage Except H/S-1 in which SiO2 is in

direct tunneling regime, the critical voltage VC (the bias which keeps

Jleak < 10nA/cm2) is higher than 3.3 V

83

Fig 5.14 Comparison of the HfO2/SiO2 stack MIM with other high-ĸ MIM

capacitors (a) Adding SiO2 layer is better approach to meet both

Cdensity and voltage linearity requirements than increasing thickness

of high-ĸ layer (b) This is desirable for leakage current as well

With same capacitance density, VC can be even higher than that of thick single layer HfO2 MIM capacitors

85

Fig 5.15 (a) Process window: at a given HfO2 thickness of 12 nm, any SiO2

thickness between 3.3 to 6.5 nm will meet both Cdensity and VCrequirements (b) Those thicknesses will also keep VCC less than

±100 ppm/V2

86

Fig 5.16 Extendibility of the stack MIM The capacitance of up to 7 fF/µm2

with VCC ~ 14 ppm/V2 can be obtained by reducing the overall

stack thickness, until VC reaches to 3.3 V

87

Fig 6.1 Device structures and cross-sectional TEM Instead of thin middle

Al2O3 in laminate structure, thicker Nb2O5 is introduced and combined with HfO2/Al2O3 interface barrier layers

94

Fig 6.2 Capacitance densities and dissipation factors of Nb2O5-based MIMs

measured from 1 kHz to 1 MHz

95

Fig 6.3 Capacitance density vs breakdown voltage of Nb2O5-based MIM

capacitors and other high-ĸ MIM capacitors

96

Fig 6.4 Leakage currents of Nb2O5-based MIM capacitors Temperature

dependence of 17.6 fF/µm2 MIM is shown in the inset figure 97

Fig 6.5 Leakage current vs 1/Cdensity of Nb2O5–based and other high-ĸ MIM

Fig 6.7 TDDB characteristics and lifetime projection of 17.6 fF/µm2 Nb2O5

-based MIM capacitor

99

Fig 6.8 (a) Capacitance density as a function of post deposition anneal

temperature (b) C-V curves before and after 420ºC PDA

101

Fig 6.9 Grazing angle X-ray diffraction (XRD) patterns of Nb2O5 films The

Fig 6.10 C-V curves of single layer Nb2O5 MIM measured before and after

Fig 6.11 Cross sectional SEM of MIM capacitor integrated in Cu-BEOL 103

Fig 6.12 On-wafer probe setup for RF characterization from 500 MHz to 20

GHz

104

Fig 6.13 (a) Top-view of the MIM capacitor in the coplanar probe structure

The upper and lower ground probing pads act as a wave guide

preventing signal loss at high frequency (b) The dummy pattern used for open calibration

104

Fig 6.14 Frequency response of capacitances and Q factors of Nb2O5-based

MIMs with two different dielectric thicknesses 105

Fig 6.15 Extracted Cdensity (up to 20 GHz) of Nb2O5-based MIM and

Fig 6.16 Comparison between Nb2O5-based MIM and HfO2/SiO2 MIM in

terms of resonant frequencies (with three different capacitor sizes)

and Q factors (with a fixed size)

106

Fig 6.17 Equivalent circuit model for capacitor simulation at RF range C is

the core capacitor, Rp is the high-ĸ layer resistance, LS1, LS2, RS are lead line inductances and resistance, CIMD1, CIMD2 are IMD layers capacitances, CSi1, CSi2, RSi1 and CSi2 are silicon substrate capacitances and resistances

107

Fig 6.18 Smith chart display of measured and simulated s11 and s21

parameters of (a) 17.1 fF/µm2 and (b) 15.8 fF/µm2 Nb2O5-based MIM capacitors

108

Fig 6.19 Capacitance vs frequency curves for similar capacitance values of

high-ĸ and Si3N4-MIM capacitors in Cu/low-ĸ (Black-DiamondTM)

109

Fig 6.20 Smith chart display of measured and simulated s11 and s21

parameters of (a) Si3N4 and (b) HfO2-Al2O3 laminate MIM capacitors

111

Table 4.1 Comparison of various high capacitance density MIM capacitors

using high-ĸ dielectrics

58

█ C HAPTER 1

Introduction

The explosive growth of the internet and wireless communications market has been served by radio frequency (RF)/mixed-signal (MS) technologies RF/MS chips are those that at least partially deal with input signals whose precise values matter This broad class includes RF, analog, analog-to-digital and digital-to-analog conversion, and a large number of mixed-signal chips where at least part of the chip design needs

to measure signals with high precision These chips have very different design and process technology demands than digital circuits

1.1.1 System-On-a-Chip (SOC) Technology

Personal computers are built around a microprocessor and memory Their computing speed and cost continually improve with Moore’s law on scaling of MOS transistors

In contrast, for instance, most wireless products depend on digital signal processors (DSP), together with analog functionality, and are required to perform according to preset standard specifications Thus, for most wireless products, scaling transistor dimensions alone is insufficient It becomes necessary to integrate the DSP and analog

functions into a mixed-signal “System-on-a-Chip” (SOC) to maintain a competitive pace of improvement in system cost and performance As the demand for portable digital devices, which have to deal with RF and analog signals such as sound and image at the same time, grows rapidly, it is imperative to develop advanced integrated RF/mixed-signal circuits Fig 1.1 shows one of the examples of SOC schemes, a

process portfolio for so-called camera-ready cell phone SOC technology, where the

analog part converts analog images taken by a CMOS Image Sensor (CIS) to a digital signal for the logic Micro Process Unit (MPU) before being saved in embedded memory

Fig 1.1 Process portfolio for system-on-a-chip (SOC)

1.1.2 Integrated Passive Devices

Since the invention of the integrated circuit, continuous reduction in charge required for logic storage and operations has resulted in a steady increase in the density of logic gates and memory cells on a single chip The outcome of this is a decrease in the total area of chips in a system for a given amount of system functionality However, in electronic systems that utilize analog signals, such as cell phones, GPS (Global

Positioning System) receivers, and audio/video equipment, circuit layouts depend more on such factors as impedance levels and signal path properties Therefore, passive devices for these applications have not shrunk in size as rapidly as active devices Adding to the problem is the fact that increasing numbers of passive devices are required in modern wireless applications due to the larger fraction of analog signals involved [1.1] For instance, inside a typical cell phone there are only a few integrated circuits but numerous passive components that are used for functions such as transmit/receive RF signals and analog-to-digital conversions (More than 70% of the circuit board of a mobile phone is occupied by passive components such as resisters, inductors, and capacitors.) Therefore, there is a potentially significant cost and performance benefit with integrating many of these functions as part of an existing digital baseband chip As the industry attempts to develop RF and analog circuitry in SOC technology, the integration of these passive devices (Fig 1.2), which are new to silicon technology, is seen as a bottleneck [1.2]

Fig 1.2 Integration of passive components in a single chip results in significant

reduction of system size and removes reliability concerns related to soldered joints

1.2 MOTIVATION AND PURPOSE OF THESIS

Among the passives, capacitors occupy more area than the sum of the others, and they can be vastly affected by process engineering while the improvement in resistors and inductors are mainly done through design [1.3] Particularly, the recent introduction of high-ĸ materials to silicon processing enhanced the expectation on emergence of capacitors with ever higher densities While application of high-ĸ dielectrics to DRAM cells is already matured [1.4], much less progress has been done in analog and RF circuit applications, where SiO2 or Si3N4 based capacitors are being used [1.5] This is due to the special and stringent device specifications required for RF/MS circuits [1.6], which will be discussed in detail in the following chapter This initiated the current research topic, high-ĸ metal-insulator-metal (MIM) capacitors for RF/MS circuit applications

Despite rapidly growing demands, the progress and development pace with high-ĸ dielectrics in RF/MS MIM capacitors have not been as fast as those in DRAM cell capacitors, as the system improvement has mainly been relying on design innovations With the sudden surge of SOC technology, the industry is now suffering from a lack of information on the feasibility and the performance of high-ĸ MIM capacitors from the view point of RF/MS IC applications This thesis explores and provides various mid- and long-term solutions to RF/MS capacitors by developing and demonstrating novel high-ĸ dielectrics suitable for RF/MS SOC technology

A review on literature and recent MIM capacitor technology trends and requirements is presented in Chapter 2

In Chapter 3, the performance of MIM capacitors using PVD HfO2 and lanthanide (Tb)-doped HfO2 is described It is demonstrated that incorporation of lanthanide series material into a HfO2 film improves the film quality as well as voltage linearity

of an MIM capacitor

High performance MIM capacitors using HfO2-Al2O3 laminates are developed, and underlying reasons why laminate capacitors out-perform the counterpart using Al2O3-HfO2-Al2O3 sandwich structures is studied in Chapter 4

In Chapter 5, a new approach to improve voltage dependence of capacitance in MIM capacitors is presented, by using HfO2-SiO2 stacked dielectrics This work may contribute to overcome one of the technology barriers related to voltage linearity in MIM capacitors [1.6]

In Chapter 6, novel Nb2O5, whose ĸ value is higher than 40, is introduced for an

RF bypass capacitor application High frequency properties, up to 20 GHz, for Nb2O5MIM as well as HfO2-SiO2 stack MIM capacitors are demonstrated after integration in Cu-back-end-of-the-line (Cu-BEOL) This is the first demonstration of a high capacitance density RF/MS MIM capacitor integrated in a Cu-BEOL process The RF properties of high-ĸ MIM capacitors are further investigated in standard Cu/low-ĸ interconnect technology for the first time

Finally, the thesis is completed with a summary and conclusions in Chapter 7

[1.1] R K Ulrich et al., “Getting aggressive with passive devices,” Circuits &

Devices, pp.17-25, Sep 2000

[1.2] J N Burghartz, “Silicon RF technology – the two generic approaches,” 27 th

European Solid-State Device Research Conference (ESSDRC), pp 316-328,

1997

[1.3] J N Burghartz, “On the design of RF spiral inductors on silicon,” IEEE Trans

Electron Devices, vol 50, no 3, pp 718-729, Mar 2003

[1.4] D –S Kil et al., “Development of highly robust nano-mixed HfxAlyOz

dielectrics for TiN/HfxAlyOz/TiN capacitor applicable to 65nm generation DRAMs,” in Symposium on VLSI Technology Tech Dig., 2004, pp 126-127

[1.5] C H Chen et al., “A 90nm CMOS MS/RF based foundry SOC technology

comprising superb 185 GHz fT RFMOS and versatile, high-Q passive

components for cost/performance optimization,” in IEDM Tech Dig., 2003,

pp.39-42

[1.6] The International Technology Roadmap for Semiconductors, Semiconductor

Industry Association (SIA), 2004

█ C HAPTER 2

Literature & Technology Review

2.1.1 Evolution of Capacitors in Analog ICs

Traditionally, capacitors in ICs have been roughly grouped into two types - a MOS capacitor and a double-poly capacitor Furthermore, each capacitor is respectively classified into single-gate and multi-gate types The four kinds of capacitors have become candidates for analog circuit elements Historically limited by the lack of techniques for low temperature deposition of high quality thin dielectric layers, capacitor integration in silicon technologies has been based predominantly on the availability of high quality dielectric layers in front-end processing Such capacitors are realized by using LPCVD poly-silicon layers degenerately doped by high dose phosphorus implants or in-situ doping techniques, and thermal oxidation or high temperature deposition for the dielectric Carefully balancing and minimizing the polysilicon depletion effect results in excellent voltage linearity (compared to a MOS capacitor), while the fine grain structure of the LPCVD poly layers assures good capacitor matching However, a high level of doping concentration is required for both bottom and top plates to obtain the desired voltage linearity, and an additional mask is needed due to incompatibility with the requirements for the CMOS gate doping levels, which results in a significant increase of the manufacturing cost

While the double polysilicon capacitor is a well-established analog component, it suffers from limited RF capability in the multi-GHz range The limitations in the poor quality factor are primarily due to the resistive losses in the plates and contacts and due

to the parasitic capacitance between the passive component and the lossy silicon substrate The bottom and top polysilicon layers can be replaced by metal electrodes such as TiN, thus now called metal-insulator-metal (MIM) capacitor, for smaller series resistance and it is placed on top of metal lines to avoid cross talk between the silicon substrate

Examples of the integrated MIM capacitors are shown in Fig 2.1 and 2.2 A plane type MIM capacitor, generally used in RF/MS circuits, is shown in Fig 2.1(a) These types of capacitors are located below the top metal layer to avoid parasitic coupling to the Si substrate One example of MIM capacitors used in a DRAM cell is illustrated in Fig 2.1(b) The MIM capacitor in SOC technology, where both digital baseband and analog circuit are integrated in a single substrate, is shown in Fig.2.2

Fig 2.1 (a) Typical MIM capacitor structure in Al metallization line and its location in

multi-layer metallization lines (b) An example of MIM capacitor in DRAM application

Fig 2.2 Cross sectional view of digital-analog mixed-signal circuit, where MIM

capacitor is integrated in the Cu back-end-of-the-line

2.1.2 Potential Applications of MIM Capacitors

Growing demands on high performance/density capacitors in internet and wireless communication markets have been briefly mentioned in the previous chapter Nowadays, a simple planar MIM structure is predominantly used for capacitors in ICs, with either SiO2 or Si3N4 as the insulator It was mentioned in Section 2.1.1 that the main advantage of an MIM structure compared to traditional metal-oxide-semiconductor (MOS) or poly-to-poly (PIP) structures is its low series resistance in the electrodes Thus, MIM capacitors are very valuable in many applications In this section, the broad range of possible applications of MIM capacitors will be introduced

2.1.2.1 Capacitors in RF Circuits

In RF circuit design, capacitors are often used in oscillator circuits, phase shift networks, and for coupling and bypass capacitors [2.1] Both terminals of coupling capacitor are in the high frequency signal path, so the parasitic capacitance to the reference plane, active devices, and other signal lines should be minimized A recent paper at the 2000 Symposium on VLSI Circuits describes a single-chip 2.4 GHz direct conversion CMOS receiver [2.1] Coupling and bypass capacitors are used in several

RF circuits in this chip

In general, when MIM capacitors are used in RF circuits, the dielectric loss must be extremely small and the series resistance of the wiring should be minimized for high frequency applications This indicates that it is desirable to use short interconnect wires with low specific resistance A MIM capacitor integrated in a copper/low-ĸ metallization must fulfill these requirements The deposition temperature of the MIM dielectric also must be low enough to be compatible with the metallization stack and the low-ĸ inter-metal dielectric

The parasitic capacitance to other terminals and to the substrate also should be minimized The MIM capacitor will have low parasitic if it is fabricated immediately below the top metal level in conjunction with low-ĸ interconnect materials, which is very desirable for such application In some circuits, the precision of the absolute capacitance value is essential In other circuits, it is the capacitance matching between adjacent capacitors that is important

2.1.2.2 Capacitors in Mixed-Signal ICs

A digital circuit has two signal levels between the total voltage swing An analog circuit can divide the total voltage swing into 1000 discrete signal levels A 1% noise

from the digital circuit can cover 10 discrete signal levels in an adjacent analog circuit The noise coupling can occur through the electromagnetic energy in the free space, the signal lines placed close together, or the return current in the reference planes in the IC

or in the package substrate The designer pays close attention to the layout of all signal lines and the reference plane

Usually, the digital and analog circuits may share the same ground (or voltage) plane, which is separated into two regions having only a narrow metal strip connecting them The narrow metal strip has high impedance for the high frequency digital signal Decoupling capacitors should be placed on both ends of this metal strip to filter out all high frequency noise On-chip MIM capacitors will be very useful for such purpose

2.1.2.3 DRAM Application

The bottom electrode for the DRAM cell has extremely small features and a high aspect ratio The dielectric should have extremely low leakage current and high charge storage density to achieve 25 fF/cell The high-ĸ thin film should have good step coverage on the high aspect ratio, small feature size bottom electrode One can use chemical vapor deposition (CVD) to achieve good step coverage, followed by annealing to minimize leakage current

The requirement and the process considerations are quite different from those for

RF or analog circuit applications [2.2] For example, the location of DRAM cells, below the 1st metal line, allows using processes at high temperature For this reason alone, the approach to the process development will be significantly different from that

of analog or RF capacitors

2.1.2.4 Decoupling Capacitors in MPU

Besides the DRAM cells, the other application of MIM capacitor to digital circuit is a decoupling capacitor in micro-process units (MPUs) High-frequency operation of digital logic circuitry places severe demands on power distribution systems to supply stable, noise-free power during the clock-driven simultaneous switching of thousands

or millions of transistor gates Decoupling capacitors are necessary to supply large current surges, ramping as fast as 500 A/ns, to high-power microprocessor and logic ICs during the switching portions of the clock cycles The purpose of this is to ensure that unacceptable drops in logic voltage levels do not occur due to the high current demands on a power supply that may be located many inches away down narrow conductor paths Between cycles of current demand, the power distribution system recharges these capacitors in preparation for the next switching cycle [2.3]

High density capacitors are required for this application as well For example, for a

100 W CPU with 1.5-volt supply voltage at 1 GHz clock frequency, the decoupling capacitance required is 400 nF For a MIM capacitor having a dielectric with EOT (equivalent oxide thickness) = 1 nm, the capacitance is 34.5 fF/µm2 This will take an area of 11.6 mm2 to get 400 nF

2.1.2.5 Capacitor Arrays

The ability to convert digital signals to analog and vice versa is very important in signal processing The digital-to-analog conversion (DAC) is a process in which digital words are applied to the input of the DAC to create from a reference voltage an analog output signal that represents the respective digital word One of the most popular architectures of the DAC is using capacitor arrays as shown in Figs 2.3 and 2.4 [2.4], where charges are stored in the unit capacitors according to the input digital signal

The most important parameters in such a capacitor array are voltage linearity and matching The unit capacitors used in this example are poly-to-poly capacitors and implementing of MIM capacitors will improve voltage linearity as the poly-depletion effect is absent in them Significant reduction in chip size is expected by replacing conventional SiO2 in PIP capacitor with high-ĸ dielectrics in combination with metal electrodes

Fig 2.3 Charge scaling digital-to-analog converter (DAC) architecture

Fig 2.4 Layout of the capacitor array using unit capacitor configuration

2.2 PARAMETERS OF RF/MS CAPACITORS

The major evaluation parameters of the capacitors are their dielectric constant, leakage current density, breakdown field strength, capacitance dependence on the voltage, temperature, and frequency The actual requirements for the capacitors in the circuits are not straightforward but depend on their applications For example, blocking capacitors are more sensitive to leakage current than decoupling capacitors, and capacitors incorporated into active filter devices require precise and tight tolerance control of capacitance Some of the most important parameters are briefly reviewed in this section

2.2.1 Dielectric Constant and Capacitance Density

Capacitance or capacitance density is a direct function of dielectric constant ĸ However, the name “dielectric constant” is somewhat of a misnomer since it is not necessarily constant with regard to temperature, frequency, voltage, and time The ĸ values given for the ferroelectrics in the literature are maximum amounts, because their specific values depend on grain size, crystal orientation, electrical bias, frequency, and film thickness Ferroelectrics must posses crystal structure in order to exhibit high dielectric constants, otherwise their ĸ values are no higher than typical paraelectrics The dielectric constant reported for ferroelectrics is highly dependent on processing and measurement conditions, but the values reported for paraelectrics are only weakly dependent on how they are fabricated or how the ĸ values are measured, and represent typically achieved values, making themselves more useful for many RF/MS circuit applications where stable capacitance values are required Only a few paraelectrics exist in multiple crystal forms such as amorphous and hexagonal Ta2O5 [2.6]

Because integrated RF/MS capacitors are planar and area-ruled, the best way to express their value is as capacitance per unit area or “capacitance density” in the unit

of “fF/um2.” Throughout this thesis, as is in most literature, this unit will be used to specify the capacitance density of the MIM capacitors

2.2.2 Temperature Coefficient of Capacitance (TCC)

The temperature coefficient of capacitance (TCC) is an important parameter as the device temperature during the actual circuit operation is usually much higher than room temperature The TCC is defined as the temperature derivative of dimensionless capacitance and is usually expressed in ppm/ºC;

)(

)(

11

1 2

1 2

1 T T

C C C dT

dC C

300 ppm/oC

2.2.3 Frequency Effect

Frequency can affect the dielectric constant of both paraelectric and ferroelectric dielectric through a relevant polarization mechanism For instance, for a material to exhibit a constant ĸ value with frequency, the dipole must reverse direction at the same rate for the polarization to remain in synchronization with the field As the frequency increases, it may outrun the ability of the particular dipole to keep up with the reversals, resulting in the dipole being effectively shortened and a decrease in dielectric constant

with frequency Of the charge storage mechanisms, only ionic motion in ferroelectrics, for example the Ti+4 in the BaO3-4 cage, is affected at frequency below the infrared range Fig 2.5 shows the dielectric constant measured at various frequencies normalized to the value at low frequencies for the three ferroelectrics and three paraelectrics [2.9] While the paraelectrics show no significant decrease, the ferroelectrics show a sharp drop-off, which is not suitable for most analog applications Nevertheless, it should be remembered that ferroelectrics might start with such a high

ĸ that, even at GHz frequency, they may still have a higher dielectric constant

0.00.20.40.60.81.0

1.2

SiO2, Al2O3, Ta2O5

BSTBaTiO3

2.2.4 Bias Effect and Voltage Linearity

Figure 2.6 shows ĸ versus bias voltage for Ta2O5 and BST [2.9] Many ferroelectrics exhibit a marked decrease in dielectric constant with increasing DC bias, which is useful in fabricating a variable capacitor for tuning applications, but not suitable for most of the integrated RF/MS capacitor applications

0 50 100 150 2000.0

0.20.40.60.81.01.2

Ta2O5 film [2.13] Voltage linearity or voltage dependence of capacitance is evaluated

by voltage coefficient of capacitance (VCC) VCC can be approximated by C(V) = C0(αV2+βV+1) [2.12], where C0 is the capacitance at V = 0, and α, β are the quadratic and linear coefficients of the capacitance respectively, as determined by using a second order polynomial curve fit to measured data The quadratic term, α, indicates the variance of the capacitance on the applied bias while the linear term, β, shows the

balance of the capacitance As will be discussed in Section 2.2.8, a and ß are required

to be less than 100 ppm/V2 and 1000 ppm/V for general analog and RF bypass capacitor applications, respectively In a power amplifier circuit, the linear coefficient

ß in the bypass capacitor creates second-order harmonics and causes distortion in gain

vs frequency curve [2.14] On the other hand, in the ADC or DAC circuits, even-order

harmonics can be canceled out by taking the differential output [2.11] The odd-order harmonics generated by quadratic voltage coefficient (QVC) a cause a “bowing” effect

to the transfer curve of the ADC as shown in Fig 2.8 [2.15] The underlying mechanism of this microscopic range of voltage dependence of capacitance is yet to be fully understood, although there was recently a plausible explanation using a model based on trapping/de-trapping of injected carriers in the dielectric [2.16], [2.17] In parts of Chapters 3, 4, and 5, it will be shown how voltage linearity can be improved

by incorporating a foreign material into the dielectric and combining multi-layers of dielectrics

Fig 2.7 Voltage dependence of the MIM capacitor using 62nm thick Ta2O5

Fig 2.8 Transfer curves of analog-to-digital converter (ADC) with and without

quadratic voltage coefficient (QVC) error

2.2.5 Leakage Current

In this thesis, leakage current of high-ĸ dielectrics in metal-insulator-metal structures

is one of most important interests In fact, most efforts in developing novel high-ĸ MIM capacitors are devoted to find ways to suppress leakage current while increasing capacitance density This is because one of the concerns with many high-ĸ materials is unacceptably high leakage current While the basic mechanisms underlying leakage under various experimental conditions are still unclear, most observations have shown two mechanisms responsible for the leakage currents in high-ĸ MIM structures One is Pool-Frenkel (PF) emission of the trapped electrons to the conduction band of the dielectric, and the other is Schottky emission of Fermi level electrons directly from the electrode to the conduction band of the dielectric [2.18] The former is limited by the bulk properties of the dielectric, while the latter is decided by dielectric/electrode interface properties Schottky emission related currents can be significantly reduced by using high work function materials such as Pt [2.3], [2.19], which are common to

DRAM cell capacitors However, most efforts in the present thesis are focused on improving bulk (or bulk adjacent to metal electrodes) resistivity since the electrode material for RF IC MIM capacitors is primarily decided by Cu diffusion barriers in BEOL, which is typically TaN or Ta [2.20] Obviously, low leakage current is always desired, however such requirement may be relaxed to some extent when the circuit clock speed increases [2.10]

2.2.6 Dissipation Factor

The dissipation factor is a measure of how much energy is lost in the dielectric during

AC operation If the mobile charges in the dielectric cannot respond fast enough to changing fields, or if there are resistive losses in the dielectric or capacitor plates, then the current and voltage deviate from exactly the ideal value of 90o out of phase This angular difference is called the loss angle and usually has the symbol δ The tangent of the loss angle is called the dissipation factor, and is zero for a capacitor that dissipates

no wasted energy The reciprocal of the dissipation factor is the quality factor, Q A

dissipation factor under 0.1% (tanδ = 0.001) is considered to be quite low and 5% is high [2.9] Generally, very low dissipation factors are desired for RF applications in which signal losses must be avoided, but much higher values can be tolerated for energy storage applications such as de-coupling capacitors

2.2.7 Compatibility with BEOL Integration

The fabrication of the capacitors needs to be compatible with existing ULSI backend processes Thus, a high quality dielectric must be formed at a low temperature less than 450ºC, which is limited by the melting temperatures of Al lines or underlying dielectrics

2.3 INTERNATIONAL TECHNOLOGY ROADMAP FOR

SEMICONDUCTORS (ITRS)

The RF/MS capacitor technology requirements in the ITRS-2001 [2.10] are shown in Tables 2.1 and 2.2 Table 2.1 shows the requirements up to year 2007 while Table 2.2 describes the requirements beyond year 2010 It is noted that there are two categories

in the table; analog capacitor and RF bypass capacitor The requirements are different

as their functions in the circuit are different

High capacitance density is always desired, but usually limited by other parameters such as leakage current and voltage linearity For RF bypass or de-coupling functions, capacitance density as high as 10 fF/um2 are required from year 2005, while in analog

or mixed-signal circuits, accuracy of the capacitance is given the priority At the moment, the capacitance densities the industries can provide are not as high as those specified in the roadmap when other parameters are all satisfied Therefore, today’s capacitors usually occupy a larger area than what the circuit designers desire As the product size becomes smaller and more functions are added, the demand for the smaller size capacitors will continue to increase

It should be noted that the capacitor requirements specified in ITRS roadmap are general guidelines and the actual requirements may vary depending on the specific applications Table 2.3 is a device requirement for on-chip capacitor specified by one of the major process tool manufacturers [2.21] The application

is classified into three, and it is noted that the requirements for capacitance density, leakage current, and voltage linearity are slightly different from those in the ITRS roadmap Guidelines for maximum operating voltage, temperature coefficients, and parasitic capacitance are also provided

Table 2.1 Mixed-signal Capacitor Technology Requirements ― Short-term

White - manufacturable solutions exist, and are being optimized

Light gray - manufacturable solutions are known

Dark gray - manufacturable solutions are not known

Table 2.3 Desired device requirements for on-chip capacitors for RF and

mixed-signal applications [2.21]

High Precision Capacitor

High Density Capacitor

By-Pass Capacitor

Currently, most of the IC foundries offer MIM capacitor modules with densities around 1 fF/µm2, using SiO2 or Si3N4 based dielectrics Si3N4 MIM capacitor was introduced in late 1990s [2.1]-[2.1], [2.22]-[2.23] and is still predominantly used There are generally three different trends in the research and technology development involving RF/MS MIM capacitors

Firstly, integration of SiO2/Si3N4 MIM capacitors into copper/low-ĸ the-line (BEOL) has been a hot issue for the past several years [2.24]-[2.28] This work was led by major IC chip makers such as IBM, Motorola, Toshiba, TSMC etc They demonstrated high frequency performances of MIM capacitors integrated into Cu metallization process module, while some other companies proposed innovative ways

back-end-of-of integration with minimum number back-end-of-of additional masks The capacitance density reported in these works ranges from 0.44 to 1.6 fF/µm2

Secondly, extensive studies are being carried out to improve the properties of the

Si3N4 dielectric film itself [2.29]-[2.31] It is because low-temperature PECVD Si3N4

displays significant sensitivity to operation frequency, bias voltage, and temperature when compared to SiO2.

Lastly, there have been great interests to replace SiO2 or Si3N4 with higher dielectric constant materials such as Al2O3, Ta2O5, and HfO2 [2.32]-[2.35] A thin Al2O3 and AlTiOX (12 nm) were recently employed to fabricate MIM capacitors [2.36] High capacitance density of 5 and 10 fF/µm2 were achieved for Al2O3 and AlTiOX However, very high linear and quadric voltage coefficients of capacitance of Al2O3 (1888 ppm/V and 2051 ppm/V2) make it impossible to meet the specifications for a very precise analog capacitor As for the AlTiOX MIM capacitor, it shows very large capacitance reduction with increasing frequencies, and it suffers from very high leakage current in the order of 1 A/cm2 at 1 V MIM capacitors using an amorphous Ta2O5 film were

reported by Yoshitomi et al [2.23] and Ishikawa et al [2.37] The maximum capacitance density of Ta2O5 MIM capacitors by Ishikawa et al is 12 fF/µm2 with a leakage below 1×10-7 A/cm2 at the electric field of up to 2 MV/cm The best VCC obtained was 400 ppm/V2 for a density of 4.4 fF/µm2

HfO2 was once considered the best candidate to replace SiO2 as the gate dielectric

in MOSFET applications before thermal stability issues surfaced [2.38], [2.39] However, the application of HfO2 to MIM capacitor has no such concern as the process temperature in BEOL is limited to around 450oC Recently, a very good performance HfO2 MIM capacitor, with a capacitance density of 3.0 fF/µm2 and VCC less than 100 ppm/V2, has been demonstrated [2.34] This work showed high potential of HfO2based MIM for RF/MS capacitor applications Although promising, the high-ĸ (both

Ta2O5 and HfO2 based) MIM capacitors reported up to now are close to satisfying only short-term solutions to the requirements specified in the RF/MS application