Study of metal gates high k dielectrics in nanoelectronics

Good epitaxial structure of Ni films with suitable effective work function indicates that Ni is a promising metal gate candidate integrated with LaAlO3 high-k dielectrics films in PMOS

STUDY OF METAL GATES AND HIGH-K DIELECTRICS IN

NANOELECTRONICS

MI YANYU

NATIONAL UNIVERSITY OF SINGAPORE

2007

STUDY OF METAL GATES AND HIGH-K DIELECTRICS IN

NANOELECTRONICS

MI YANYU (B Sc., M Sc., Xi’an Jiaotong Univ.)

A THESIS SUBMITTED

DEPARTMENT OF PHYSICS NATIONAL UNIVERSITY OF SINGAPORE

Acknowledgement

I would like to express my gratitude my advisors: Prof Ong Chong Kim from National University of Singapore and Prof Huan Cheng Hon Alfred from Nanyang Technology University for their support and excellent supervision It is really an honor for me to get the guidance from them, and I have learnt much from them in the last few years

I want to thank my co-supervisor: Dr Wang Shijie, the research scientist from Institute of Materials Research & Engineering He has constantly provided me with assistance and valuable advice to improve my research work and has always been

supportive of my research endeavors Thanks for teaching me hands-on skills on in situ

XPS, HRTEM, and giving me ample freedom to learn more techniques used in this research work I am truly grateful for all the help and encouragement he has given me during the latest four years

This research work was carried out at both NUS and IMRE, where I have met and collaborated with many talented and generous graduate students and colleagues over the last few years Working with them turns the Ph.D study to a happy memory for me Thanks to Ms Li Qin and Dr Dong Yufeng from my research group Thanks for all enlightening scientific and private discussions and their excellent teamwork We had a good time together

Thanks to the staffs and students at IMRE for their warm help on my research work: Dr Pan Jisheng, Dr Foo Yong Lim, Dr Chai Jianwei, Ms Chow Shue Yin, Mr

Zhang Zheng, Mr Lim Poh Chong, Mr Chan Yong Seng Kelvin, Dr Seng Hwee Leng Debbie, and Ms Lai Mei Ying Doreen

Thanks to the staffs and students at NUS for their support and encouragement on

my research work: Prof Feng Yuanping, Dr Gao Xingyu, Dr Gao Xingsen, Mr Ning Min, Mr Yang Ming, Ms Chen Qian, Ms Liu Yan, Mr Liu Huajun, Mr Chen Shi,

Mr Qi Dongchen, and Dr Ng Tsu Hau

Last but not least, I would like to thank my parents, without whom I would not be the person I am today Thanks for their love, encouragement, and support throughout

my life Special thanks go to my husband, Li Qi, for his love and support

If I forgot anybody in this list, it was done by mistake rather than intention

1.4.1 Band offsets at high-k dielectrics/semiconductor interfaces

1.4.2 Schottky barrier height at metal gate/high-k dielectrics interfaces

2.1.1 High-k dielectrics deposition techniques

2.1.2 Metal gates deposition techniques

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2.2.1.3 Instrument and application of XPS

2.2.2 High Resolution Transmission Electron Microscopy (HRTEM)

2.2.2.1 Principle of TEM

2.2.2.2 Specimen preparation for HRTEM

2.2.2.3 Instrument and application of HRTEM

2.2.3 Other characterization techniques

2.3 Computational method (First-principles calculations)

References

Chapter 3 High-k dielectrics/semiconductors Stacks

3.1 Introduction

3.2 Growth and electronic properties of high-k dielectrics/semiconductor

3.2.1 Epitaxial SrTiO3/Si

3.2.2 Epitaxial and amorphous LaAlO3/Si

3.2.2.1 Epitaxial LaAlO3/Si

3.2.2.2 Amorphous LaAlO3/Si

3.2.3 LaAlO3/Ge and LaAlO3/GeOxNy/Ge

3.2.4 LaAlO3/SiGe/Si and LaAlO3/SiOxNy/SiGe/Si

3.3 Thermal stability of high-k dielectrics/semiconductor

3.3.1 LaAlO3/Ge and LaAlO3/GeOxNy/Ge

3.3.2 LaAlO3/SiGe/Si and LaAlO3/ SiOxNy/Si

4.2.1 Growth of epitaxial Ni films on crystalline LaAlO3(001) films

4.2.1.1 HRTEM study of Ni films

4.2.1.2 Effective work functions of Ni films

4.2.2 Evolution of Fermi level position at Ni/LaAlO3 (001) interfaces

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4.3.1 Growth of epitaxial Ni films on MgO(001)

4.3.1.1 Surface morphology studied by AFM

4.3.1.2 Surface and interface structure studied by HRTEM

4.3.2 Schottky barrier height (SBH) at Ni/MgO(001) interfaces

4.3.2.1 Evolution of Fermi level position and SBH

5.2 Nitridation treatment on LaAlO3 films

5.2.1 Nitridation of LaAlO3/Si and its thermal stability

5.2.2 Nitridation of LaAlO3/Ge and its thermal stability

5.2.3 Nitridation of LaAlO3/SiGe and its thermal stability

5.3 Nitridation treatment on SrTiO3(001) films

5.3.1 Introduction

5.3.2 Optical and electronic properties of nitrogen-doped SrTiO3(001)

films and their thermal stability

5.3.3 First-principles calculation of electronic structure of

nitrogen-doped SrTiO3 (001) films

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Abstract

The continual downscaling of complementary metal oxide semiconductor field effect transistors (CMOSFETs) devices not only requires the replacement of SiO2 or SiOxNy gate oxides with high-k dielectrics, but also requires the replacement of

conventional poly-silicon (poly-Si) gate with metal gates To achieve this goal, in this

thesis, the integration of metal gates and high-k dielectrics materials with

semiconductors was studied by using both experimental and theoretical methods

The growth and characterization (e.g electronic structure, thermal stability) of

LaAlO3 films on various semiconductor substrates (Si, Ge, and Si0.75Ge0.25) were

studied by high resolution transmission electron microscopy (HRTEM) and in situ

x-ray photoelectron spectroscopy (XPS) The high enough band offsets (> 1 eV) between LaAlO3 films and various semiconductor substrates (Si, Ge and Si0.75Ge0.25) indicate that LaAlO3 dielectrics is a promising candidate to be integrated with various semiconductors in the downscaling of CMOSFETs devices The effect of interfacial oxynitride layer on the band alignments and thermal stabilities of LaAlO3 films on Ge and Si0.75Ge0.25 substrate was also studied It was found that the interfacial oxynitride layer changed the band alignments by modifying the interfacial dipoles, which indicates that nitridation treatment not only acts as a surface passivation layer but also changes the interfacial electronic structures

Ni was chosen as a prototype of metal gates to be epitaxially grown on LaAlO3(001) and MgO(001) high-k dielectrics Good epitaxial structure of Ni films

with suitable effective work function indicates that Ni is a promising metal gate candidate integrated with LaAlO3 high-k dielectrics films in PMOS devices The

evolution of Schottky barrier height (SBH) and Fermi level positions at Ni/LaAlO3(001) and Ni/MgO(001) interfaces were studied by in situ XPS, and an

upward band bending was found at the initial Ni growth stage First-principles calculations based on Density Functional Theory (DFT) was employed to understand the underlying physical mechanisms Adatom-induced states (or interfacial bonding states), metal induced gap states (MIGS) and defects states were used to rationalize the

evolution of Fermi level and corresponding SBH in this metal/high-k dielectrics system

with various interface structures This work implies that SBH can be engineered by interface structure control, and is expected to shed light on the effect of interface

structures on the formation mechanism of SBH at metal/high-k dielectric oxides

interface

The effect of nitridation on the electronic structures and thermal stabilities of

high-k dielectrics films (LaAlO3, SrTiO3) films was studied by using in situ XPS,

spectroscopic ellipsometry (SE), x-ray absorption spectroscopy (XAS) and First-principles calculations It was found that nitrogen doping not only can passivate

the oxygen vacancies in high-k dielectrics films but also can change the electronic structure of high-k dielectric films This work suggests that the nitridation process should be well-controlled to optimize the performance of high-k dielectric films

List of Figures

Chapter 1

Figure 1.1 Energy band diagram for illustrating the core-level based XPS

method to investigate the band offsets at high-k dielectrics/Semiconductor

interfaces For simplify, Si is chosen as an example of semiconductor and Si

2p (Esi 2p) is chosen as core-level reference………

Figure 1.2 Energy band diagram of a MOS diode in thermal equilibrium Evac

is the vacuum level Φm,vac is the vacuum work function of metal gate Φm,eff

is the effective work function of metal gate on gate dielectric ΦSi is the work

function of p-Si substrate Φn is the barrier height between metal and gate

dielectric CBO is the conduction band offset between gate dielectric and Si

EA is the electron affinity of Si (~ 4.05 eV) Δ1 and Δ2 denote the vacuum

level discontinuity at the two interfaces………

Chapter 2

Figure 2.2 Schematic Pulsed Laser Deposition (PLD) system………

Figure 2.3 Physical process in thin films growth with PLD: (1) Plasma due to

interaction between the laser beam and the target; (2) Plasma due to

interaction of evaporated materials with the laser beam; (3) Adiabatic

expansion of the plasma;(4) Growth of thin films………

Figure 2.4 Schematic Omicron EFM3 e-Beam evaporator system…………

Figure 2.5 Schematic photoemission process of XPS………

Figure 2.6 Schematic XPS measurement………

Figure 2.7 Main components of VG ESCA LAB-220i XL XPS system……

Figure 2.8 Schematic diagram of a transmission electron microscope………

Figure 2.9 The real image of a Philips CM300 FEG-TEM system…………

Chapter 3

Figure 3.1 X-ray diffraction θ-2θ scan of SrTiO3 thin films on Si (001) The

inset of shows the Phi (φ) scans of SrTiO3 (111) plane and Si(111) plane……

Figure 3.2 Cross-sectional HRTEM image of epitaxial SrTiO3 films grown

on Si(001) substrate………

Figure 3.3 (a) X-ray diffraction θ-2θ scan of LaAlO3 thin films on Si (001)

The inset of shows the Phi (φ) scans of LaAlO3 (111) plane and Si (111)

plane………

Figure 3.4 Cross-sectional high resolution TEM image shows the epitaxial

growth of 185Å-thick LaAlO3 films on Si (001)………

Figure 3.5 Valence-band (left side) and shallow core level (right side) x-ray

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photoelectron spectra for bare n-Si (001) bulk (Fig.3.5(a) and (b)), thick

LaAlO3 films (Fig.3.5(c) and (d)) and LaAlO3(30Å)/Si heterojunction

(Fig.3.5(e) and (f)) In Fig 3.5(e), the simulated VB spectrum (solid line) was

compared with the experimental VB spectra (open circles) for LaAlO3 (30Å)

/Si heterojunction The VB spectra of bare Si (001) substrate and thick

LaAlO3 films were also inserted as reference……….…

Figure 3.6 (a) Energy loss spectra of O 1s photoelectrons for crystalline

LaAlO3 films with different film thicknesses (185 Å and 70 Å) The arrow

shows the band gap energy, which was determined by an intercept of the

linear extrapolation of the spectrum near the leading edge (b) The energy

band diagram for crystalline LaAlO3/SrTiO3/n-Si (001) systems………

Figure 3.7 Valence band spectra of amorphous LaAlO3 films (denoted as

open circles) and epitaxial LaAlO3 films (denoted as solid circles)…………

Figure 3.8 Energy loss spectra of O 1s photoelectrons for amorphous and

crystalline LaAlO3 films with different film thicknesses (100 Å and 185 Å,

respectively)………

Figure 3.9 The Si 2p core level and valence-band spectra of Si (001) without

and with amorphous LaAlO3 films………

Figure 3.10 Ge 3d core level spectra of Ge substrate with interfacial

nitridation layer………

Figure 3.11 XPS core level spectra (a) Ge 3d, (b) La 4d, (c) Al 2p and (d) O

1s of amorphous LaAlO3 films grown on clean Ge (001) substrate (open

square) and Ge (001) substrate with GeOxNy interfacial layer (open

circle)………

Figure 3.12 Ge 3d core level spectra of Ge substrate with interfacial GeOx

layer………

Figure 3.13 The Ge 3d core level and valence-band spectra of clean Ge (001)

substrate and LaAlO3 films grown on Ge (001) substrate without and with

GeOxNy interfacial layer………

Figure 3.14 The energy-band alignments for LaAlO3 films grown on Ge(001)

substrate with/without GeOxNy interfacial layer and on n-Si(001)………

Figure 3.15 The N 1s core level spectra of nitridized Si0.75Ge0.25(001)

substrate The inset of this figure is the Ge 3d and Si 2p core level spectra of

nitridized Si0.75Ge0.25(001) substrate………

Figure 3.16 XPS core level spectra (a) Ge 3d, (b) Si2pLa 4d, (c) Al 2p and

(d) O 1s for LaAlO3 films grown on clean Si0.75Ge0.25 (001) substrate (open

square) and Si0.75Ge0.25 (001) substrate with SiOxNy interfacial layer (open

circle)………

Figure 3.17 Si2p core level and valence-band spectra of clean

Si0.75Ge0.25(001) substrate and LaAlO3 films grown on Si0.75Ge0.25(001)

substrate without and with SiOxNy interfacial layer………

Figure 3.18 The energy-band alignments for LaAlO3 films grown on

Si0.75Ge0.25 (001) substrate with and without SiOxNy interfacial layer, which is

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denoted by solid line and dashed line, respectively………

Figure 3.19 XPS core level spectra (a) Ge 3d La 5s, (b) La 4d, (c) Al 2p and

(d) O 1s of amorphous LaAlO3 films grown on Ge(001) under different

process conditions………

Figure 3.20 XPS valence-band spectra of amorphous LaAlO3 films grown on

Ge(001) before and after annealing at 500oC and 600oC………

Figure 3.21 Cross-sectional HRTEM images of LaAlO3 films grown on

Ge(001) substrate (a) before and (b) after thermal annealing at 600 oC in

UHV chamber………

Figure 3.22 SIMS depth profile of LaAlO3 films grown on Ge(001)

substrates (a) before and (b) after thermal annealing at 600oC in UHV

chamber………

Figure 3.23 XPS core level spectra (a) Ge 3d La 5s, (b) La 4d, (c) Al 2p and

(d) O 1s of amorphous LaAlO3 films grown on nitridation-treated Ge (001) as

a function of annealing temperature………

Figure 3.24 XPS valence-band spectra of amorphous LaAlO3 films grown on

nitridation-treated Ge (001) substrates as a function of annealing temperature

Figure 3.25 SIMS depth profile of LaAlO3 films grown on nitridized Ge(001)

substrates (a) before and (b) after thermal annealing at 600oC in UHV

chamber………

Figure 3.26 Cross-sectional HRTEM images of LaAlO3 films grown on

nitridized Ge(001) substrate (a) before and (b) after thermal annealing at

Figure 3.27 XPS spectra of (a) Si 2p and La 4d, (b)Al 2p, (c) O 1s and (d)

valence-band spectra of LaAlO3 films before and after post-annealing at

500oC, 600oC and 700oC, accordingly……… ………

Figure 3.28 Cross-sectional high resolution TEM images of LaAlO3 films

grown on Si0.75Ge0.25(001) substrates before (a) and (b) after

thermal-annealing at 700 oC………

Figure 3.29 SIMS depth profile of LaAlO3 films grown on Si0.75Ge0.25(001)

substrates (a) before and (b) after thermal annealing at 700oC in UHV

chamber………

Figure 3.30 XPS core level spectra (a) Si 2p and La 4d, (b)Al 2p, (c) O 1s

and (d)N 1s of LaAlO3 films before and after thermal annealing………

Figure 3.31 Valence-band spectra of of LaAlO3/Si0.75Ge0.25(001) with SiOxNy

interfacial layer before and after thermal annealing ………

Figure 3.32 Cross-sectional HRTEM images of LaAlO3 films grown on

nitridized Si0.75Ge0.25(001) substrate (a) before and (b) after post-annealed at

Figure 3.33 SIMS depth profiles of LaAlO3 films grown on nitridation

treated Si0.75Ge0.25 (a) before and (b) after thermal annealing at 700oC………

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Chapter 4

Figure 4.1 Cross-sectional HRTEM images of epitaxial Ni films grown on

crystalline LaAlO3 (001) films The inset is the IFFT image shows the good

interfacial misfit structures between Ni films and LaAlO3(001) films………

Figure 4.2 The core level and valence-band XPS spectra of Ni films on

crystalline LaAlO3(001) films………

Figure 4.3 Energy band alignment diagram of Ni/LaAlO3/n-Si stacks………

Figure 4.4 Valence-band spectra of Ni/LaAlO3 (001) as a function of Ni

thickness………

Figure 4.5 The evolution of the Fermi level position as a function of Ni

thickness, with respect to LaAlO3 band edges………

Figure 4.6 AFM images of Ni thin films grown on the MgO(001) surface

with different thickness(t) at various temperatures (T) (a) T =100 oC, t =3

nm; (b) T =100 oC, t =10 nm; (c) T =200 oC, t =3 nm; (d) T =200 oC, t =10

nm; (e) T =400 oC, t =3 nm; (f) T =400 oC, t =10 nm………

Figure 4.7 The cross-sectional HRTEM of epitaxial Ni thin films grown on

MgO (001) substrate at the 400 oC The periodic array of contrast at interface

implies mismatch dislocations as indicated by the white arrow The dashed

lines presenting the lattice planes indicate the good super-cell matching

between the Ni thin film and MgO substrate with 6 × a002(Ni) ≈ 5 ×

a002(MgO), and the obvious mismatch dislocations form at the interface……

Figure 4.8 Experimental selected-area electron diffraction pattern from Ni

thin films on MgO (001), the larger and brighter spots are from MgO, which

has larger lattice constants………

Figure 4.9 (a) The plan-view HRTEM image of Ni(001) grown on the

MgO(001) substrate; (b) The enlarged image of one Ni island shows the

relative spacing of moiré fringes for an epitaxial Ni islands grown on

MgO(001)………

Figure 4.10 Valence-band spectra of Ni/MgO (001) as a function of Ni

thickness On clean MgO spectrum, the VBM is indicated by the intersection

of two straight-line segments………

Figure 4.11 The evolution of the Fermi level position with respect to MgO

band edges, as a function of Ni thickness The inset shows calculated Ni

coverage dependent SBH………

Figure 4.12 Atom-projected density of dates (PDOS) for Ni clusters on MgO

(001) surfaces with different coverage (θ ) The solid lines are for surface

oxygen atoms which are directly bonded with Ni atoms The dotted lines are

for the oxygen atoms in the bulk region (bulk-O) The vertical dashed lines

donate the Fermi level The energy positions of the valence band edge for

bulk-O were depicted by vertical arrows………

Figure 4.13 The evolution of the Fermi level position with respect to the

MgO band edges as a function of metal thickness for samples with different

surface treatments Ni-MgOA: annealed surface, Ni-MgOS5: sputtered for 5

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min, Ni-MgOS10: sputtered for 10 min………

Chapter 5

Figure 5.1 XPS core level spectra (a) Si 2p La 4d, (b) Al 2p, (c) O 1s and (d)

N 1s of LaAlO3 films grown on Si(001) substrate as a function of process:

as-grown LaAlO3 (LAO) films, nitridation-doped LaAlO3 (NLAO) films,

annealed nitridation-doped LaAlO3 films at 500 oC and 600oC………

Figure 5.2 XPS valence-band spectra of LaAlO3 films grown on Si(001)

substrate as a function of process: as-grown LaAlO3 (LAO)films,

nitridation-doped LaAlO3 (NLAO)films, and annealed nitridation-doped

LaAlO3 films at 500 oC and 600oC……… ………

Figure 5.3 XPS Ge 3d La 5s core level spectra of LaAlO3 films grown on

Ge(001) substrate with different process conditions: as-grown LaAlO3 (LAO)

films, nitridation-doped LaAlO3 (NLAO) films, annealed nitridation-doped

LaAlO3 films at 500 oC and 600 oC………

Figure 5.4 XPS core level spectra (a)La 4d, (b) Al 2p, (c) O 1s and (d) N 1s

of LaAlO3 films grown on Ge(001) substrate as a function of process:

as-grown LaAlO3 (LAO) films, nitridation-doped LaAlO3 (NLAO)films, and

annealed nitridation-doped LaAlO3 films at 500 oC and 600 oC………

Figure 5.5 XPS valence-band spectra of LaAlO3 films grown on Ge(001)

substrate as a function of process: as-grown LaAlO3 (LAO)films,

nitridation-doped LaAlO3 (NLAO) films, and annealed nitridation-doped

LaAlO3 films at 500 oC and 600 oC………

Figure 5.6 XPS core level spectra (a) Si2pLa4d, (b) Al 2p, (c) O 1s and (d) N

1s of LaAlO3 films grown on Si0.75Ge0.25(001) substrate as a function of

process: as-grown LaAlO3 (LAO) films, nitridation-doped LaAlO3 (NLAO)

films, annealed nitridation-doped LaAlO3 films at 500 oC and 600oC………

Figure 5.7 XPS Ge 3d La 5s core level spectra of LaAlO3 films grown on

Si0.75Ge0.25 (001)substrate as a function of processes.………

Si0.75Ge0.25(001) substrate as a function of process: as-grown LaAlO3 (LAO)

films, nitridation-doped LaAlO3 (NLAO) films, and annealed

nitridation-doped LaAlO3 films at 500 oC and 600 oC…….………

Figure 5.9 The absorption coefficient (α) as the function of photo energy for

undoped SrTiO3 (STO) (open square) and nitrogen-doped SrTiO3 (NSTO)

films (open circle) The inset shows Tauc plot to determine the optical

indirect band gap: (αE)1/2 vs photo energy for undoped and nitrogen-doped

Figure 5.10 XPS core level spectra of (a) N 2p and (b) Ti 2p of undoped

SrTiO3 (STO) (open square) and nitrogen-doped SrTiO3 (NSTO)films (open

circle)………

Figure 5.11 XPS valence-band spectra of undoped SrTiO3 films (STO)(open

square) and nitrogen-doped SrTiO3(NSTO) films (open circle) The inset

shows the enlarge part of valence-band edge………

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Figure 5.12 XPS core level spectra of (a) N 1s, (b)Ti 2p and (c) O1s for

undoped SrTiO3 (STO), nitrogen-doped SrTiO3 (NSTO), and annealed

N-doped SrTiO3 at annealing temperature of 500°C (NSTO500) and 650°C

(NSTO650), respectively………

Figure 5.13 (a) XPS valence-band spectra of undoped SrTiO3 (STO),

nitrogen-doped SrTiO3 (NSTO), and annealed N-doped SrTiO3 with the

annealing temperature of 500°C (NSTO500) and 650°C (NSTO650); (b) The

enlarged part of XPS valence-band spectra for these four samples………

Figure 5.14 XAS spectra of (a) O-K edge features and (b) Ti-L edge features

of undoped SrTiO3 (STO), nitrogen-doped SrTiO3 (NSTO), and annealed

N-doped SrTiO3 at 650°C (NSTO650)………

Figure 5.15 (a) The refractive index (n) and (b)extinction coefficient (k) as a

function of photo energy for undoped SrTiO3 films (STO), nitrogen-doped

SrTiO3 films (NSTO) and annealed nitrogen-doped SrTiO3 films at 650°C

(NSTO650); (c) The plot of (αE)1/2 versus photo energy for determining the

indirect band gap of these three samples………

Figure 5.16 The local density of states (DOS) of (a) undoped SrTiO3 (STO),

(b) nitrogen-substituted SrTiO3 (STO-Nsub), and (c) SrTiO3 with interstitial N

Publications

1 Y Y Mi, S J Wang, J W Chai, H L Seng, J S Pan, Y L Foo, C H A Huan,

and C K Ong “Effect of interfacial oxynitride layer on the band alignment and thermal stability of LaAlO3 films on SiGe”, Appl Phys Lett 91, 042102 (2007)

2 Y Y Mi, Z Yu, S J Wang, P C Lim, Y L Foo, A C H Huan, and C K Ong,

“Epitaxial LaAlO3 thin film on silicon: Structure and electronic properties” Appl

Phys Lett 90,181925 (2007)

3 Y Y Mi, Z Yu, S J Wang, J W Chai, J S Pan, A C H Huan, Y P Feng, and C

K Ong, “The thermal stability of nitrogen-doped SrTiO3(001) films: electronic and

optical properties studies”, J Appl Phys 101, 063708 (2007)

4 Y Y Mi, S J Wang, J W Chai, J S Pan, A C H Huan, Y P Feng and C K

Ong, “Effect of nitrogen-doping on optical properties and electronic structures of SrTiO3 (001) films” Appl Phys Lett 89, 231922 (2006)

5 Y Y Mi, S J Wang, J W Chai, J S Pan, A C H Huan, M Ning and C K Ong

“Energy-band alignments at LaAlO3 and Ge interfaces” Appl Phys Lett 89,

202107 (2006)

6 Y Y Mi, S J Wang, Y F Dong, J W Chai, J S Pan, A C H Huan, and C K

Ong “Evolution of Fermi level and Schottky Barrier Height at Ni/MgO(001)

interfaces”, Surf Sci 599, 255 (2005)

7 M Ning, Y Y Mi, C K Ong, P C Lim, and S J Wang “Growth studies of (220),

(200) and (111) oriented MgO films on Si(001) without buffer layer” J Phys D:

Appl Phys 40, 3678 (2007)

8 Y F Dong, Y Y Mi, Y P Feng, A C H Huan, and S J Wang, “Ab initio

studies on Schottky barrier heights at metal gate/LaAlO3 (001) interfaces” Appl Phys Lett 89, 122115 (2006)

9 Y F Dong, S J Wang, Y Y Mi, Y P Feng and A C H Huan, “First-principles

studies on the initial growth of Ni on MgO (001) surface”, Surf Sci. 600, 2154

(2006)

10 Y Y Mi, S J Wang, et al “Growth and band alignments of epitaxial Ni metal

gates on LaAlO3 (001) thin films”, to be submitted

11 Y Y Mi, S J Wang, et al “Interfacial chemical and electronic structures at

Co/SrTiO3 (001) interfaces: x-ray photoemission studies”, to be submitted

is determined by the applied voltage, the thickness and the dielectric constants of gate oxides.2 Higher speed of transistors can be achieved by the scaling of transistors Furthermore, downscaling transistors has large economic benefits, such as decreased power consumption and low cost, which have stimulated the semiconductor industry to further shrink the transistors sizes However, with the further scaling of CMOSFETs, the traditional gate oxides (silicon dioxide:SiO2) has become too thin (which today is a

few atoms layers) to inhibit the large gate leakage current induced by direct tunneling through thin SiO2 layer, leading to unacceptable power dissipation.3 The traditional gate oxide has been pushed to its fundamental material limits To resolve this issue, we need to seek new materials to replace SiO2.4

As an alternative, high-k dielectric gate oxides are proposed to replace the SiO2

gate oxides, in which the higher dielectric constant allows the thicker gate oxides to suppress the leakage current.5,6 The choice of high-k dielectrics gate oxides needs to

meet some basic requirements:3 such as, high enough dielectric constants (k value),

good thermal stabilities, process compatibility, high-quality interfacial structures and high enough tunneling barriers for both the valence and conduction bands The details

on the choice of high-k dielectrics will be discussed in Section 1.2 Presently, the most widely studied high-k dielectrics gate oxides are HfO2 and ZrO2-based oxides.7Meanwhile, researchers are also making great endeavors to find new materials which are expected to have better performances than HfO2 and ZrO2-based gate oxides, and it has been found that LaAlO3 is a promising candidate as high-k dielectrics.3, 8 In this thesis, we will mainly study LaAlO3 gate oxides, which are anticipated to be the next

generation high-k dielectrics after HfO2 and ZrO2-based oxides.7

While high-k dielectrics are replacing the conventional SiO2 gate oxides, conventional gate electrodes (polycrystalline silicon: poly-Si) are found to be

incompatible with high-k dielectrics materials Metal gates with suitable effective work

functions and sufficient physical and electrical stabilities are expected to solve the problems caused by poly-Si, such as Fermi level pining, high sheet resistance, boron

penetration, as well as an increase of equivalent oxide thickness (EOT) due to poly-Si depletion.3,9 Details about the choice of proper metal gates materials will be discussed

in Section 1.3

1.2 High-k dielectrics

The choice of high-k dielectrics gate oxide needs to meet several criteria, which

include:3 (1) High enough dielectric constant (k value) which could be used for scaling

in a reasonable number of years; (2) Good thermal stabilities, which means that the new gate oxides should not react with Si or other underlying semiconductor substrates The film structures should also avoid forming polycrystalline structure under thermal annealing; (3) Process compatibility for gate oxides in the present semiconductor process flow (1000 oC for 5 sec); (4) High quality of interfacial structures which ensure sharp interfaces and low interfacial defects; (5) High enough tunneling barriers for both valence and conduction bands According to these criteria, several gate oxides

are chosen to be alternative high-k gate oxides, such as Y2O3, SrO, Al2O3, ZrO2, HfO2, and MgO.3 Intensive studies have been carried out for these gate oxides, either in amorphous phase or in epitaxial structures However, these studies showed that most gate oxides can only meet part of the requirements and there is still a long way to go to

choose the appropriate gate oxides applied to the industry For example, Narayanan et

al.10 found that Y2O3 gate oxide tends to form a SiO2 interfacial layer during

post-thermal annealing, and its relative lower K value (~15) limits the development of

Y2O3 as a high-k oxide in the long run Compared with Y2O3, Al2O3 gate oxide shows

good thermal stability with Si and has low leakage current But, similar to Y2O3, lower

k values (~9) of Al2O3 limits its application.11 Some gate oxides such as SrO are not

favored as they react with water.12 Currently, ZrO2 and HfO2 based high-k dielectrics

have been most intensively studied as gate oxides, which are predicted to be the

first-generation of high-k dielectrics.7 Compared with HfO2, ZrO2 was found to slightly react with Si and form silicide (ZrSi2).13 For this reason, HfO2 is presently favored over ZrO2 However, the recrystallization of amorphous HfO2 is a serious issue To increase crystallization temperature, a glass-former (SiO2 or Al2O3) was added to

forming a silicate or an aluminate, but the low dielectric constant k resulting from the

formation of silicate or aluminate could not be ignored.14,15 Besides, although the

addition of nitrogen can also increase crystallization temperature, the lower k values of

Hf silicates cannot be ignored as well.16

A totally different way to circumvent the crystallization problem is the epitaxial

growth of crystalline high-k dielectrics on Si substrates The employments of epitaxial high-k dielectrics oxides are anticipated to be the next-generation gate oxides which

could be achieved as soon as 2011 according to the 2005 edition of International Technology Roadmap for Semiconductors (ITRS).7 Compared with amorphous oxides, epitaxial gate oxides with well defined interfaces to semiconductor substrates have excellent physical properties and thermal stability.17, 18, 19, 20 SrTiO3 was one of most

widely studied perovskite high-k dielectrics oxides which can be epitaxially grown on

silicon.18 However, the small electron injection barrier between SrTiO3 and Si directly

limits its application as high-k dielectrics Compared with SrTiO3, crystalline LaAlO3

is a promising alternative as high-k dielectrics in many aspects,21 with high dielectric

constant (k = 20-27), wide band gap (5.6 eV in bulk) and good thermal stability in

contact with Si.8, 22 However, in comparison with growth of epitaxial SrTiO3 (001) films on Si, epitaxial growth of LaAlO3 films on Si has not been achieved, which is likely due to the polar feature of LaAlO3(001) surface.23 To realize the growth of crystalline LaAlO3 as high-k dielectrics, in our work, we will attempt to grow the

epitaxial LaAlO3 thin films on Si substrate with epitaxial SrTiO3 as seed layer

In addition to recent developments in high-k dielectrics to replace the SiO2 in CMOSFETs devices, germanium (Ge) and its alloys with Si (e.g SixGey) have been considered as promising substrate or channel layer to replace Si for future high-speed CMOS technology because of their higher low-field intrinsic carrier mobilities than Si

Recent reports on high-k gate dielectrics such as ZrO2 and HfO2 grown on Ge substrate have shown desirable results in terms of low equivalent oxide thickness, low leakage current and enhanced hole mobility.24,25 However, for Ge substrate, the native

Ge oxide is not feasible as the gate oxide because of its poor thermodynamic and electronic properties.24, 26, 27 Ge-nitride and Ge-oxynitride, which are expected to have higher thermal stability and higher dielectric constant than GeOx, can be used not

only as a buffer layer to grow high-k gate dielectrics on Ge but also as a potential

passivation layer for Ge-based FETs.26, 27, 28 For SixGey substrate, the presence of Ge will also cause serious issues of poor thermodynamic and electronic properties.29Passivating the SixGey substrates by using nitridation before the growth of high-k

dielectrics films was found to be a promising way to solve this issue.30 But the effect

of interfacial oxynitride layer on the electronic structures and thermal stability of LaAlO3/Ge (or SixGey) system is still unclear.In this thesis, we will study the effect of interfacial oxynitride layer on the band alignment and thermal stability of LaAlO3

films grown on Ge(001) and Si0.75Ge0.25(001) substrates

1.3 Metal gates

In conventional CMOSFETs, the gate electrodes are highly n-type or p-type

polycrystalline Si (poly-Si), which have the work function of 4.05 or 5.15 eV, respectively Integrated with SiO2, Poly-Si is refractory and compatible with the process flow But, a depletion length of order 2Å to EOT because of limited carrier density hampers the application of poly-Si in the new generation CMOSFETs The

reaction which occurs at the interface between poly-Si and high-k dielectrics is also a

serious issue It has been reported that poly-Si reacts with HfO2 and ZrO2 and forms silicides at the interfaces, further leading to leakage paths.31 Meanwhile, the interfacial Si-metal bonds are found to pin the Fermi level position at the undesirable energy position.32 Boron penetration is also a serious issue.33 All of these indicate that

poly-Si gates need to be replaced by new gate materials when high-k dielectrics are

used in CMOSFETs devices

For a metal gate material, one of the most important electronic parameters to be considered is the effective work function (Фm,eff), which is defined as the energy position of Fermi level in Si channel in flat-band condition.34 This value determines the threshold voltage and optimum current drive in MOSFETs.9, 35 Gate materials with

the effective work functions of 4.05 and 5.15 eV are desired for N-MOSFETs (NMOS) and P-MOSFETs (PMOS), respectively The Фm,eff value depends on both the dielectric materials and the gate materials The modulation of Фm,eff can be realized by changing the dielectric materials or the gate materials through introducing impurities to change their compositions, depositing of metal laminates, or controlling the interface structures between gate and dielectrics.35, 36 However, the key challenge is still the identification of proper metals with suitable effective work functions and the integration of these metals gates in current CMOS process.9

Refractory metal nitrides, such as TaN, HfN and TiN have been considered as gate electrodes because of their excellent thermal and chemical stabilities.37 But, it was found that the Фm,eff value of these metal nitrides pins the Fermi level at the Si midgap.37 This issue can be solved by changing the composition of dielectrics, which alters the Фm,eff value from the Si mid gap to the conduction band for application in N-MOSFETs.An alternate approach to obtain proper effective work function for gate electrodes in MOSFETs is to employ alloys 38, 39 This approach avoids the use of N,which has relatively poor thermal stability, or Si, which may lead to the formation of

di-silicides with large work functions. The work function is related to the composition

of alloy, and a non-linear relationship between work function and composition has been reported in Ru-Ta alloy.38 It was found that the values of effective work function can be tuned from 4.2 to 5.0 eV by controlling the alloy composition, which makes it possible for this alloy to be used as gate electrode for both N- and P-MOSFET devices However, while implementing the work function control of gate electrodes with Al-Ni

alloys, the interdiffusion of Ni/Al stack would cause a significant inhomogeneity of work function.39Another more direct way to obtain proper gate materials is to use pure metal gates for specific dielectric materials without changing the composition of dielectrics Pure metal gates have well-known values of vacuum work functions compared with other nitrides, silicides and binary-or ternary-metal alloys.40 Also, the low resistivity of pure metal is favored for CMOSFETs devices

For LaAlO3 dielectrics, a number of ab initio calculations have been carried out on

the Schottky Barrier Heights at metal gates(Pt, Rh, Al)/LaAlO3 interfaces.41 It was found that SBH at the metal gate/LaAlO3 interface can be effectively tuned by inserting monolayer heterovalent metal at the interface However, so far, there are few reports about experimental studies on the growth and interfacial electronic structure of pure metal gates integrated with LaAlO3 films, especially on single-crystalline LaAlO3

films In this thesis, we will choose transition metal Ni as metal gate grown on LaAlO3

(001) and MgO (001) films The high vacuum work function (5.15 eV) and good thermal stability of Ni indicate its promising application in P-MOSFETs devices.42

1.4 Band alignments

Band profiles are one of the most important parameters for semiconductor interfaces,43, 44 which include the valence and conduction band offsets (VBO and

CBO) of semiconductor heterojunctions and the n-type (for electrons) and p-type (for

holes) Schottky barrier heights (SBH) in the case of metal/semiconductor(or oxides)

system Concerning the high-k dielectrics applications, the conduction and valence

band offset between high-k dielectrics and Si channel should be larger than 1.0 eV,

while the effective work function of metal gates should be tunable in a range of ~ 1.1

eV (the magnitude of Si band gap)

1.4.1 Band offsets at high-k dielectrics/semiconductor interfaces

The potential barrier for the injection of electrons and holes into the oxides side is defined by the conduction band offset (CBO) and valence band offset (VBO) between

high-k dielectrics and semiconductor, respectively Band offsets above 1 eV is one of the key criteria in the selection of high-k dielectrics, and large enough barrier is crucial

for achieving low leakage current.3 For some high-k dielectrics with narrower band

gap, such as SrTiO3, the band alignment must be symmetrical with respect to both conduction and valence band edge of Si channel to ensure band offsets above 1 eV

The valence band offset at high-k dielectrics/semiconductor interfaces can be

accurately determined by using x-ray photoelectron spectroscopy (XPS) technique This technique has been successfully used to provide insights into interfacial properties between different materials.45,46 The method to determine the valence-band offset (VBO) is based on the model proposed by Kraut47, in which the appropriate shallow core-level position was chosen as reference, as shown in Fig 1.1

Figure 1.1 Energy band diagram for illustrating the core-level based XPS method to

investigate the band offsets at high-k dielectrics/Semiconductor interfaces For simplify,

Si is chosen as an example of semiconductor and Si 2p (Esi 2p) is chosen as core-level reference

The core-level positions and valence-band maximum (VBM) of bulk materials combined with core level difference of heterojunction are used to calculate the VBO,

as shown in Eq.(1.1):

Si s dielectric A p Si s dielectric d

A Si s v p Si

Here, ESi2p and Ev,s are the core-level and VBM of the Si bulk, EA and Ev,d are the

core-level and VBM of thick high-k dielectrics films The thickness of this thick high-k

dielectrics film is much larger than the photoelectron mean-free path, and therefore it

can represent the properties of high-k dielectrics bulk materials The last term in the

equation is the energy difference between the chosen core-levels ESi2p and EA in a

high-k dielectrics/semiconductor heterojunction

The band line up at the high-k dielectrics/semiconductor interfaces is controlled

mainly by two components: one is the intrinsic properties of semiconductor and the

other is the specific interfacial bonding.48,49 The physical model for describing the intrinsic component of band offset is based on metal induced gap states (MIGS),50,51which origins from the metal/semiconductor contacts The details of this model will be introduced in section 1.4.2 This model can be applied to the band offsets between

semiconductors, or high-k dielectrics/semiconductor heterojunction However, for a given high-k dielectric/semiconductor system, the interfacial structures can be varied

by the different growth condition and process The change of interfacial structure may

have a strong effect on the band alignment (band offsets) between high-k dielectrics

and semiconductors In this thesis, the band offsets between LaAlO3 and various semiconductors (Si, Ge, SiGe) will be investigated by using XPS methods Meanwhile, the effect of interfacial structures on the band alignment in such systems is also studied

It is expected to provide a further understanding of formation mechanism of band

offsets at high-k dielectrics/semiconductor interfaces

1.4.2 Schottky barrier height for metal gate/high-k dielectrics interfaces

While metal gate shows its advantages as gate electrodes, the integration of metal

gates with high-k dielectrics is still proven to be a challenge.52 To choose proper metal gate materials, the major requirement is that the Fermi level position of metal gate should be located within ±0.1eV of the Si valence-band edge and conduction-band

edge for p-channel MOSFET (PMOS) and n-channel MOSFET (NMOS), respectively

Effective work function (Φm, eff ) is the characteristic parameter to describe this requirement, as shown in Fig.1.2

Figure 1.2 Energy band diagram of a MOS diode in thermal equilibrium Evac is the vacuum level Φm,vac is the vacuum work function of metal gate Φm,eff is the effective work function of metal gate on gate dielectric ΦSi is the work function of p-Si substrate Φn is the barrier height between metal and gate dielectric CBO is the conduction band offset between gate dielectric and Si EA is the electron affinity of Si (~ 4.05 eV) Δ1 and Δ2 denote the vacuum level discontinuity at the two interfaces.

It is noticed that there is vacuum level discontinuity at the two interfaces, denoted

as Δ 1 and Δ 2 In semiconductor text books, the band diagrams of an MOS diode in thermal equilibrium are often simplified and the energy bands are aligned only using the electron affinity of the materials in the two sides, and in this case, vacuum levels are continuous.53 However, this is not common situation in metal/semiconductors contacts.According to Fig 1.2, the effective work function can be directly determined

by barrier heights of metal/high-k dielectrics interface and high-k dielectrics /silicon

interface separately, expressed as Φm,eff = Φn - CBO + EA, where Φn is the n-type Schottky barrier height at metal/ high-k dielectrics interfaces, CBO represents the conduction band offset between high-k dielectrics and Si, and EA is the electron

affinity of Si (4.05 eV), which is the energy difference between conduction band

minimum (CBM) of Si and vacuum level As the above definition is based on a flat band condition, the surface charge induced band bending is negligible within the

interface-specific region (several nanometers) For a given high-k dielectrics/Si

interface, the effective work function is solely determined by the Schottky barrier

height (SBH) at metal gate/high-k dielectrics interface, which is defined as the energy

separation between the Fermi level of metal and the edge of the majority carrier band

of oxide right at the interface.54 However, the formation mechanism of SBH at metal

gate/high-k dielectrics interface, namely metal/semiconductor interfaces, has been a

subject of debates for decades.49 According to the first model describing the properties

of metal/semiconductor interfaces, which was proposed by Schottky55and Mott56, the SBH is related to the difference between the vacuum metal work function (Φm,vac) and the electron affinity of semiconductor (EA), expressed as Φn = Φm,vac - EA This Schottky-Mott model assumes no interaction between metal and semiconductor, and thus it does not take into account the local electronics contribution to the potential line

up due to the specific interface structures This simple model was later found to conflict with the experimental results In real metal/semiconductor interfaces, it was found that Schottky barrier height has much weaker dependence on the vacuum work function of metal gates This phenomenon, known as Fermi Level pinning, has stimulated much discussion and prompted the proposal of many models.49

Two most popular models for explaining the Fermi level pinning are defects model and MIGS model Defects model proposes that the Fermi level is pinned by interface defects states created during the formation of Schottky contact 57, 58 However, the

effectiveness of defects states on pinning Fermi level at a metal/semiconductor interface is based on the density of defects at interfaces.59 In defects-rich interfaces, the defects states will be the dominating factor determining the position of Fermi level

In this thesis, to study the effect of the defect states on the electronic properties at metal/oxides interfaces, we will modify the surface of substrates by sputtering treatment to produce more “point defects” on the surface of substrates This work is expected to be significant to understand the formation mechanism of SBH at the metal/oxides interfaces

Other popular model of barrier formation was that Fermi level was pinned by metal-induced gap states (MIGS), which was firstly proposed by Heine60 based on simple physical arguments These MIGS origins from the tailing of metal electron wave functions into the energy gap of semiconductor band structure Later, Tersoff 51stressed the continuum nature of these gap states and claimed that, if the MIGS decay length is large enough, the variation of metal Fermi level would be efficiently screened within several atomic layers in the semiconductor side at the interface According to

the MIGS model, the n-type SBH is expressed as follows,61

)(

function of metal, as predicted by Schottky-Mott model; S=0 for Bardeen limit with strong pinning In Bardeen limit, the Fermi level of metal is pinned at ФCNL and the

n-type SBH equals ФCNL-EA.61

MIGS model assumes that the electronic states at metal-semiconductor interfaces are solely bulk properties of semiconductor, irrespective of metal MIGS are actually Bloch states of the bulk semiconductor with complex wave vector.51 Therefore, pinning factor S and the energy position of CNL (ФCNL) can be estimated only on the basis of the bulk properties of the semiconductor S factor is correlated with electronic

component of the dielectric constant of semiconductor ε∞, and it is given empirically

by Mönch:62

2

)1(1

0

1

1

−+

=

∞

ε

S (1.3)

According to this equation, less Fermi level pinning effect is predicted for a wide gap

material, which tends to have a smaller ε∞ ФCNL can be calculated from the zero of Green functions of the band structure, taken over the Brillion zone.61 However, the method using direct integration of density of states is generally not in good agreement with the result from the calculation of actual complex band structures.63 How to evaluate the energy position of CNL in the fundamental band gap of semiconductor (or

high-k dielectrics) is still an open question

MIGS model is the fundamental mechanism that determines the barrier heights of ideal Schottky contacts with abrupt and lateral homogeneous perfect metal-semiconductor interfaces.64 However, other mechanism due to the presence of

polarized interfaces bonding also plays a key role in governing SBH at many of real metal-semiconductor interfaces.49 The polarized interface bonds form interface dipole, which will shift the energy bands on both sides of the interface and alter the SBH Therefore, in the real metal-semiconductor contacts, apart from defects states at defect-rich interfaces, both the MIGS and interfaces bonding are account for the formation mechanisms of SBHs If MIGS is large enough, the electrostatic potential from interface bonds or the metal-semiconductor electronegativity difference would be screened efficiently by MIGS, and strong Fermi level pinning would be found This situation applies to most metal on covalent or small gap semiconductors (Si, Ge, and GaAs).64However, most high-k dielectrics are large band gap ionic semiconductors or

insulators, the decay length of MIGS is rather short In this situation, it is expected that interface bonding instead of MIGS would play a dominant role in determining the

SBH of metal/high-k dielectrics interfaces. Studying the formation mechanisms of

SBH at metal/high-k dielectrics on atomic scale is one of the main objectives in this

thesis

To fully understand the formation mechanisms of SBH at metal/high-k dielectrics,

it is essential to measure the effective work function of metal gates (Φm,eff ) or SBH accurately The most widely used method to extract the effective work function of metal gates is to measure the flat band voltage (VFB) of MOS capacitor as a function of effective oxide thickness (EOT) of dielectrics According to Poisson’s equation, the

VFB measured ata range of effective oxide thickness (EOT) of dielectrics obeys:65

2

/)

V = Φ −Φ − × ε (1.5)

where Q f is the interface fixed charge (or trapped charge) density in the high-k

dielectric films, and εSiO2 is the dielectric constant of SiO2 Thus, effective work function of metal gates (Φm,eff ) can be extracted from the intercept of VFB axis This capacitance-based method needs no detailed information concerning the band alignments at the two interfaces: metal/dielectric interface and dielectric/silicon interface However, appropriate interfacial structures at the dielectrics/Si interfaces and the corresponding charge distributions should be carefully considered.40 Alternatively,

SBH at metal/high-k dielectrics interfaces can be measured by using x-ray

photoemission technique based on the method proposed by Kraut et al.47 This photoemission method will be used in this thesis to investigate the SBH at

metal/high-k dielectrics interfaces

1.5 Nitridation treatment

As we mentioned in section 1.2, nitridation treatment can passivate the Ge and SiGe surface to form a stable nitride layer Actually, nitridation treatment was also used

on high-k dielectrics films Compared with SiO2, most high-k dielectrics suffer from

intrinsic issue of high oxygen vacancy density, which will greatly degrade the

performance of devices with high-k gate dielectrics (such as leakage current, low

carrier mobility, threshold voltage shift).66, 67 It has been found that atomic nitrogen

can effectively passivate the oxygen vacancies in the high-k dielectrics However, it

was also reported that the introduction of nitrogen may change the electronic structures

of high-k dielectrics To understand the underlying mechanisms, we will do the

nitridation treatment on both LaAlO3 films and SrTiO3 films The reason for choosing LaAlO3 films has been shown clearly in the earlier section Here, the purpose of choose SrTiO3 films will be presented in detail SrTiO3 is a good prototype of perovskite oxide, and it has been widely used in ferroelectric, electronic, and magnetic devices.68, 69, 70, 71, 72, 73 Another reason for choosing SrTiO3 thin films is because of its application as photocatalyst, in which the nitrogen doping can directly influence its photoactivity in visible light range Latest reports on the photocatalytic activity of nitrogen-doped titanate (such as TiO2 and SrTiO3) in visible light region have suggested a new approach to reduce the optical energy threshold for catalysis, which would greatly enhance the effectiveness of these materials.74 , 75 , 76 The good understanding of the effect of nitrogen incorporation on the electronic structure of photocatalyst will definitely benefit the nitrogen process and its application In this thesis, we will study the effect of nitrogen-doping on the electronic structures and thermal stability of both LaAlO3 films and SrTiO3 films The first-principles calculations will be performed to understand the microscopic mechanism This work is expected to provide a good understanding of the effect of nitrogen incorporation on the

electronic structure of high-k dielectrics, which will definitely benefit the nitrogen

process and its application

1.6 Objective and significance of the study

The main purpose of this thesis is to study the growth and electronic structures of

Metal/high-k dielectrics/Semiconductor system for the application in the new

generation CMOSFETs devices Meanwhile, the effect of atomic-level interfacial structures on the electronic properties of such a system will be investigated as well This thesis includes following three parts:

ƒ To study the growth and properties of LaAlO3 thin films grown on Si, Ge, and SiGe substrates The aim of this work is to investigate whether LaAlO3 dielectrics could be used as gate dielectrics integrated in various semiconductor substrates, especially with Ge and SiGe substrates, which have high carrier mobility This work is

important for choosing proper high-k dielectrics in the new generation CMOSFETs

devices In addition, we will study the effect of nitrogen incorporation on the electronic structures and thermal stabilities at LaAlO3/Semiconductors interfaces, which is expected to benefit the application of nitridation treatments in semiconductor industry

ƒ To study the growth and properties of Ni/LaAlO3 (001) and Ni/MgO(001)

systems for the application of metal gate on high-k dielectrics The electronic

properties (band alignments), the effect of interfacial structures and underlying microscopic mechanisms will be further studied This work would provide useful information for the choice of metal gates on LaAlO3 dielectrics Meanwhile, this work

is expected to provide valuable information for better understanding the formation

mechanisms of SBH at metal/high-k dielectrics interfaces

ƒ To study the effect of nitridation on the electronic structure and thermal

stability of high-k dielectrics films ( LaAlO3 and SrTiO3) The aim of this work is to evaluate whether nitrogen doping will influence the electronic structure and thermal

stability of high-k dielectrics and to further understand its underlying mechanisms

This work is expected to benefit the nitrogen process and its application

It is recognized that many alternative high-k dielectrics might be used as gate

oxides materials to replace SiO2 in CMOSFETs In the present study, we chose LaAlO3

as the main high-k dielectrics because of its promising properties for the application as

the next generation gate dielectrics oxides MgO (001) was chosen as substrate to study the metal/oxide systems is due to its wide application and its simple stoichiometric structure which can provide more reasonable comparison between experimental and theoretical results In the nitridation part, apart from the study on LaAlO3 films, SrTiO3(001) films was selected as well due to its wide applications

In the chapter 2, the experimental and theoretical methods will be introduced It includes the growth techniques, characterization techniques and first-principles

calculation methods Chapter 3 will mainly discuss the high-k

dielectrics/semiconductor systems, including the study of electronic structures and thermal stabilities of LaAlO3 on various semiconductors (Si, Ge, SiGe) In Chapter 4, the epitaxial growth and interfacial electronic structure of Ni/LaAlO3(001) and Ni/MgO(001) systems will be studied by both experimental and theoretical methods Chapter 5 will investigate the effect of nitridation on the electronic structure and thermal stability of LaAlO3 and SrTiO3 films Meanwhile, first-principles calculations will be performed to study the physical mechanisms of nitridation Finally, the summary of this research work will be given in Chapter 6, and potential future work is also to be suggested

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