First, transmission characteristics of the on-chip meander CPW resonator fabricated using TSMC 0.18 m CMOS technology are investigated experimentally and an equivalent circuit is develo
Trang 2Port 3
r = 0.86 mm else r = 0.83 mm
Trang 3Port 3
r = 0.86 mm else r = 0.83 mm
Trang 4The calculated results are shown in Figs 13 and 14 If the criterion of reflection is -20 dB,
then the bandwidth of |S11| in the low-frequency region is rather narrow However, |S21|
is rather small and almost all of the power from port 1 is led to port 3 at high frequencies
Port isolation between ports 2 and 3 is larger than 20 dB at frequencies between 15.3 and
16.3 GHz, as shown in Fig 15
7 Confirmation of mode conversion
Mode conversion of the electromagnetic waves may occur after passing through the bend
from port 3 to port 1 because dielectric arrays are absent in the straight waveguide portion
Only the TE20 mode needs to be considered, because the TE30 mode is under the cutoff
condition below 19.6 GHz The power ratio of the TE20 to TE10 electromagnetic wave is
obtained at port 1 The calculated results are shown in Fig 16 Since the power of the TE20
mode is very low at frequencies higher than 13.1 GHz, mode conversion will not occur
without dielectric rods in the straight portion
Fig 16 Power ratio of TE20 to TE10 at port 1
8 Simple fabrication method
As shown in the previous section, holes with diameters slightly larger than the rods will be
fabricated at the top of the waveguide and the dielectric rods will be inserted (Type B, Fig
11)
Firstly, the thick Teflon rod needs to be replaced by a thin LaAlO3 rod Fig 17 shows an improved structure over that shown in Fig 12 The coordinates and radii of the dielectric rods are shown in Table 1 A thick dielectric rod will be replaced by two thin LaAlO3 rods having radii of 0.36 mm at separated by 7.9 mm The S-parameters calculated by HFSS are shown by the solid lines in Figs 18 and 19 Secondly, S-parameters are calculated for type B
in Fig 11 with two thin LaAlO3 rods inserted from the top of the waveguide The diameter for inserting three thin rods is assumed to be 0.8 mm The S-parameters calculated by HFSS are shown by the dotted lines in Figs 18 and 19 The results for the solid and dotted lines are almost the same Port isolation between ports 2 and 3 is shown in Fig 20
1mm
Port 2 Port 1
9
6 7 8
Fig 17 Improved structure of the frequency multiplexer/demultiplexer Two thin LaAlO3
rods are used to reduce reflections
Trang 5A Dual-Frequency Metallic Waveguide System 325
The calculated results are shown in Figs 13 and 14 If the criterion of reflection is -20 dB,
then the bandwidth of |S11| in the low-frequency region is rather narrow However, |S21|
is rather small and almost all of the power from port 1 is led to port 3 at high frequencies
Port isolation between ports 2 and 3 is larger than 20 dB at frequencies between 15.3 and
16.3 GHz, as shown in Fig 15
7 Confirmation of mode conversion
Mode conversion of the electromagnetic waves may occur after passing through the bend
from port 3 to port 1 because dielectric arrays are absent in the straight waveguide portion
Only the TE20 mode needs to be considered, because the TE30 mode is under the cutoff
condition below 19.6 GHz The power ratio of the TE20 to TE10 electromagnetic wave is
obtained at port 1 The calculated results are shown in Fig 16 Since the power of the TE20
mode is very low at frequencies higher than 13.1 GHz, mode conversion will not occur
without dielectric rods in the straight portion
Fig 16 Power ratio of TE20 to TE10 at port 1
8 Simple fabrication method
As shown in the previous section, holes with diameters slightly larger than the rods will be
fabricated at the top of the waveguide and the dielectric rods will be inserted (Type B, Fig
11)
Firstly, the thick Teflon rod needs to be replaced by a thin LaAlO3 rod Fig 17 shows an improved structure over that shown in Fig 12 The coordinates and radii of the dielectric rods are shown in Table 1 A thick dielectric rod will be replaced by two thin LaAlO3 rods having radii of 0.36 mm at separated by 7.9 mm The S-parameters calculated by HFSS are shown by the solid lines in Figs 18 and 19 Secondly, S-parameters are calculated for type B
in Fig 11 with two thin LaAlO3 rods inserted from the top of the waveguide The diameter for inserting three thin rods is assumed to be 0.8 mm The S-parameters calculated by HFSS are shown by the dotted lines in Figs 18 and 19 The results for the solid and dotted lines are almost the same Port isolation between ports 2 and 3 is shown in Fig 20
1mm
Port 2 Port 1
9
6 7 8
Fig 17 Improved structure of the frequency multiplexer/demultiplexer Two thin LaAlO3
rods are used to reduce reflections
Trang 68 10 12 14 16 -40
Fig 18 Reflection coefficient |S11| (=|S22|) for low frequencies and |S11| and |S33| for high
frequencies Solid and dotted lines denote the cases for type A and type B illustrated in Fig.9,
respectively
-20 -15 -10 -5 0
Fig 19 |S21| (=|S12|) for low frequencies and |S21| and |S31| for high frequencies Solid
and dotted lines denote the cases for type A and type B illustrated in Fig.9, respectively
0 10 20 30 40
38.5 mm at frequencies below 17 GHz, so that dielectric rods are not required in the straight portion
Secondly, a sample structure for a frequency multiplexer/demultiplexer is proposed for introducing electromagnetic waves from a coaxial cable Reflection of electromagnetic wave occurs without dielectric rods in the straight portion; therefore, another rod, made of LaAlO3
or Teflon, is introduced to reduce reflection and the calculated S-parameters The bandwidths for reflections smaller than -20 dB are still narrow; however, optimization of the design may enable the bandwidth to be expanded
Trang 7Fig 18 Reflection coefficient |S11| (=|S22|) for low frequencies and |S11| and |S33| for high
frequencies Solid and dotted lines denote the cases for type A and type B illustrated in Fig.9,
respectively
-20 -15 -10 -5 0
Fig 19 |S21| (=|S12|) for low frequencies and |S21| and |S31| for high frequencies Solid
and dotted lines denote the cases for type A and type B illustrated in Fig.9, respectively
0 10 20 30 40
38.5 mm at frequencies below 17 GHz, so that dielectric rods are not required in the straight portion
Secondly, a sample structure for a frequency multiplexer/demultiplexer is proposed for introducing electromagnetic waves from a coaxial cable Reflection of electromagnetic wave occurs without dielectric rods in the straight portion; therefore, another rod, made of LaAlO3
or Teflon, is introduced to reduce reflection and the calculated S-parameters The bandwidths for reflections smaller than -20 dB are still narrow; however, optimization of the design may enable the bandwidth to be expanded
Trang 810 References
Ansoft Corporation (2005) Introduction to the Ansoft Macro Language, HFSS v10
Benisty, H (1996) Modal analysis of optical guides with two-dimensional photonic
band-gap boundaries, Journal of Applied Physics, 79, 10, (1996) pp.7483-7492, ISSN
0021-8979
Boroditsky, M.; Coccioli, R & Yablonovitch, E (1998) Analysis of photonic crystals for light
emitting diodes using the finite difference time domain technique, Proceedings of SPIE, Vol 3283, (1998) pp.184-190, ISSN 0277-786X
Cohn, S., B (1947) Properties of Ridge Wave Guide, Proceedings of the IRE, Vol.35, (Aug
1947) pp 783-788, ISSN 0096-8390
Kokubo, Y.; Maki, D & Kawai, T (2007a) Dual-Band Metallic Waveguide with Low
Dielectric Constant Material, 37th European Microwave Conference Proceedings,
pp.890-892, ISBN 978-2-87487-000-2, Munich, Germany, Oct 2007, EuMA, Belgium Kokubo, Y.; Yoshida, S & Kawai, T (2007b) Economic Setup for a Dual-band Metallic
Waveguide with Dual In-line Dielectric Rods, IEICE Transactions on Electronics,
Vol.E90-C, No.12, (Dec 2007) pp.2261-2262, ISSN 0916-8524
Kokubo, Y & Kawai, T (2008) A Frequency Multiplexer/Demultiplexer for Dual Frequency
Waveguide, 38th European Microwave Conference Proceedings, (Oct 2008) pp.24-27,
ISBN 978-2-87487-005-7, Amsterdam, The Netherland, Oct 2008, EuMA, Belgium Maradudin, A A & McGurn, A R (1993) Photonic band structure of a truncated, two-
dimensional, periodic dielectric medium, Journal of the Optical Society of America B,
Vol.10, No.2, (1993) pp 307-313, ISSN 0740-3224
Shibano, T.; Maki, D & Kokubo, Y (2006) Dual Band Metallic Waveguide with Dual in-line
Dielectric Rods, IEICE Transactions on Electronics, Vol.J89-C, No.10, (Oct 2006)
pp.743-744, ISSN 1345-2827 (Japanese Edition) ; Correction and supplement, ibid, Vol.J90-C, No.3, (Mar 2007) p.298, ISSN 1345-2827 (Japanese Edition)
Tayeb, G & Maystre, D (1997) Rigorous theoretical study of finite-size two-dimensional
photonic crystals doped by microcavities, Journal of the Optical Society of America A,
Vol 14, No.12, (Dec 1997) pp 3323-3332, ISSN 1084-7529
Trang 9Applications of On-Chip Coplanar
Waveguides to Design Local
Oscillators for Wireless Communications System
Ramesh K Pokharel, Haruichi Kanaya
and Keiji Yoshida
Kyushu University
Japan
1 Introduction
On-chip distributed transmission line resonators in CMOS technology have become the
interest of research subjects recently (Ono et al 2001; Umeda et al., 1994; Kanaya et al., 2006;
Wolf, 2006) because of their size which becomes more compact, as the frequency of
application increases Among the various transmission lines, coplanar waveguide (CPW)
has more engineering applications (Toyoda, 1996; Civello, 2005) because it is easy to
fabricate by LSI technology since the signal line and ground plane exist on the same plane so
that no via holes are required for integrating active components such as transistors on
Si-substrate (Toyoda, 1996)
The applications of the CPW were reported for many on-chip LSI components The CPW
was exploited as an inductor and used to design a conventional-type matching circuit for
LNA (Ono et al., 2001) in microwave-band frequency, and they are most popular in
monolithic microwave integrated circuit (MMIC) (Umeda et al., 1994) However, the
application of CPW lines as an inductor takes larger space than the conventional spiral
inductors (Umeda et al., 1994) Some of the present authors have also implemented the
on-chip CPW impedance-matching circuit for a 2.4 GHz RF front-end (Kanaya et al., 2006) and
for 5GHz band power amplifier (Pokharel et al., 2008) using impedance inverters In
designing the matching circuits using impedance inverters and quarter wavelength
resonators realized by on-chip CPW (Kanaya et al, 2006; Pokharel et al., 2008) the size of the
matching circuits becomes compact thus reducing the chip area by about 30% than using
spiral inductors for 2.4GHz-band applications and 40% for 5 GHz-band applications
However, the applications of on-chip CPW resonators in designing other components such
as a voltage-controlled oscillator (VCO) have not been reported yet A conventional VCO
consists of a LC-resonator to produce an oscillation at the frequency band of interest, and
this LC-resonator may be replaced by a CPW resonator Such possibilities are investigated in
this paper In a conventional VCO, the performance such as phase noise of the VCO
depends on the quality (Q) factor of the LC resonator Usually, a spiral inductor is used in
17
Trang 10the resonator and these have quite low Q’s of around 3-5 at GHz frequency range and on the
other hand, it takes large on-chip area in the expensive silicon substrate The inductor can be
either resonated with the device drain capacitance or by adding a shunt capacitor (on chip
or off) Using bond wires instead of on-chip spiral inductors allows the design of low phase
noise oscillators but makes the fabrication more difficult as it is difficult to precisely set the
length of the bond wire Also for use in Phase Locked Loop (PLL) applications it is
necessary to have variable frequency or so called higher frequency tuning range (FTR)
Therefore, it is not a wise practice to use bond wires in designing a VCO due to design
difficulties in estimating the bond wires inductances
In this paper, first, we propose a design method of a VCO using on-chip CPW resonator
thus replacing an LC-resonator First, transmission characteristics of the on-chip meander
CPW resonator fabricated using TSMC 0.18 m CMOS technology are investigated
experimentally and an equivalent circuit is developed Later, the application of on-chip
resonator is also demonstrated to design 10 bits digitally-controlled oscillator (DCO) The
derived equivalent circuit is used to carry out the post-layout simulation of the chip One of
the advantages of the proposed method to design VCO and DCO using on-chip CPW
resonator than using a LC-resonator is smaller chip area
2 Design of On-Chip CPW Resonator and Its Equivalent Circuits
In this paper, we use Advanced Design System (ADS2008A, Agilent Technologies) for
designing active elements and Momentum (Agilent Technologies) for passive elements for
schematic design Co-simulation option was used for electromagnetic characterization of
hybrid structures consisting of active and passive elements together We first develop the
equivalent circuit for on-chip meander CPW resonator using experimental results and latter,
the circuit is used to carry out the post-layout simulation of the chip
The on-chip meander CPW resonator is designed, fabricated, and measured using TSMC
0.18 m CMOS technology This process has 1-poly and 6-metal layers and the thickness of
the top metal is 3.1 m The conductance of the metal and dielectric permittivity (r) of the
SiO2 are 4.1x107 S/m and 4.1, respectively The upper layer is covered by lamination whose
relative permittivity is 7.9
Fig 1 shows the layout and chip photos of on-chip CPW resonator designed and
characterized by EM simulator In Fig 1(a), the enlarged portion of the layout is illustrated
to show its structure in detail where the signal line and slot size is 5 m each, respectively
Bottom metal (Metal-1) is used as ground plane covering all portion of CPW to reduce the
losses Therefore, we prefer to call this CPW as conductor-backed CPW Total length of the
resonator is 3300 m which is supposed to be shorter than a quarter-wavelength resonator at
5.2 GHz The chip photo of the on-chip CPW resonator is shown in Fig 1(b) and Fig 1(c)
Please note that a small stub at the center CPW pad (dummy pad of right side) in Fig 1(b) is
to de-embed the interconnect between metal 6 terminal of the CPW resonator and the pad
The microwave characteristics are measured by using air coplanar probes (Cascade
Microtech, GSG150) and vector network analyzer (HP, HP8722C) in Air coplanar probe
station (Cascade Microtech Inc.) The CPW pads are 100m square and have coplanar
configurations so that characteristic impedance is 50
(a) Layout of CPW resonator showing enlarged section for illustration of its structure
(b) Dummy chip (c) On-chip CPW meander resonator Fig 1 Layouts and chip photographs of CPW resonator
The measured data must be de-embedded in order to remove the parasitic effects of interconnects, pads and contacts surrounding the device (Civello, 2005) Therefore, in Fig 1(b), chip photo of a dummy pad and in Fig 1(c), chip photo of the CPW resonator are shown In order to de-embed the measured raw data, at first, we measure S-parameters of total (Fig 1(c)) and open dummy chip (Fig 1(b)), respectively Next, S-parameters are transformed into Y-parameters according to Equation (1) to get the Y-parameters (YTML) of the transmission-line resonator only
(1)
Y-parameters are then converted to Z-parameters in order to compare the results between simulation using the Equivalent circuits of Fig 2 In Fig 2, two equivalent circuits are developed using 2-stages and 5-stages for CPW resonator in meander structure, where ideal transmission lines are represented by the parameters such as characteristic impedance (Z0), electrical length of each part (E), and frequency (F) Furthermore, C1 represents the mutual capacitance between the meander lines, R1 is the resistive loss of the line in each segment, and the parameters R (resistance), C (Capacitance) represent the silicon substrate of the corresponding segment In Fig 2(b), where 5-stage model of equivalent circuit is shown, the meander line is divided into shorter segments, therefore parameters of each segment of the model such as R1, C1, E will differ from 2-stage model of Fig 2(a) Each parameters in both models are noted below each figure Here, model parameters for Si-substrate (R, C) are
TML total dummy[ ]Y [ ]Y [ ]Y
Ground
GroundSignalGround
GroundSignal
Trang 11the resonator and these have quite low Q’s of around 3-5 at GHz frequency range and on the
other hand, it takes large on-chip area in the expensive silicon substrate The inductor can be
either resonated with the device drain capacitance or by adding a shunt capacitor (on chip
or off) Using bond wires instead of on-chip spiral inductors allows the design of low phase
noise oscillators but makes the fabrication more difficult as it is difficult to precisely set the
length of the bond wire Also for use in Phase Locked Loop (PLL) applications it is
necessary to have variable frequency or so called higher frequency tuning range (FTR)
Therefore, it is not a wise practice to use bond wires in designing a VCO due to design
difficulties in estimating the bond wires inductances
In this paper, first, we propose a design method of a VCO using on-chip CPW resonator
thus replacing an LC-resonator First, transmission characteristics of the on-chip meander
CPW resonator fabricated using TSMC 0.18 m CMOS technology are investigated
experimentally and an equivalent circuit is developed Later, the application of on-chip
resonator is also demonstrated to design 10 bits digitally-controlled oscillator (DCO) The
derived equivalent circuit is used to carry out the post-layout simulation of the chip One of
the advantages of the proposed method to design VCO and DCO using on-chip CPW
resonator than using a LC-resonator is smaller chip area
2 Design of On-Chip CPW Resonator and Its Equivalent Circuits
In this paper, we use Advanced Design System (ADS2008A, Agilent Technologies) for
designing active elements and Momentum (Agilent Technologies) for passive elements for
schematic design Co-simulation option was used for electromagnetic characterization of
hybrid structures consisting of active and passive elements together We first develop the
equivalent circuit for on-chip meander CPW resonator using experimental results and latter,
the circuit is used to carry out the post-layout simulation of the chip
The on-chip meander CPW resonator is designed, fabricated, and measured using TSMC
0.18 m CMOS technology This process has 1-poly and 6-metal layers and the thickness of
the top metal is 3.1 m The conductance of the metal and dielectric permittivity (r) of the
SiO2 are 4.1x107 S/m and 4.1, respectively The upper layer is covered by lamination whose
relative permittivity is 7.9
Fig 1 shows the layout and chip photos of on-chip CPW resonator designed and
characterized by EM simulator In Fig 1(a), the enlarged portion of the layout is illustrated
to show its structure in detail where the signal line and slot size is 5 m each, respectively
Bottom metal (Metal-1) is used as ground plane covering all portion of CPW to reduce the
losses Therefore, we prefer to call this CPW as conductor-backed CPW Total length of the
resonator is 3300 m which is supposed to be shorter than a quarter-wavelength resonator at
5.2 GHz The chip photo of the on-chip CPW resonator is shown in Fig 1(b) and Fig 1(c)
Please note that a small stub at the center CPW pad (dummy pad of right side) in Fig 1(b) is
to de-embed the interconnect between metal 6 terminal of the CPW resonator and the pad
The microwave characteristics are measured by using air coplanar probes (Cascade
Microtech, GSG150) and vector network analyzer (HP, HP8722C) in Air coplanar probe
station (Cascade Microtech Inc.) The CPW pads are 100m square and have coplanar
configurations so that characteristic impedance is 50
(a) Layout of CPW resonator showing enlarged section for illustration of its structure
(b) Dummy chip (c) On-chip CPW meander resonator Fig 1 Layouts and chip photographs of CPW resonator
The measured data must be de-embedded in order to remove the parasitic effects of interconnects, pads and contacts surrounding the device (Civello, 2005) Therefore, in Fig 1(b), chip photo of a dummy pad and in Fig 1(c), chip photo of the CPW resonator are shown In order to de-embed the measured raw data, at first, we measure S-parameters of total (Fig 1(c)) and open dummy chip (Fig 1(b)), respectively Next, S-parameters are transformed into Y-parameters according to Equation (1) to get the Y-parameters (YTML) of the transmission-line resonator only
(1)
Y-parameters are then converted to Z-parameters in order to compare the results between simulation using the Equivalent circuits of Fig 2 In Fig 2, two equivalent circuits are developed using 2-stages and 5-stages for CPW resonator in meander structure, where ideal transmission lines are represented by the parameters such as characteristic impedance (Z0), electrical length of each part (E), and frequency (F) Furthermore, C1 represents the mutual capacitance between the meander lines, R1 is the resistive loss of the line in each segment, and the parameters R (resistance), C (Capacitance) represent the silicon substrate of the corresponding segment In Fig 2(b), where 5-stage model of equivalent circuit is shown, the meander line is divided into shorter segments, therefore parameters of each segment of the model such as R1, C1, E will differ from 2-stage model of Fig 2(a) Each parameters in both models are noted below each figure Here, model parameters for Si-substrate (R, C) are
TML total dummy[ ]Y [ ]Y [ ]Y
Ground
GroundSignalGround
GroundSignal
Trang 12estimated by the dielectric characteristics, and the rest of the parameters of the meander line
are estimated by fitting to the measured results, because our main goal is to develop a
simple model which can be incorporated in ADE simulation to carry out the post-layout
simulation of the chip that consists of on-chip CPW resonators
(a) 2-stage equivalent circuit
(b) 5-stage equivalent circuit
Fig 2 Two types of equivalent circuits using various stages for on-chip CPW meander
Parameters
Z0= 32 ; E= 9 degrees; F=1 GHzC= 11.5fF; R= 3.3 k
R1= 5.7C1=1.1fF;
C
C1C1
C1C1
2R
CC
12 10 8
6 4
-800 -600 -400 -200 0 200
2-stage eq ckt 5-stage eq ckt.
Experiment
-30 -20 -10 0 10 20
Experiment Momentum
Trang 13estimated by the dielectric characteristics, and the rest of the parameters of the meander line
are estimated by fitting to the measured results, because our main goal is to develop a
simple model which can be incorporated in ADE simulation to carry out the post-layout
simulation of the chip that consists of on-chip CPW resonators
(a) 2-stage equivalent circuit
(b) 5-stage equivalent circuit
Fig 2 Two types of equivalent circuits using various stages for on-chip CPW meander
Parameters
Z0= 32 ; E= 9 degrees; F=1 GHzC= 11.5fF; R= 3.3 k
R1= 5.7C1=1.1fF;
C
C1C1
C1C1
2R
CC
12 10 8
6 4
-800 -600 -400 -200 0 200
2-stage eq ckt 5-stage eq ckt.
Experiment
-30 -20 -10 0 10 20
Experiment Momentum
Trang 14(b) Imaginary part of Z21
Fig 4 Comparison of simulated Z21-parameters using two-types of equivalent circuit
models with Momentum-simulation and measured results
Fig 5 Schematic of conventional VCO employing LC-resonator
buffer buffer
Out (0-degree) Out (180-degree)
-1000 -800 -600 -400 -200 0
Momentum Experiment
Fig 6 Schematic of Proposed VCO employing on-chip CPW resonator
(a) Simulation results of VCO using LC-resonator having differential output waveforms
(b) Simulation results of VCO using on-chip CPW-resonator having differential output waveforms
Fig 7 Output voltage waveforms of designed VCOs
0.2 0.4 0.6
0 0.8
0 0.8
-0.2 1.2
50 100 150 200 250 300 0
-0.2 1.2
50 100 150 200 250 300 0
Out (0-degree) Out (180-degree)
V dd
CPW resonator
V count
V bias
Trang 15(b) Imaginary part of Z21
Fig 4 Comparison of simulated Z21-parameters using two-types of equivalent circuit
models with Momentum-simulation and measured results
Fig 5 Schematic of conventional VCO employing LC-resonator
buffer buffer
Out (0-degree) Out (180-degree)
-1000 -800 -600 -400 -200 0
Momentum Experiment
Fig 6 Schematic of Proposed VCO employing on-chip CPW resonator
(a) Simulation results of VCO using LC-resonator having differential output waveforms
(b) Simulation results of VCO using on-chip CPW-resonator having differential output waveforms
Fig 7 Output voltage waveforms of designed VCOs
0.2 0.4 0.6
0 0.8
0 0.8
-0.2 1.2
50 100 150 200 250 300 0
-0.2 1.2
50 100 150 200 250 300 0
Out (0-degree) Out (180-degree)
V dd
CPW resonator
V count
V bias