Ebook Electronic principles: Part 2

With ac amplifi ers, the voltage gain decreases when the input frequency is too low or too high.. Given these two values on a data sheet, we have the voltage gain of the amplifi er in the

14

Earlier chapters discussed amplifi ers operating in their normal frequency range Now, we want to discuss how an amplifi er responds when the input frequency is outside this normal range With ac amplifi ers, the voltage gain decreases when the input frequency is too low or too high On the other hand,

dc amplifi ers have voltage gain all the way down to zero frequency It is only at higher frequencies that the voltage gain of a dc amplifi er falls off We can use decibels to describe the decrease in voltage gain and a Bode plot to graph the response of an amplifi er.

Frequency Effects

logarithmic scale

midband of an amplifi erMiller eff ect

risetime T R

stray-wiring capacitanceunity-gain frequency

■ Sketch Bode plots for both magnitude and phase

■ Use Miller’s theorem to calculate the equivalent input and output capacitances in a given circuit

■ Describe the risetime-bandwidth relationship

■ Explain how coupling capacitors and emitter-bypass capacitors produce the low-cutoff frequencies in BJT stages

■ Explain how the collector or drain-bypass capacitors and the input Miller capacitance produce the high-cutoff frequencies in BJT and FET stages

bchop_haaChapter Outline

14-1 Frequency Response of

an Amplifi er

14-2 Decibel Power Gain

14-3 Decibel Voltage Gain

14-4 Impedance Matching

14-5 Decibels above a Reference

14-6 Bode Plots

14-7 More Bode Plots

14-8 The Miller Eff ect

Figure 14-1a shows the frequency response of an ac amplifi er In the middle range

of frequencies, the voltage gain is maximum This middle range of frequencies

is where the amplifi er is normally operated At low frequencies, the voltage gain decreases because the coupling and bypass capacitors no longer act like short cir-cuits Instead, their capacitive reactances are large enough to drop some of the ac signal voltage The result is a loss of voltage gain as we approach zero hertz (0 Hz)

At high frequencies, the voltage gain decreases for other reasons To

begin with, a transistor has internal capacitances across its junctions, as shown

in Fig 14-1b These capacitances provide bypass paths for the ac signal As the

frequency increases, the capacitive reactances become low enough to prevent mal transistor action The result is a loss of voltage gain

nor-Stray-wiring capacitance is another reason for a loss of voltage gain

at high frequencies Figure 14-1c illustrates the idea Any connecting wire in a

transistor circuit acts like one plate of a capacitor, and the chassis ground acts like the other plate The stray-wiring capacitance that exists between this wire and ground is unwanted At higher frequencies, its low capacitive reactance prevents the ac current from reaching the load resistor This is equivalent to saying that the voltage gain drops off

Av

f

WIRE

STRAY-WIRING CAPACITANCE

The frequency response of an

amplifi er can be determined

experimentally by applying a

square-wave signal to the

ampli-fi er input and noting the output

re-sponse As you recall from earlier

studies, a square wave contains

a fundamental frequency and an

infi nite number of odd-order

har-monics The shape of the output

square wave will reveal whether

the low and high frequencies are

being properly amplifi ed The

fre-quency of the square wave should

be approximately one-tenth the

frequency of the upper cutoff

frequency of the amplifi er If the

output square wave is an exact

replica of the input square wave,

the frequency response of the

amplifi er is obviously suffi cient for

the applied frequency

half-power frequencies because the load power is half of its maximum value at

We will defi ne the midband of an amplifi er as the band of frequencies between

10f1 and 0.1f2 In the midband, the voltage gain of the amplifi er is approximately

maximum, designated by A v(mid) Three important characteristics of any ac

ampli-fi er are its A v(mid) , f1, and f2 Given these values, we know how much voltage gain

there is in the midband and where the voltage gain is down to 0.707A v(mid)

Outside the Midband

Although an amplifi er normally operates in the midband, there are times when we want to know what the voltage gain is outside of the midband Here is an approx-imation for calculating the voltage gain of an ac amplifi er:

A v 5 _ A v(mid)

Ï—1 1 (f1/f)2 Ï—1 1 (f/f2)2

Given A v(mid) , f1, and f2, we can calculate the voltage gain at any frequency f

This equation assumes that one dominant capacitor is producing the lower cutoff frequency and one dominant capacitor is producing the upper cutoff frequency A

dominant capacitor is one that is more important than all others in determining

the cutoff frequency

Equation (14-1) is not as formidable as it fi rst appears There are only three frequency ranges to analyze: the midband, below midband, and above mid-

band In the midband, f1/f < 0 and f /f2 < 0 Therefore, both radicals in Eq (14-1) are approximately 1, and Eq (14-1) simplifi es to:

Below the midband, f /f2 < 0 As a result, the second radical equals 1 and

Eq (14-1) simplifi es to:

Below midband: A v 5 A v(mid)

In Fig 14-2, the bandwidth

includes the frequencies from

0 Hz up to f2 To say it another

way, the bandwidth in Fig 14-2

equals f2

572 Chapter 14

Figure 14-2a shows the frequency response of a dc amplifi er Since there

is no lower cutoff frequency, the two important characteristics of a dc amplifi er

are A v(mid) and f2 Given these two values on a data sheet, we have the voltage gain

of the amplifi er in the midband and its upper cutoff frequency

The dc amplifi er is more widely used than the ac amplifi er because most amplifi ers are now being designed with op amps instead of with discrete transis-

tors An op amp is a dc amplifi er that has high voltage gain, high input impedance,

and low output impedance A wide variety of op amps are commercially available

as integrated circuits (ICs)

Most dc amplifi ers are designed with one dominant capacitance that

pro-duces the cutoff frequency f2 Because of this, we can use the following formula

to calculate the voltage gain of typical dc amplifi ers:

This says that the voltage gain is within a half percent of maximum when the input

frequency is one-tenth of the upper cutoff frequency In other words, the voltage

gain is approximately 100 percent of maximum.

f 0.707 A v(mid)

A v

A v(mid)

1 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0

A v(mid)

f/f 2

f 2 (a)

(b)

Between Midband and Cutoff

With Eq (14-5), we can calculate the voltage gain in the region between midband and cutoff Summary Table 14-1 shows the normalized values of frequency and

voltage gain When f /f2 5 0.1, A v /A v(mid) 5 0.995 When f /f2 increases, the malized voltage gain decreases until it reaches 0.707 at the cutoff frequency As

nor-an approximation, we cnor-an say that the voltage gain is 100 percent of maximum

when f /f2 5 0.1 Then, it decreases to 98 percent, 96 percent, and so on, until it is

approximately 70 percent at the cutoff frequency Figure 14-2b shows the graph

cut-SOLUTION In the midband, the voltage gain is 200 At either cutoff frequency, it equals:

A v 5 0.707(200) 5 141

Figure 14-3b shows the frequency response.

With Eq (14-3), we can calculate the voltage gain for an input frequency

Figure 14-4a shows a 741C, an op amp with a midband voltage gain of 100,000

If f2 5 10 Hz, what does the frequency response look like?

SOLUTION At the cutoff frequency of 10 Hz, the voltage gain is 0.707 of its midband value:

A v 5 0.707(100,000) 5 70,700

Figure 14-4b shows the frequency response Notice that the voltage gain is

100,000 at a frequency of zero hertz (0 Hz) As the input frequency approaches

A v

f

200 141

A v(mid) = 100,000

v in

A v 100,000 70,700

f

10 Hz

Figure 14-4 The 741C and its frequency response

14-2 Decibel Power Gain

We are about to discuss decibels, a useful method for describing frequency

response But before we do, we need to review some ideas from basic mathematics

Each time the frequency increases by a decade (a factor of 10), the voltage gain

decreases by a factor of 10

PRACTICE PROBLEM 14-3 Repeat Example 14-3 with A v(mid) 5 200,000

As you can see, each time x increases by a factor of 10, y increases by 1.

You can also calculate y values, given decimal values of x For instance, here are the values of y for x 5 0.1, 0.01, and 0.001:

Since A p is the ratio of output power to input power, A p has no units or dimensions

When you take the logarithm of A p, you get a quantity that has no units or

dimen-sions But to make sure that A p(dB) is never confused with A p, we attach the unit

decibel (abbreviated dB) to all answers for A p(dB).For instance, if an amplifi er has a power gain of 100, it has a decibel power gain of:

to get the decibel answer For instance, a power gain of 1000 has three zeros; tiply by 10 to get 30 dB A power gain of 100,000 has fi ve zeros; multiply by 10

mul-to get 50 dB This shortcut is useful for fi nding decibel equivalents and checking answers

Decibel power gain is often used on data sheets to specify the power gain

of devices One reason for using decibel power gain is that logarithms compress numbers For instance, if an amplifi er has a power gain that varies from 100 to 100,000,000, the decibel power gain varies from 20 to 80 dB As you can see, decibel power gain is a more compact notation than ordinary power gain

Two Useful Properties

Decibel power gain has two useful properties:

1 Each time the ordinary power gain increases (decreases) by a factor of

2, the decibel power gain increases (decreases) by 3 dB

2 Each time the ordinary power gain increases (decreases) by a factor of

10, the decibel power gain increases (decreases) by 10 dB

Summary Table 14-2 shows these properties in compact form The following amples will demonstrate these properties

Calculate the decibel power gain for the following values: A p 5 1, 2, 4, and 8

SOLUTION With a calculator, we get the following answers:

PRACTICE PROBLEM 14-4 Find A p(dB) for power gains of 10, 20, and 40

pro-If an amplifi er has a voltage gain of 100,000, it has a decibel voltage gain of:

A v(dB) 5 20 log 100,000 5 100 dB

We can use a shortcut whenever the number is a multiple of 10 Count the ber of zeros and multiply by 20 to get the decibel equivalent In the foregoing calculation, count fi ve zeros and multiply by 20 to get the decibel voltage gain

num-of 100 dB

As another example, if an amplifi er has a voltage gain that varies from

100 to 100,000,000, then its decibel voltage gain varies from 40 to 160 dB

Basic Rules for Voltage Gain

Here are the useful properties for decibel voltage gain:

1 Each time the voltage gain increases (decreases) by a factor of 2, the

decibel voltage gain increases (decreases) by 6 dB

2 Each time the voltage gain increases (decreases) by a factor of 10, the

decibel voltage gain increases (decreases) by 20 dB

Summary Table 14-3 summarizes these properties

Summary Table 14-3 Properties of Voltage Gain

A v(dB) 5 20 log A v 5 20 log (A v1)(A v2) 5 20 log A v1 1 20 log A v2

This can be written as:

A v(dB) 5 A v1 (dB) 1 A v2 (dB) (14-11)

This equation says that the total decibel voltage gain of two cascaded

stages equals the sum of the individual decibel voltage gains The same idea

ap-plies to any number of stages This additive property of decibel gain is one reason for its popularity

2 1

What is the total voltage gain in Fig 14-6a? Express this in decibels Next,

calculate the decibel voltage gain of each stage and the total decibel voltage gain using Eq (14-11)

SOLUTION With Eq (14-10), the total voltage gain is:

A v 5 (100)(200) 5 20,000

In decibels, this is:

A v(dB) 5 20 log 20,000 5 86 dBYou can use a calculator to get 86 dB, or you can use the following short-cut: The number 20,000 is the same as 2 times 10,000 The number 10,000 has four zeros, which means that the decibel equivalent is 80 dB Because of the factor

of 2, the fi nal answer is 6 dB higher, or 86 dB

Next, we can calculate the decibel voltage gain of each stage as follows:

A v1 (dB) 5 20 log 100 5 40 dB

A v2 (dB) 5 20 log 200 5 46 dB

14-4 Impedance Matching

Figure 14-7a shows an amplifi er stage with a generator resistance of R G, an input

resistance of Rin, an output resistance of Rout, and a load resistance of R L Up to now, most of our discussions have used different impedances

In many communication systems (microwave, television, and telephone),

all impedances are matched; that is, R G 5 Rin 5 Rout 5 R L Figure 14-7b illustrates the idea As indicated, all impedances equal R The impedance R is 50 V in mi-

crowave systems, 75 V (coaxial cable) or 300 V (twin-lead) in television systems, and 600 V in telephone systems Impedance matching is used in these systems because it produces maximum power transfer

In Fig 14-7b, the input power is:

Figure 14-6b shows these decibel voltage gains With Eq (14-11), the total

decibel voltage gain is:

When the impedances are not

matched in an amplifier, the

decibel power gains can be

calculated with the use of the

following equation:

Ap(dB) 5 20 log Av

1 10 log Rin/Rout

where Av represents the voltage

gain of the amplifier, and Rin and

Rout represent the input and

out-put resistances, respectively

This says that the decibel power gain equals the decibel voltage gain

Equa-tion (14-13) is true for any impedance-matched system If a data sheet states that the gain of a system is 40 dB, then both decibel power gain and voltage gain equal

40 dB

Converting Decibel to Ordinary Gain

When a data sheet specifi es the decibel power gain or voltage gain, you can vert the decibel gain to ordinary gain with the following equations:

SOLUTION The total decibel voltage gain is:

A v(dB) 5 23 dB 1 36 dB 1 31 dB 5 90 dB

The total decibel power gain also equals 90 dB because the stages are impedance-matched

With Eq (14-14), the total power gain is:

A p 5 antilog 90 dB

10 5 1,000,000,000and the total voltage gain is:

A v 5 antilog 90 dB

20 5 31,623

PRACTICE PROBLEM 14-9 Repeat Application Example 14-9 with stage gains of 10 dB, 26 dB, and 26 dB

Application Example 14-10

In the preceding example, what is the ordinary voltage gain of each stage?

SOLUTION The fi rst stage has a voltage gain of:

A v1 5 antilog 23 dB

20 5 14.1The second stage has a voltage gain of:

A v2 5 antilog 36 dB

20 5 63.1The third stage has a voltage gain of:

A v3 5 antilog 31 dB

20 5 35.5

PRACTICE PROBLEM 14-10 Repeat Application Example 14-10 with stage gains of 10 dB, 26 dB, and 26 dB

Figure 14-8 Impedance matching in a 50-V system

584 Chapter 14

The Milliwatt Reference

Decibels are sometimes used to indicate the power level above 1 mW In this case,

the label dBm is used instead of dB The m at the end of dBm reminds us of the

milliwatt reference The dBm equation is:

You can convert any dBm value to its equivalent power by using this equation:

P 5 antilog _ PdBm

where P is the power in milliwatts.

The Volt Reference

Decibels can also be used to indicate the voltage level above 1 V In this case, the

label dBV is used The dBV equation is:

Audio communication systems

that have input and output

re-sistances of 600 V use the dBm

unit to indicate the actual power

output of an amplifier, an

attenu-ator, or an entire system

Since the denominator equals 1, we can simplify the equation to:

where V is dimensionless For instance, if the voltage is 25 V, then:

VdBV 5 20 log 25 5 28 dBVUsing dBV is a way of comparing the voltage to 1 V If a data sheet says that the output of a voltage amplifi er is 28 dBV, it is saying that the output voltage is 25

V If the output level or sensitivity of a microphone is specifi ed as 240 dBV, its output voltage is 10 mV Summary Table 14-5 shows some dBV values

You can convert any dBV value to its equivalent voltage using this equation:

vision systems for the

measure-ment of signal intensity In this

system, a signal of 1 mV across

75 V is the reference level

that corresponds to 0 dB The

dBmV unit is used to indicate

the actual output voltage of an

amplifier, attenuator, or an entire

586 Chapter 14

Figure 14-9 shows the frequency response of an ac amplifi er Although it contains some information such as the midband voltage gain and the cutoff frequencies, it

is an incomplete picture of the amplifi er’s behavior This is where the Bode plot,

which will be examined later in this section, comes in Because this type of graph uses decibels, it can give us more information about the amplifi er’s response out-side the midband

Octaves

The middle C on a piano has a frequency of 256 Hz The next-higher C is an octave higher, and it has a frequency of 512 Hz The next-higher C has a fre-

quency of 1024 Hz, and so on In music, the word octave refers to a doubling of

the frequency Every time you go up one octave, you have doubled the frequency

In electronics, an octave has a similar meaning for ratios like f1/f and f /f2

For instance, if f1 5 100 Hz and f 5 50 Hz, the f1/f ratio is:

We can describe this by saying that f is one octave below f1 As another example,

suppose f 5 400 kHz and f2 5 200 kHz Then:

f

f2 5 400 kHz

200 kHz 5 2

This means that f is one octave above f2

SOLUTION With Eq (14-18):

f 5 500 Hz _

50 Hz 5 10

We can describe this by saying that f is one decade below f1 As another example,

suppose f 5 2 MHz and f2 5 200 kHz Then:

This means that f is one decade above f2

Linear and Logarithmic Scales

Ordinary graph paper has a linear scale on both axes This means that the spaces between the numbers are the same for all numbers, as shown in Fig 14-10a With

a linear scale, you start at 0 and proceed in uniform steps toward higher numbers All the graphs discussed up to now have used linear scales

Sometimes we may prefer to use a logarithmic scale because it

com-presses very large values and allows us to see over many decades Figure 14-10b

shows a logarithmic scale Notice that the numbering begins with 1 The space between 1 and 2 is much larger than the space between 9 and 10 By compressing the scale logarithmically as shown here, we can take advantage of certain proper-ties of logarithms and decibels

Both ordinary graph paper and semilogarithmic paper are available Semilogarithmic graph paper has a linear scale on the vertical axis and a loga-rithmic scale on the horizontal axis People use semilogarithmic paper when they want to graph a quantity like voltage gain over many decades of frequency

Graph of Decibel Voltage Gain

Figure 14-11a shows the frequency response of a typical ac amplifi er The graph

is similar to Fig 14-9, but this time we are looking at the decibel voltage gain versus frequency as it would appear on semilogarithmic paper A graph like this

is called a Bode plot The vertical axis uses a linear scale, and the horizontal axis

uses a logarithmic scale

As shown, the decibel voltage gain is maximum in the midband At each cutoff frequency, the decibel voltage gain is down slightly from the maximum

value Below f1, the decibel voltage gain decreases 20 dB per decade Above f2, the decibel voltage gain decreases 20 dB per decade Decreases of 20 dB per decade occur in an amplifi er where there is one dominant capacitor producing the lower cutoff frequency and one dominant bypass capacitor producing the upper cutoff frequency, as discussed in Sec. 14-1

GOOD TO KNOW

The main advantage of using

logarithmic spacing is that a

larger range of values can be

shown in one plot without losing

resolution in the smaller values

588 Chapter 14

At the cutoff frequencies f1 and f2, the voltage gain is 0.707 of the band value In terms of decibels:

mid-A v(dB) 5 20 log 0.707 5 23 dB

We can describe the frequency response of Fig 14-11a in this way: In the

mid-band, the voltage gain is maximum Between the midband and each cutoff quency, the voltage gain gradually decreases until it is down 3 dB at the cutoff frequency Then, the voltage gain rolls off (decreases) at a rate of 20 dB per decade

fre-Ideal Bode Plot

Figure 14-11b shows the frequency response in ideal form Many people prefer

using the ideal Bode plot because it is easy to draw and gives approximately the same information Anyone looking at this ideal graph knows that the decibel volt-age gain is down 3 dB at the cutoff frequencies The ideal Bode plot contains all the original information when this correction of 3 dB is mentally included.Ideal Bode plots are approximations that allow us to draw the frequency response of an amplifi er quickly and easily They let us concentrate on the main issues rather than being caught in the details of exact calculations For instance, an ideal Bode plot like Fig 14-12 gives us a quick visual summary of an amplifi er’s frequency response We can see the midband voltage gain (40 dB), the cutoff fre-quencies (1 kHz and 100 kHz), and roll-off rate (20 dB per decade) Also, notice

that the voltage gain equals 0 dB (unity or 1) at f 5 10 Hz and f 5 10 MHz Ideal

graphs like these are very popular in industry

Incidentally, many technicians and engineers use the term corner

fre-quency instead of cutoff frefre-quency This is because the ideal Bode plot has a sharp

corner at each cutoff frequency Another term often used is break frequency This

is because the graph breaks at each cutoff frequency and then decreases at a rate

The data sheet for a 741C op amp gives a midband voltage gain of 100,000, a cutoff frequency of 10 Hz, and roll-off rate of

20 dB per decade Draw the ideal Bode plot What is the ordinary voltage gain at 1 MHz?

SOLUTION As mentioned in Sec 14-1, op amps are dc amplifi ers, so they have only an upper cutoff frequency For a

741C, f2 5 10 Hz The midband voltage gain in decibels is:

A v(dB) 5 20 log 100,000 5 100 dB

The ideal Bode plot has a midband voltage gain of 100 dB up to 10 Hz Then, it decreases 20 dB per decade

Figure 14-13 shows the ideal Bode plot After breaking at 10 Hz, the response rolls off 20 dB per decade until it

equals 0 dB at 1 MHz The ordinary voltage is unity (1) at this frequency Data sheets often list the unity-gain frequency

(symbolized funity) because it immediately tells you the frequency limitation of the op amp The device can provide voltage gain up to unity-gain frequency, but not beyond it

590 Chapter 14

this transition region more closely

Between Midband and Cutoff

In Sec 14-1, we introduced the following equation for the voltage gain of an plifi er above midband:

With this equation, we can calculate the voltage gain in the transition region between

midband and cutoff For instance, here are the calculations for f/f2 5 0.1, 0.2, and 0.3:

Lag Circuit

Most op amps include an RC lag circuit that rolls off the voltage gain at a rate of

20 dB per decade This prevents oscillations, unwanted signals that can appear

under certain conditions Later chapters will explain oscillations and how the ternal lag circuit of an op amp prevents these unwanted signals

in-Figure 14-14 shows a circuit with bypass capacitor R represents the

Thevenized resistance facing the capacitor This circuit is often called a lag cuit because the output voltage lags the input voltage at higher frequencies Stated

cir-another way: If the input voltage has a phase angle of 0°, the output voltage has a phase angle between 0° and 290°

At low frequencies, the capacitive reactance approaches infi nity, and the output voltage equals the input voltage As the frequency increases, the capacitive reactance decreases, which decreases the output voltage Recall from basic courses

in electricity that the output voltage for this circuit is:

At this frequency, X C 5 R and the voltage gain is 0.707.

Bode Plot of Voltage Gain

By substituting X C 5 1/2fC into Eq (14-21) and rearranging, we can derive this

592 Chapter 14

Figure 14-15 shows the ideal Bode plot of a lag circuit In the midband,

the decibel voltage gain is 0 dB The response breaks at f2 and then rolls off at a rate of 20 dB per decade

6 dB per Octave

Above the cutoff frequency, the decibel voltage gain of a lag circuit decreases 20

dB per decade This is equivalent to 6 dB per octave, which is easily proved as

follows: When f /f2 5 10, 20, and 40, the voltage gain is:

f2

–20 dB –40 dB –60 dB

Av(dB)

0

Figure 14-15 Ideal Bode plot of a lag circuit

hertz (0 Hz), the phase angle is 0° As the frequency increases, the phase angle of the output voltage changes gradually from 0° to 290° At very high frequencies,

With a calculator that has the tangent function and an inverse key, we can easily

calculate the phase angle for any value of f /f2 Summary Table 14-8 shows a few values for  For example, when f/f2 5 0.1, 1, and 10, the phase angles are:

 5 2arctan 0.1 5 25.71°

 5 2arctan 1 5 245°

 5 2arctan 10 5 284.3°

Bode Plot of Phase Angle

Figure 14-17 shows how the phase angle of a lag circuit varies with the frequency

At very low frequencies, the phase angle is zero When f 5 0.1f2, the phase angle

is approximately 26° When f 5 f2, the phase angle equals 245° When f 5 10f2,

the phase angle is approximately 284° Further increases in frequency produce little change because the limiting value is 290° As you can see, the phase angle

of a lag circuit is between 0° and 290°

A graph like Fig 14-17a is a Bode plot of the phase angle Knowing that the phase angle is 26° at 0.1f2 and 84° at 10f2 is of little value except to

594 Chapter 14

indicate how close the phase angle is to its limiting value The ideal Bode plot of

Fig 14-17b is more useful for preliminary analysis This is the one to remember

because it emphasizes these ideas:

1 When f 5 0.1f2, the phase angle is approximately zero

2 When f 5 f2, the phase angle is 245°

3 When f 5 10f2, the phase angle is approximately 290°

Another way to summarize the Bode plot of the phase angle is this: At the cutoff frequency, the phase angle equals 245° A decade below the cutoff fre-quency, the phase angle is approximately 0° A decade above the cutoff frequency, the phase angle is approximately 290°

–6⬚

–45 ⬚ –84⬚

–90⬚

f

(a) φ

0 ⬚ –45⬚

Draw the ideal Bode plot for the lag circuit of Fig 14-18a.

Figure 14-18 A lag circuit and its Bode plot

f

(b)

cies The frequency response breaks at 318 kHz and then rolls off at a rate of 20 dB/decade.

PRACTICE PROBLEM 14-14 Using Fig 14-18, change R to 10 kV and

calculate the cutoff frequency

In Fig 14-19a, the dc amplifi er stage has a midband voltage gain of 100 If the

Thevenin resistance facing the bypass capacitor is 2 kV, what is the ideal Bode plot? Ignore all capacitances inside the amplifi er stage

40 dB DECADE

Figure 14-19 (a) DC amplifi er and bypass capacitor; (b) ideal Bode plot; (c) Bode plot with second break frequency.

596 Chapter 14

Figure 14-20a shows an inverting amplifi er with a voltage gain of A v Recall that

an inverting amplifi er produces an output voltage that is 180° out of phase with the input voltage

The amplifi er has a midband voltage gain of 100, which is equivalent to 40 dB

Figure 14-19b shows the ideal Bode plot The decibel voltage gain is 40

dB from zero to the cutoff frequency of 159 kHz The response then rolls off at a

rate of 20 dB per decade until it reaches an funity of 15.9 MHz

PRACTICE PROBLEM 14-15 Repeat Example 14-15 using a Thevenin resistance of 1 kV

Suppose the amplifi er stage of Fig 14-19a has an internal lag circuit with a cutoff

frequency of 1.59 MHz What effect will this have on the ideal Bode plot?

SOLUTION Figure 14-19c shows the frequency response The response

breaks at 159 kHz, the cutoff frequency produced by the external 500-pF capacitor The voltage gain rolls off at 20 dB per decade until the frequency is 1.59 MHz

At this point, the response breaks again because this is the cutoff frequency of the internal lag circuit The gain then rolls off at a rate of 40 dB per decade

INVERTING AMPLIFIER

A v

INVERTING AMPLIFIER

A v

C

+ –

affects the input and output circuits simultaneously.

Converting the Feedback Capacitor

Fortunately, there is a shortcut called Miller’s theorem that converts the capacitor into two separate capacitors, as shown in Fig 14-20b This equivalent circuit is

easier to work with because the feedback capacitor has been split into two new

capacitances Cin(M) and Cout(M) With complex algebra, it is possible to derive the following equations:

inverting op amp In these equations, A v is the midband voltage gain

Usually, A v is much greater than 1, and Cout(M) is approximately equal to the feedback capacitance The striking thing about Miller’s theorem is the effect

it has on the input capacitance Cin(M) It’s as though the feedback capacitance has

been amplifi ed to get a new capacitance that is A v 1 1 times larger This

phe-nomenon, known as the Miller effect, has useful applications because it creates

artifi cial or virtual capacitors that are much larger than the feedback capacitor

Compensating an Op Amp

As discussed in Sec 14-7, most op amps are internally compensated, which means

that they include one dominant bypass capacitor that rolls off the voltage gain at a rate of 20 dB per decade The Miller effect is used to produce this dominant bypass capacitor

R

RL

INVERTING AMPLIFIER

AvC

(a)

R

RL

INVERTING AMPLIFIER

598 Chapter 14

is much larger than the bypass capacitor on the output side As a result, the input lag circuit is dominant; that is, it determines the cutoff frequency of the stage The output bypass capacitor usually has no effect until the input frequency is several decades higher

In a typical op amp, the input lag circuit of Fig 14-21b produces a

dom-inant cutoff frequency The voltage gain breaks at this cutoff frequency and then rolls off at a rate of 20 dB per decade until the input frequency reaches the uni-ty-gain frequency

The amplifi er of Fig 14-22a has a voltage gain of 100,000 Draw the ideal Bode

plot

INVERTING AMPLIFIER

The capacitor is initially uncharged in Fig 14-23a If we close the switch, the

capacitor voltage will rise exponentially toward the supply voltage V The risetime

T R is the time it takes the capacitor voltage to go from 0.1V (called the 10 percent

point) to 0.9V (called the 90 percent point) If it takes 10 s for the exponential

waveform to go from the 10 percent point to the 90 percent point, the waveform has a risetime of:

T R 5 10 s

Instead of using a switch to apply the sudden step in voltage, we can use

a square-wave generator For instance, Fig 14-23b shows the leading edge of a square wave driving the same RC circuit as before The risetime is still the time it

takes for the voltage to go from the 10 percent point to the 90 percent point

Figure 14-23c shows how several cycles will look Although the input

voltage changes almost instantly from one voltage level to another, the output voltage takes much longer to make its transitions because of the bypass capacitor The output voltage cannot suddenly step, because the capacitor has to charge and discharge through the resistance

By analyzing the exponential charge of a capacitor, it is possible to derive this equation for the risetime:

Figure 14-22b shows the input and output Miller capacitances The dominant

lag circuit on the input side has a cutoff frequency of:

f2 5 1

2RC 5 _ 2(5.3 kV)(3 F)1 5 10 Hz

Since a voltage gain of 100,000 is equivalent to 100 dB, we can draw the ideal

Bode plot shown in Fig. 14-22c.

PRACTICE PROBLEM 14-17 Using Fig 14-22a, determine Cin(M) and

Cout(M) if the voltage gain is 10,000

Data sheets often specify the risetime because it is useful to know the response to

a voltage step when analyzing switching circuits

An Important Relationship

As mentioned earlier, a dc amplifi er typically has one dominant lag circuit that

rolls off the voltage gain at a rate of 20 dB per decade until funity is reached The cutoff frequency of this lag circuit is given by:

0

R

C

C R

0 0

(a)

(b)

(c)

– +

Equation (14-29) is called the risetime-bandwidth relationship In a dc amplifi er, the word bandwidth refers to all the frequencies from zero up to the cutoff frequency Often, bandwidth is used as a synonym for cutoff frequency If

the data sheet for a dc amplifi er gives a bandwidth of 100 kHz, it means that the upper cutoff frequency equals 100 kHz

What is the upper cutoff frequency for the circuit shown in Fig 14-24a?

SOLUTION In Fig 14-24a, the risetime is 1 s With Eq (14-29):

f2 5 0.35

1 s 5 350 kHz

Therefore, the circuit of Fig 14-24a has an upper cutoff frequency of 350 kHz

An equivalent statement is that the circuit has a bandwidth of 350 kHz

Figure 14-24b illustrates the meaning of sine-wave testing If we change

the input voltage from a square wave to a sine wave, we will get a sine-wave output By increasing the input frequency, we can eventually fi nd the cutoff frequency of 350 kHz In other words, we would get the same result with sine-wave testing, except that it is slower than square-wave testing

PRACTICE PROBLEM 14-18 An RC circuit, as in Fig 14-23, has R 5

2 kV and C 5 100 pF Determine the risetime of the output waveform and its upper

602 Chapter 14

quencies from 1 to over 200 MHz Because of this, most amplifi ers are now built using op amps Since op amps are the heart of analog systems, the analysis of dis-crete amplifi er stages is less important than it once was The next section briefl y discusses the low- and high-cutoff frequencies of a voltage-divider biased CE stage We will look at the effects of individual components on the circuit’s fre-quency response, starting with the low-frequency cutoff point

Input-Coupling Capacitor

When an ac signal is coupled into an amplifi er stage, the equivalent looks like

Fig 14-25a Facing the capacitor is the generator resistance and the input

resist-ance of the stage This coupling circuit has a cutoff frequency of:

Emitter-Bypass Capacitor

Figure 14-27a shows a CE amplifi er Figure 14-27b shows the effect that the

emitter-bypass capacitor has on the output voltage Facing the emitter-bypass

Figure 14-25 Coupling circuit and its frequency response

capacitor is the Thevenin circuit of Fig 14-27c The cutoff frequency is given by:

Using the circuit values shown in Fig 14-28a, calculate the low-cutoff frequency for each coupling and bypass capacitor

Compare the results to a measurement using a Bode plot (Use 150 for the dc and ac beta values.)

SOLUTION In Fig 14-28a, we will analyze each coupling capacitor and each bypass capacitor separately When

analyzing each capacitor, treat the other two capacitors as ac shorts

From past dc calculations of this circuit, r e9 5 22.7 V The Thevenin resistance facing the input-coupling capacitor is:

604 Chapter 14

(a)

(b)

(c)

Collector Bypass Circuit

The high-frequency response of an amplifi er involves a signifi cant amount of detail and requires accurate values to get good results We will use some detail in our discussion, but more accurate results can be obtained with circuit simulation software

Figure 14-29a shows a CE stage with stray-wiring capacitance Cstray

Just to the left is C c9, a quantity usually specifi ed on the data sheet of a transistor

This is the internal capacitance between the collector and the base Although C c9

and Cstray are very small, they will have an effect when the input frequency is high enough

Figure 14-29b is the ac-equivalent circuit, and Fig 14-29c is the

Thevenin-equivalent circuit The cutoff frequency of this lag circuit is:

As you can see by the results, the emitter-bypass circuit becomes the dominant lower-frequency cutoff value

The measured midpoint voltage gain A v(mid) in the Bode plot of Fig. 14-28b is 37.1 dB The Bode plot shows an

approximate 3-dB drop at a frequency of 659 Hz This is close to our calculation

PRACTICE PROBLEM 14-19 Using Fig 14-28a, change the input-coupling capacitor to 10 F and the emitter-

bypass capacitor to 100 mF Determine the new dominant cutoff frequency

606 Chapter 14

where R 5 R C i R L and C 5 C c9 1 Cstray It is important to keep wires as short as possible in high-frequency work because the stray-wiring capacitance degrades bandwidth by lowering the cutoff frequency

Base Bypass Circuit

The transistor has two internal capacitances C c9 and Ce9, as shown in Fig 14-30

Since C c9 is a feedback capacitor, it can be converted into two components The

input Miller component then appears in parallel with C e9 The cutoff frequency of

this base bypass circuit is given by Eq (14-32), where R is the Thevenin ance facing the capacitance The capacitance is the sum of C e9 and the input Miller component

resist-The collector bypass capacitor and Miller input capacitance each produce

a cutoff frequency Normally, one of these is dominant When the frequency creases, the gain breaks at this dominant cutoff frequency Then, it rolls off at a

in-C R

(c) (b)

rate of 20 dB per decade until it breaks again at the second cutoff frequency With further decreases in frequency, the voltage gain rolls off at 40 dB per decade.

On data sheets, C C9 may be listed as Cbc , C ob , or C obo This value is

speci-fi ed at a particular transistor operating condition As an example, the C obo value for

a 2N3904 is specifi ed as 4.0 pF when V CB 5 5.0 V, I E 5 0, and frequency is 1 MHz

C e9 is often listed as Cbe , C ib , or C ibo on data sheets The data sheet for a 2N3904

specifi es a C ibo value of 8 pF when V EB 5 0.5 V, I C 5 0, and frequency is 1 MHz

These values are shown in Fig 14-31a under Small-Signal Characteristics.

Each of these internal capacitance values will vary, depending on the

circuit condition Figure 14-31b shows how C obo changes as the amount of reverse

bias V CB changes Also, C be is dependent on the transistor’s operating point When

not given on a data sheet, C be can be approximated by:

C be > 1

where f T is the current gain-bandwidth product normally listed on the data sheet

The value r g, shown in Fig 14-30, is equal to:

and r c is found by:

5 4