Introduction to computing laboratory manual implementation of basic logic gates and functional ics on fpga

Convert the function using NAND equivalents: Circuit implementation remember to note pin numbers on ICs 8... Implement boolean function ??, ?, ? = m1 + m3 + m6, using NOR2 gates 2-input

DEPARTMENT OF ELECTRONICS

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INTRODUCTION TO COMPUTING

LABORATORY MANUAL

TABLE OF CONTENT

ABOUT THE MANUAL 1

LAB 1: IMPLEMENTATION OF BOOLEAN FUNCTION ON BREADBOARD WITH LOGIC GATES AND FUNCTIONAL ICS 2

A PRELAB 2

I IMPLEMENTATION OF DIGITAL CIRCUIT ON BREADBOARD 2

II QUESTIONS: 6

B LAB MANUAL: 13

I OBJECTIVES: 13

II LAB PREPARATION: 13

III LAB INSTRUCTION: 13

LAB 2: IMPLEMENTATION OF BASIC LOGIC GATES AND FUNCTIONAL ICs ON FPGA 26

A PRELAB 26

B LAB MANUAL: 34

I OBJECTIVES: 34

II LAB PREPARATION: 34

III LAB INSTRUCTIONS: 34

APPENDIX 1: QUARTUS AND UBUNTU INSTALLATION ON WINDOWS 48 A UBUNTU INSTALLATION ON WINDOWS: 48

I Download and install Xming and WSL2: 48

II Install Ubuntu on Windows: 48

III Some basic commands in Linux 51

B INSTALL QUARTUS 13.0SP1 53

APPENDIX 2: DIGITAL CIRCUIT DESIGN FLOW USING SYSTEMVERILOG 54

A DESIGN FLOW 54

B COMBINATIONAL LOGIC MODELING 55

I Problem: 55

II Design: 55

C SEQUENTIAL LOGIC/FSM MODELING 69

I Problem: 69

II Problem analysis: 69

III Design: 70

ABOUT THE MANUAL

This document is intended to serve as a lab manual for students enrolled in Introduction to Computing Lab at HCMC University of Technology All the Lab Experiment is designed for students to:

- Implement combinational and sequential systems on testboard, using digital ICs

- Implement digital systems on FPGA, using SystemVerilog

There are 4 labs:

Lab 1 Implementation of Boolean function on breadboard with Logic Gates and Functional ICs –Lab 2 Implementation of Boolean function on FPGA with Logic Gates and Functional Digital ICs –Lab 3 Implement Arithmetic Circuits and Sequential Circuit on breadboard –

Lab 4 Implement Arithmetic Circuits and Sequential Circuit on FPGA –

In order to complete the lab on time, all students are required to do prelabs before each class

LAB 1: IMPLEMENTATION OF BOOLEAN FUNCTION ON BREADBOARD WITH LOGIC GATES AND FUNCTIONAL ICS

A PRELAB

I IMPLEMENTATION OF DIGITAL CIRCUIT ON BREADBOARD

Breadboard is the component on which the circuits can be set up and external experiments can

be done The information about usage is given in Figure 1.1

Figure 1.1: Breadboard connections

❖ Remember these points when implement digital circuits on breadboard:

- Inserting a DIP – Dual Inline Package:

Before you insert a DIP into the breadboard, make sure all pins are straight When you insert

a DIP in the breadboard, make sure that the pins on one side of the DIP are not connected to the pins on the other side of the DIP This means that the DIP must straddle one of the long gaps that divide the breadboard into separate sections

- Providing access to the DIP:

As you wire your circuit, be sure to leave yourself easy access to the DIP's pins so that you can touch them with a probe and so that you can replace the DIP without disconnecting any wires

In particular:

 Never pass a wire over a DIP Instead, route the wires around the DIP

 When you run wires to a DIP, use the breadboard holes farther away from the DIP before you use the holes that are closer

- Removing a DIP:

Do not use your fingers to remove a DIP from the breadboard It's too easy for your fingers to slip, causing the DIP to twist This results in bent pins Instead, use a chip puller to gently pull the chip up from the board

- Input and output connections:

There are two logic levels of input data: HIGH (1) level and LOW (0) level In this course, almost digital ICs are TTL, in which HIGH level and LOW level are prescribed as below: Input: the signal is called HIGH when the voltage is between 2V and 5V, and LOW when the voltage is from 0 to 0.8V

Output: the signal is called HIGH when the voltage is between 2.7V and 5V, and LOW when the voltage is from 0 to 0.5V

We usually apply 5V to implement HIGH level signal and 0V for LOW level signal

In this lab, DIP switches are used to supply input signal Several ways of input connections are shown in Figure 1.2; resistors in these circuits are usually chosen 10 Kohm It is recommended that students implement input circuit as in Figure 1.2 (c), in which the signal equal 1 when the switch is at upper position and vice versa

Figure 1.2: Input connections

Outputs are commonly displayed in LEDs, bar-LEDs, 7-segment LEDs,… Figure 1.3 shows how to connect the output to LED; LEDs in the left circuit will be on when the signal is 1 while level 1 signal turn off the lights in the right circuit Resistors in output circuits are usually chosen 1 Kohm

Figure 1.3: Output connections

Example: Implement function 𝑓(𝑎, 𝑏) = 𝑎 + 𝑏

Figure 1.4: Implementation of Boolean function F(a,b) = a + b

Figure 1.5: Implementation of Boolean function F(a,b) = a + b – application circuit

II QUESTIONS:

1 What is numbering principle in DIP IC?

2 Identify X, Y, Z, W in four circuits below:

3 If f1,f2,f3,f4 are respectively 0,1,1,0 Indentify status of each LEDs in below figure

4 Hoàn thành bảng sau (xem datasheet c a chúng) ủ

74LS00 4 c ng NAND ổ 14-VCC; 7-GND; 3 = 1 nand 2; 6 = 4 nand 5; ……

5 Compare IC 74LS125 and IC 74LS126 Explain the difference between these 2 ICs

6 Implement boolean function 𝑓(𝑥, 𝑦, 𝑧 = 𝑥 𝑦 + 𝑦𝑧) :

ICs and quantity:

Circuit implementation (remember to note pin numbers on ICs)

7 Implement boolean function 𝑓(𝑥, 𝑦, 𝑧 = 𝑥 𝑦 + 𝑦𝑧) using NAND2 gates (2-input NAND

gates)

Convert the function using NAND equivalents:

Circuit implementation (remember to note pin numbers on ICs)

8 Implement Boolean function 𝑓(𝑥, 𝑦, 𝑧) = m1 + m3 + m6 (z is LSB):

Write F in SOP form:

List all ICs used to implement the circuit:

Circuit implementation (remember to note pin numbers on ICs)

9 Implement boolean function 𝑓(𝑥, 𝑦, 𝑧) = m1 + m3 + m6, using NOR2 gates (2-input NOR

gates)

Convert the function using NOR equivalents:

Circuit implementation (remember to note pin numbers on ICs)

10 Given following circuit:

Write 𝑓(𝑥, 𝑦, 𝑧) expression in SOP

Circuit implementation (remember to note pin numbers on ICs)

11 Implement 𝑓(𝑥, 𝑦, 𝑧) = ∑(2,3,5,7) using IC 74LS151:

Draw the circuit that implement F using IC 74LS151 and logic gates:

Circuit implementation (remember to note pin numbers on ICs)

12 Implement 𝑓(𝑥, 𝑦, 𝑧) = ∑(0,3,4,7) using 74LS138:

Draw the circuit that implement F using IC 74LS138 and logic gates:

Circuit implementation (remember to note pin numbers on ICs)

B LAB MANUAL:

I OBJECTIVES:

- Getting familiar with TTL 74LS series IC

- Implementation of simplified Boolean functions with different logic gate combinations

- Getting to know functional combinational ICs

II LAB PREPARATION:

Students have to complete Prelab before class Students without lab preparation won’t be

allowed to join in the class

III LAB INSTRUCTION:

EXPERIMENT 1

Objectives: Implementation of a function math 𝑓(𝑥, 𝑦, 𝑧 = 𝑥 𝑦 + 𝑦𝑧) in AND – OR form

Equipments:

- Analog Discovery Studio

- Integrated Circuits (ICs) : 74LS04, 74LS08, 74LS32

- Connection wires

Procedure:

- Construct the circuit and apply the power (remember to note pin numbers on ICs)

- Apply all possible combinations to the inputs obtain the output values then take note of ; the output fTest in the Table 1.1

Student’s implementation on breadboard:

➢ Draw the schematic that implement F using NAND equipvalents

NAND equipvalent circuit – application circuit

- Construct the circuit and apply the power (remember to note pin numbers on ICs).

- Apply all possible combinations to the inputs and obtain and take note of the outputs

fNAND in the Table 1.1

Student’s implementation on breadboard

EXPERIMENT 2

Objectives: Implementation of a boolean function given in the truth table (Figure 1.2)

Equipments:

- Analog Discovery Studio

- Integrated Circuits (ICs) : 74LS04, 74LS08, 74LS32

- Connection wires

Procedure:

- Construct the circuit and apply the power (remember to note pin numbers on ICs).

- Apply all possible combinations to the inputs obtain the output values then take note of ;

the output fTest in the Table 1.2

- Write the Boolean expression: F =

Student’s implementation on breadboard

➢ Draw the schematic that implement F using NOR equipvalents

NOR equipvalent circuit – application circuit

- Construct the circuit and apply the power (remember to note pin numbers on ICs).

- Apply all possible combinations to the inputs; obtain the output value then take note of the outputs fNOR in the Table 1.2

Student’s implementation on breadboard

EXPERIMENT 3

Objectives: Implementation of a boolean function given in the following schematic

Figure 1.6

Equipments:

- Analog Discovery Studio

- Integrated Circuits (ICs) : 74LS04, 74LS08, 74LS32, 74LS86

- Connection wires

Procedure:

- Construct the circuit and apply the power (remember to note pin numbers on ICs)

- Apply all possible combinations to the inputs obtain the output value then take note of the ; outputs F in the Table 1.3 1

x y z F1 F2

Student’s implementation on breadboard

➢ Optimize boolean function F1 and draw the schematic: F2 =

- Construct the circuit and apply the power (remember to note IC codes and their pin numbers)

- Apply all possible combinations to the input; obtain the output value then take note of the outputs F2 in the Table 1.3

Student’s implementation on breadboard

➢ Give your comments on F1 and F2 results:

Equipments:

- Analog Discovery Studio

- Integrated Circuits (ICs): 74LS151, 74LS04

- Connection wires

Procedure:

Draw the schematic diagram to implement the boolean function using 74LS151

Application cicruit

- Construct the circuit and apply the power (remember to note IC pin numbers)

- Apply all possible combinations to the inputs and obtain and take note of the outputs FTest in the Table 1.4

Student’s implementation on breadboard

EXPERIMENT 5

Objectives: Implementation of a Boolean function (𝑥, 𝑦, 𝑧) = ∑(2,3,5,7) by using a 3x8 Decoder

Equipments:

- Analog Discovery Studio

- Integrated Circuits (ICs): 74LS138, and other logic

Procedure:

Draw the schematic diagram to implement the boolean function using 74LS138

Application cicruit

- Construct the circuit and apply the power (remember to note IC pin numbers)

- Apply all possible combinations to the inputs and obtain and take note of the outputs FTest in the Table 1.5

Student’s implementation on breadboard

LAB 2: IMPLEMENTATION OF BASIC LOGIC GATES AND FUNCTIONAL ICs ON FPGA

Note, the top-level file of the project must be named the name of the header file, for example

"lab2tn1_wrapper", with the module "lab2tn1" being the module containing the code describing the design of experiment 1

Ex: The experiment of writing hardware design in SystemVerilog language for the function 𝑓(𝑥, 𝑦, 𝑧) = x𝑦𝑧 as experiment 1 of lab 2, we have the following SystemVerilog code:

Figure 2.1: Implementation of 𝑓(𝑥, 𝑦, 𝑧) = 𝑥𝑦𝑧 – module “lab2tn1”

Below is top level “lab2tn1_wrapper” that implement 𝑓(𝑥, 𝑦, 𝑧) = x𝑦𝑧:

Figure 2.2: Implementation of 𝑓(𝑥, 𝑦, 𝑧) = 𝑥𝑦𝑧 – module “lab2tn1_wrapper”

Next, students perform the simulation, and load the Kit as instructed at Lab 0

For the experiments that require the use of IC 74LS151/74LS138, students write the code describing this IC and call that module as above

PREPARATION 1

Objective: Implementation of Boolean function 𝑓(𝑥, 𝑦, 𝑧) = 𝑥𝑦𝑧 +𝑥𝑦𝑧 + 𝑥𝑦 on FPGA DE2

Procedure:

● Construct the truth table of 𝑓(𝑥, 𝑦, 𝑧) = 𝑥𝑦𝑧 +𝑥𝑦𝑧 + 𝑥𝑦

● Write the SystemVerilog code that describe 𝑓(𝑥, 𝑦, 𝑧) = 𝑥𝑦𝑧 + 𝑥𝑦 𝑧 + 𝑥𝑦s

instructed in lab 0 with the following pin assignment:

○ Pins x, y, z assigned to SW2, SW1, SW0 and LEDR2, LEDR1, LEDR0 respectively

○ Pin f assigned to LEDG0

● Compile and simulate the project The output waveform have to show all possible input combinations Capture the output waveform

Truth table SystemVerilog code

Waveform:

PREPARATION 2

Objectives: Write SystemVerilog code to

describe the truth table in Table 2.1

○ Pin f assigned to LEDG0

● Compile and simulate the project The output waveform have to show all possible input combinations Capture the output waveform

Waveform:

○ Pin f assigned to LEDG0

● Compile and simulate the project The output waveform have to show all possible input combinations Capture the output waveform

Waveform:

PREPARATION 4

Objective: Write SystemVerilog code to describe IC Multiplexer 74LS151 Implement

function 𝑓(𝑥, 𝑦, 𝑧) = ∑(1,2,4,7) using that multiplexer

Procedure:

● Write SystemVerilog code describe IC multiplexer 74LS151 operation

● Using above multiplexer, write SytemVerilog code implementing Boolean function 𝑓(𝑥, 𝑦, 𝑧) = ∑(1,2,4,7):

○ Pins x, y, z assigned to SW2, SW1, SW0 and LEDR2, LEDR1, LEDR0 respectively

○ Pin f assigned to LEDG0

○ Call IC 74LS151 as a submodule

● Compile and simulate the project The output waveform have to show all possible input combinations Capture the output waveform

Truth table SystemVerilog code

Waveform:

PREPARATION 5

𝑓(𝑥, 𝑦, 𝑧) = ∑(0,2,5,7) using that decoder

Procedure:

● Write SystemVerilog code describe IC decoder 74LS138 operation

● Using above decoder, write SytemVerilog code implementing Boolean function 𝑓(𝑥, 𝑦, 𝑧) = ∑(0,2,5,7):

○ Pins x, y, z assigned to SW2, SW1, SW0 and LEDR2, LEDR1, LEDR0 respectively

○ Pin f assigned to LEDG0

B LAB MANUAL:

I OBJECTIVES:

- Understand how to use FPGA kits, programming software

- Understand how to design a basic functional ICs on FPGA

- Understand the process of describing hardware on FPGAs

II LAB PREPARATION:

- To prepare well for the test, students MUST read Appendix 1 first and complete the

steps of Sample lab in Appendix 2, and submit it with Prelab 2 before entering class

- Students must complete and submit Prelab 2 before entering class

- Students read the appendix and the Kit DE2 Manual to understand how to use the DE2 Kit, wiring, peripherals, and how to use Quartus software to simulate and synthesize circuits Students refer to the documentation to understand how to write hardware designs in the SystemVerilog language

III LAB INSTRUCTIONS:

➢ Apply all possible combinations to the inputs and take note the outputs in the f column

of Table 2.2

➢ Draw the logic diagram of F:

➢ Write the SystemVerilog describe the operation of 𝑓(𝑥, 𝑦, 𝑧) = 𝑥𝑦𝑧 + 𝑥𝑦𝑧 + 𝑥𝑦 with the pin assignment as follows:

o Pins x, y, z assigned to SW2, SW1, SW0 and LEDR2, LEDR1, LEDR0 respectively

o Pin f assigned to LEDG0

➢ Synthesize the SystemVerilog design and take note the output in the f sim columnin

Table 2.2

(Insert a photo demonstrating simulation results)

➢ Students view the result of the circuit (Tool Netlist Viewer → → RTL Viewer) Is this result similar to the logic gate diagram drawn above? Exlain