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Tiêu đề Digital Design and Computer Organization
Tác giả Hassan A. Farhat
Trường học CRC Press
Chuyên ngành Digital Design and Computer Organization
Thể loại Book
Năm xuất bản 2004
Thành phố Boca Raton
Định dạng
Số trang 23
Dung lượng 133,72 KB

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DigitalDesign TV pdf DIGITAL DESIGN AND COMPUTER ORGANIZATION DIGITAL DESIGN AND COMPUTER ORGANIZATION HASSAN A FARHAT CRC PRESS Boca Raton London New York Washington, D C This edition published in th[.]

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DIGITAL DESIGN AND COMPUTER

ORGANIZATION

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DIGITAL DESIGN AND

COMPUTER ORGANIZATION

HASSAN A.FARHAT

CRC PRESS

Boca Raton London New York Washington, D.C.

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This edition published in the Taylor & Francis e-Library, 2005.

“To purchase your own copy of this or any of Taylor & Francis or Routledge’s collection of

thousands of eBooks please go to www.eBookstore.tandf.co.uk.”

Library of Congress Cataloging-in-Publication Data

Farhat, Hassan A.

Digital design and computer organization/Hassan A.Farhat.

p cm.

Includes index.

ISBN 0-8493-1191-8 (alk paper)

1 Digital electronics 2 Logic circuits—Design and construction 3 Computer

organization I Title.

TK7868.D5F37 2004 004.2 2–dc22 2003055805 This book contains information obtained from authentic and highly regarded sources Reprinted material is quoted with permission, and sources are indicated A wide variety of references are listed Reasonable efforts have been made to publish reliable data and information, but the author and the publisher cannot assume responsibility for the validity of all materials or for the consequences of

their use.

Neither this book nor any part may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying, microfilming, and recording, or by any information storage or retrieval system, without prior permission in writing from the publisher The consent of CRC Press LLC does not extend to copying for general distribution, for promotion, for creating new works, or for resale Specific permission must be obtained in writing from CRC

Press LLC for such copying.

Direct all inquiries to CRC Press LLC, 2000 N.W Corporate Blvd., Boca Raton, Florida 33431.

Trademark Notice: Product or corporate names may be trademarks or registered trademarks, and

are used only for identification and explanation, without intent to infringe.

Visit the CRC Press Web site at www.crcpress.com

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TO MY FATHER

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Sincere thanks go to the two acquiring editors from CRC Press: Nora Konopka

as the main editor and Gerald Papke for his initial letter of encouragement andearly correspondence Nora’s deadline extensions and kindness have made thistask a reality Many thanks for all their help go to the textbook’s project editor,Gerry Jaffe, as well as to Jamie Sigal, Dawn Snider, and the other staff memberswho worked on the textbook

Thanks to the staff of Electronics Workbench for supplying the software to beused with the text: in particular, Ian Suttie, vice president of sales, Joan Lewis-Milne, director of educational marketing, Scott Duncan, and the technical supportstaff that tested the circuits

Thanks go to my students for their various inputs Finally, sincere thanks andlove go to my wife, son, and daughter for their encouragement, help, andunderstanding during the many hours it took to complete the textbook

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1 The emphasis of the textbook is on logic design with minimal reference toelectrical properties This is an advantage to computer science students thathave had no previous training in electrical engineering The text assumes noprevious knowledge of electrical components (elementary coverage isincluded and is optional) Electrical engineering students can also benefitfrom the textbook since, if needed, the topics can be complemented with labsupplements that consider electrical constraints.

2 Outside the use of a schematic capture tool used to simulate designs fromprimitive gates, the textbook is written to be vendor independent Minimalcoverage of actual chips and functionality is considered As a result, thediscussion is presented in general terms that emphasize the principles ofdigital design

3 Topics are covered in the context of computer organization The last twochapters of the text introduce instruction set architecture and present acomplete design of a simple AC-based CPU In this context students relatethe principles of digital design studied to the topic of computer organization

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4 To enhance topics coverage, the majority of the circuits presented in the textare found in the accompanying CD These circuits were designed and testedusing the Electronics Workbench package Many of the circuits found in thetext are screen captures from the package The Electronics Workbenchpackage was chosen due to its friendly graphical-user interface Withminimal previous knowledge, the student can start the design process fromtruth tables, for example, and progress through the textbook to morecomplex design The included circuits provide students the ability tosimulate the functionality of the circuits in a hands-on fashion.

5 Topics are introduced in a gradual fashion The coverage starts with simplecases and builds on these cases to introduce general cases

Chapter 1 covers numbers representations and arithmetic in different bases Thetopics covered include positional number systems, data types and ranges,conversion between the different bases, arithmetic in different bases, coding, andfloating-point number representation Radix complements and diminished radixcomplements are introduced Arithmetic using this representation, however, isdeferred until Chapter 5

Chapter 2 includes introduction to Boolean algebra and its properties,algebraic simplification of Boolean expressions, gate representations in terms ofdesign and analysis In addition, the chapter includes elementary electricaltopics The concepts of voltage, current, and resistance are introduced These arethen followed with Kirchhoff’s laws, voltage division, RC circuits, andapplications in CMOS gate design

Chapter 3 begins with coverage of the canonical forms of Boolean functionsand logical completeness The design of circuits from canonical forms isconsidered; logical completeness is used to introduce additional gates and tointroduce different two-level designs Design automation tools and theElectronics Workbench are discussed

Chapter 4 covers K-maps and the tabular method of minimizations forcompletely and incompletely specified functions The chapter also includesmultiple-output function minimization

Chapter 5 deals with arithmetic and logic circuits Topics covered includebinary adders, look-ahead carry generators, magnitude comparators, binarysubtractors, and multipliers In addition, the chapter includes discussion of radixarithmetic, and allowable ranges are discussed in detail The discussion includesthe design of adders/subtractors based on the operands representation Thechapter concludes by designing an arithmetic logic unit in relation to computerorganization Bit-wise logic operations and multiplexers, as source selectors, arediscussed in the context of the ALU (arithmetic logic unit) design

Chapter 6 covers decoders, encoders, multiplexers, and demultiplexers Thedesign of Boolean functions, from decoder and multiplexers, and how to buildlarger units from smaller ones is covered In addition, the chapter covers

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programmable logic devices (Read Only Memory [ROM], Programmable LogicArray [PLA], and Programmable Array Logic® [PAL®]) The design usingdiodes as a conceptual realization at lower levels is given in the chapter as well.Here students can use the Electronics Workbench to experiment Switches areincluded to simulate the process of programming the devices.

Chapter 7 starts the discussion of sequential circuits It covers latches, latchesbehavioral description (characteristic tables, equations, state diagrams, andtiming diagrams), gated latches, master-slave flip-flops, ones catching, edge-triggered flip-flops, and introduces sequential circuit analysis

Chapter 8 covers the design of sequential circuits by relating it to analysis ascovered in the previous chapter Here, the constraints on the design are relaxed.Design based on excitation equations is given, followed by design fromcharacteristic equations and design from word problems The chapter includesdiscussions of the two machine representations, Mealy and Moore, and how oneconverts from one machine to the other In addition, state minimization iscovered in the chapter

Chapter 9 includes the design of registers, counters, and general-purposeregisters/counters The chapter introduces memory design by designing largermemory from smaller memory first This is then followed with design ofmemory cells and the internal design of a static RAM The chapter concludeswith a discussion of register files and relates the discussion to CPU organizationand the ALU designed in Chapter 5

Chapter 10 is an introduction to instruction set architectures Two differentarchitectures (AC-based and general-purpose register-based) are discussed.Instructions formats in relation to both architectures are covered Covered aswell are translation of assembly instructions into machine instructions and thedifferent addressing modes Finally, the concept of macros as an alternative tohardware instructions is introduced The homework section of this chapterincludes discussion of stack-based instruction set architecture

The book concludes with Chapter 11, where the design of a simple AC-basedCPU is considered To do this, we introduce the concept of a micro-operationand register-transfer languages The design of register-transfer languages usingdirect connections and bus connections is then covered This is followed withinstruction set completeness, the instruction set of the AC-based CPU, the data-path and memory connections, and the control unit organization The design ofthe CPU is then covered by considering the design of the combinational part ofthe control unit

The instructor resources for the text include a solutions manual to theexercises given at the end of the chapters This is in addition to a detailed set oflecture notes supplied in PowerPoint format

The textbook is written to be suitable as 3-credit hour or 4-credit hour course

In a traditional 3-credit hour course, the minimal suggested topics coverage is

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Chapter 9 (Sections 9.8 and 9.9 are optional)

The optional sections in Chapters 2 and 6 deal with the introductions to electricalcircuits and designs of programmable logic devices using diodes The intention

is to give the reader with no electrical engineering background an elementaryintroduction to the topics Chapter 8 deals with design of sequential circuits Someinstructors may cover the topic in a second digital course

In a 4-credit hour course, the remaining chapters can be covered This may besuitable in computer science curricula with two courses in the hardware area(digital design and computer architecture)

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Hassan A.Farhat received his Ph.D in Computer Science and Engineering in

1988 from the University of Nebraska at Lincoln His research interests are invery-large-scale integration (VLSI) testing and computer graphics Among thepublications in VLSI testing, Dr Farhat received best paper contributor award atthe IEEE International Conference in Computer Design (ICCD) in 1988 Histeaching interests are in the hardware track (digital design, computerorganization, and computer architecture); VLSI testing; and computer graphics

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Table of Contents

1.1 Digital and Analog Data 2

1.3 Positional Number System 4

1.3.1 Numbers without Radix Point 4

1.3.2 Numbers with Radix Point 5

1.4 Octal and Hexadecimal Bases 6

1.5 Operands Types and Their Range 9

1.6.1 Conversion of Integer Part 13

1.6.2 Converting the Fractional Part 14

1.7 Binary Arithmetic 16

1.7.2 Subtraction 19

1.7.3 Multiplication 20

1.8 Radix and Diminished Radix Complements 22

1.9 Representation of Negative Numbers 24

1.9.1 The Three Representations 24

1.9.2 Range of the Numbers 26

1.10 Coding and Binary Codes 27

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1.10.2 The Excess-m Code 28

1.10.3 Gray Code 30

1.10.4 Character Codes 31

1.11 Floating-Point Numbers 32

1.11.1 Binary Representation of Floating-Point 32

1.11.2 Normalized and Biased Floating-Point Representation 34

Chapter 1 Exercises 35

2.1 Boolean or Switching Algebra 38

2.4.3 Complement of Boolean Functions 54

2.5 Circuit Analysis and Gate Design 55

2.5.1 Circuit Analysis and Gate Representation 55

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2.7.2 Kirchhoff’s Voltage Law 62

2.7.3 Voltage Division 63

2.8 Kirchhoff’s Current Law 66

2.9 RC Circuits 70

2.10 Transistors and Logic Gates 73

2.11 CMOS Gate Design 76

2.11.1 The AND CMOS Design 78

Chapter 2 Exercises 78

3.1 Canonical Forms of Boolean Functions 85

3.1.1 Canonical Sum Form 85

3.1.2 Canonical Product Form 90

3.2 Sum of Product and Product of Sum Forms 93

3.2.1 Sum of Product Form 93

3.2.2 Product of Sum Form 94

3.2.3 Verification of Function Equality Using Canonical Forms 95

3.3 Design of Functions in Standard Forms 96

3.3.1 Canonical Sum and Sum of Product Design 96

3.3.2 Canonical Product and Product of Sum Representation 97

3.4 Other Two Variable Functions 98

3.4.1 Number of Boolean Functions over Two Variables 99

3.4.1.1 The NAND Function 99

3.4.1.2 The NOR Function 99

3.4.1.3 The Exclusive OR Function 100

3.4.1.4 The Equivalence Function 100

3.5 Logical Completeness 101

3.5.1 Definition and Examples 101

3.5.2 The NAND and NOR Gates as Logically Complete Gates 102

3.6 HAND and NOR Design of Combinational Circuits 104

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3.6.1 NAND Gate Design 105

3.6.2 NOR Gate Design 105

3.6.3 AND-OR-Invert and OR-AND-Invert Design 107

3.7 Design Automation Tools and Levels of Abstraction 108

3.8 Application to the Electronics Workbench (EW) 114

3.8.1 The Electronics Workbench 114

3.8.2 Design Entry 115

3.8.2.1 Design Entry through Truth Tables 116

3.8.2.2 Design Entry through Equations 117

3.8.2.3 Design Entry Using Schematic Capture 117

3.8.3 Synthesis 120

3.8.3.1 Synthesis from Truth Table 121

3.8.3.2 Synthesis from Equations 122

3.8.3.3 Synthesis from Schematic Capture 122

4.1 Logical Adjacencies and K-Map Construction 132

4.1.1 Logical Adjacency 132xiv

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4.1.2 K-Map Construction 134

4.1.2.1 The Inputs to the Table 135

4.1.2.2 How Is the Table Read? 135

4.2 Subcube Formations 136

4.2.1 Filling the Table Entries 136

4.2.2 Subcubes and Minimization 137

4.3 K-Map Minimization 140

4.3.1 Subcubes and Prime Implicants 140

4.3.2 K-Map Minimization 142

4.3.2.1 Relationship to Subcubes on a K-Map 143

4.3.2.2 The Minimization Process 145

4.3.2.3 Essential Prime Implicants and Examples 146

4.4 Incompletely Specified Functions 149

4.5 Product of Sum Minimization 152

4.6 The Quine-McCluskey or Tabular Method 153

4.6.1 Building Prime Implicants 153

4.6.2 Finding Minimal Cover 155

4.6.3 Algorithmic Procedure of the Tabular Method 156

4.6.3.1 Forming the Prime Implicants 156

4.6.3.2 Minimal Cover Procedure 159

4.6.4 Decimal Method of Building Prime Implicants 161

4.7 Multiple-Output Function Minimization 162

5.1.2 Half and Full Adders 173

5.2 Look-Ahead Carry Generators 176

5.3 Magnitude Comparators 178

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