8051 chap6 interrupts VI XỬ LÝ

Scott Mackenzie Lê Chí Thông 12 When an event occurs the corresponding interrupt flag is set... Scott Mackenzie Lê Chí Thông 13 When an event occurs the corresponding interrupt flag is

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Chapter 6 Interrupts The 8051 Microcontroller

Lê Chí Thông

chithong@hcmut.edu.vn

sites.google.com/site/chithongRef I Scott Mackenzie, The 8051 Microcontroller

What Is an Interrupt?

(Source: http://www.6502.org/tutorials/interrupts.html )

• An interrupt= Occurrence of a condition (an event)

• Deal with the event while another program is executing

• Do many things “simultaneously”

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When an interrupt occurs, the main program temporarily suspends execution and branches to the interrupt service routine (ISR), perform the operation, and terminates with a “return from interrupt” instruction (RETI)

Hardware Event

Ref I Scott Mackenzie Lê Chí Thông 3

SUBROUTINE_NAME:

…

…RET

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• 2 External Interrupts

• 2 Timer Interrupts

• 1 Serial Port Interrupt

• Timer 2 Interrupt (8052 only)

Interrupt Sources

When an Interrupt occurs?

An interrupt = Occurrence of a condition (an event)

• When a falling edge occur at /INT0 pin, External 0 Interrupt occurs

• When a falling edge occur at /INT1 pin, External 1 Interrupt occurs

• When Timer 0 is overflow, Timer 0 Interrupt occurs

• When Timer 1 is overflow, Timer 1 Interrupt occurs

• When the transmission is done (transmit buffer is empty) or the reception is done (receiver buffer is full), Serial Port Interrupt occurs

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2 external interrupts (/INT0 and /INT1), 2 timer interrupts (TF0 and TF1), a serial port interrupt (RI or TI), and Timer 2 interrupt (8052 only)

Interrupt Sources

• EA : Global enable/disable

• - : Undefined

• ET2: Enable Timer 2 interrupt

• ES: Enable Serial port interrupt

• EX1: Enable External 1 interrupt

• EX0: Enable External 0 interrupt

1 = Enable; 0 = Disable

EA - ET2 ES ET1 EX1 ET0 EX0 Enabling and Disabling Interrupts

IE (Interrupt Enable) Register

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EA - ET2 ES ET1 EX1 ET0 EX0 Enabling and Disabling Interrupts

Eg Timer 1 interrupt is enabled as follow:

SETB ET1 SETB EA

or

MOV IE,#10001000B

Eg External 0 and serial interrupts are enabled as follow:

SETB EX0 SETB ES SETB EA

or

MOV IE,#10010001B

IE (Interrupt Enable) Register

• PT2 : Priority for Timer 2 interrupt

• PS: Priority for Serial port interrupt

• PT1: Priority for Timer 1 interrupt

• PX1: Priority for External 1 interrupt

• PT0: Priority for Timer 0 interrupt

• PX0: Priority for External 0 interrupt

1 = Higher Level; 0 = Lower Level

- - PT2 PS PT1 PX1 PT0 PX0

Interrupt Priority

IP (Interrupt Priority) Register

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- - PT2 PS PT1 PX1 PT0 PX0

Interrupt Priority

• If 2 interrupts occur simultaneously

a high-priority ISR executes

• If a low-priority ISR is executing when a high-priority interrupts

the low-priority ISR is interrupted

A high-priority interrupt can interrupt a low-priority ISR

A high-priority ISR cannot be interrupted

• If 2 interrupts of the same priority occur simultaneously

a fixed polling sequence determines which is serviced first

The polling sequence is external 0, Timer 0, external 1, Timer

1, serial port, Timer 2

IP (Interrupt Priority) Register

Interrupt Flags

When an event occurs the corresponding interrupt flag is set

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Interrupt Flags

When an event occurs the corresponding interrupt flag is set

INTERRUPT FLAG VECTOR ADDRESS

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Processing Interrupts

• When an interrupt (an event) occurs:

The corresponding interrupt flag is set

The current instruction completes execution

The PC is saved on the stack

The PC is loaded with the interrupt vector, which is the address of the start of the ISR

The interrupt flag is automatically cleared, except RI &TI (and TF2 & EXF2 for 8052)

The ISR executes and takes action in response to the interrupt

• The ISR finishes with a RETI (return from interrupt) instruction

This retrieves the old value of the PC from the stack and execution of the main program continues

An Example

• Assume that External 0 interrupt was enabled

(automatically by hardware)

• The current PC is saved on the stack

• PC  0003H  (and the main program is interrupted)

• The instruction at address 0003H (i.e the first instruction of the ISR for

• When the ISR is done, the RETI instruction retrieves the old value of the PC

• Question: What will happen if there is NO falling edge (or level 0) applied to pin P3.2 (/INT0) (i.e NO interrupt signal occur) but bit IE0 is set by software (i.e by using SETB IE0)?

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External Interrupt

A push-button is connected to pin P3.2 (/INT0) A falling edge is created when pushing this button Write a program that sets pin P1.7 when pushing the button down

External Interrupt

A push-button is connected to pin P3.2 (/INT0) A falling edge is created when pushing this button Write a program that sets pin P1.7 when pushing the button down

ORG 0000H LJMP MAIN ORG 0003H ;ISR External Int 0 SETB P1.7

RETI ORG 0030H ;Main program MAIN: SETB EA

SETB EX0 ;Enable Ext Int 0 SETB IT0 ;Falling edge SJMP $

END

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Practice Problem 1

A push-button is connected to pin P3.2 (/INT0) A falling edge is created when pushing this button Write a program that creates one 10-ms pulse at pin P1.7 when pushing the button down

Practice Problem 1

A push-button is connected to pin P3.2 (/INT0) A falling edge is created when pushing this button Write a program that creates one 10-ms pulse at pin P1.7 when pushing the button down

ORG 0000H LJMP MAIN ORG 0003H SETB P1.7 ACALL DELAY10MS CLR P1.7

RETI ORG 0030H MAIN:MOV TMOD,#01H

SETB EA SETB EX0

SETB IT0 SJMP $ DELAY10MS:

MOV TH0,#(-10000) MOV TL0,#(-10000) SETB TR0

JNB TF0,$

CLR TF0 CLR TR0 END

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Practice Problem 2

when pushing this button Write a program that increases the content of location 40H of internal RAM when pushing the button down

Practice Problem 2

An push-button is connected to pin P3.3 (/INT1) A falling edge is created when pushing this button Write a program that increases the content of location 40H of internal RAM

ORG 0000H LJMP MAIN ORG 0013H ;Int vector of external int 1 INC 40H

RETI ORG 0030H MAIN:SETB EA

SETB EX1 ;Enable ext int 1 SETB IT1 ;Falling edge SJMP $

END

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An Example of a Program Using Small ISR

ORG 0000H ;Reset LJMP MAIN

ORG 000BH ;Interrupt vector of Timer 0 T0ISR:…

…

MAIN: …

… END

An Example of a Program Using Large ISR

ORG 0003H ;Interrupt vector of External 0 LJMP E0ISR

ORG 000BH ;Interrupt vector of Timer 0 LJMP T0ISR

ORG 0013H ;Interrupt vector of External 1 LJMP E1ISR

ORG 001BH ;Interrupt vector of Timer 1 LJMP T1ISR

ORG 0023H ;Interrupt vector of serial port LJMP SPISR

ORG 0030H MAIN: …

SJMP $ E0ISR: …

RETI T0ISR: …

RETI

… END

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ISR Vector table

3-byte instruction

Memory Organization

Timer (8 bit) InterruptWrite a program using Timer 0 and interrupt to create a 10 kHz square wave on P1.0 (Crystal 12 MHz)

ORG 000BH ;Interrupt vector of Timer 0 T0ISR: CPL P1.0

RETI ORG 0030H MAIN: MOV TMOD,#02H

MOV TH0,#-50 SETB TR0 MOV IE,#82H SJMP $ END

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ORG 001BH ;Interrupt vector of Timer 1 T0ISR: CPL P1.7

MOV TH1,#-50 SETB TR1 SETB EA SETB ET1 SJMP $ END

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MOV TH1,#-100 SETB TR1 SETB EA SETB ET1 SJMP $ END

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MOV SCON,#52H MOV TH1,#-26 SETB TR1 MOV TH0,#-250 SETB TR0 SETB EA SETB ET0 SJMP $

PHAT: JNB TI,$

CLR TI MOV SBUF,A RET

END

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Timer (16 bit) Interrupt

Write a program using Timer 0 and interrupt to create a 1 kHz square wave on P1.1 (Crystal 12 MHz)

ORG 0000H LJMP CTCHINH ORG 000BH LJMP CTNGATTIMER0 ORG 0030H

CTCHINH:

MOV TMOD,#01H MOV TH0,#HIGH(-500) MOV TL0,#LOW(-500) SETB TR0

SETB EA SETB ET0 SJMP $

CTNGATTIMER0:

CPL P1.1 CLR TR0 MOV TH0,#HIGH(-500) MOV TL0,#LOW(-500) SETB TR0

RETI END

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ORG 0000H LJMP CTCHINH ORG 000BH LJMP CTNGATTIMER0 ORG 0030H

CTCHINH:

MOV TMOD,#01H SETB EA SETB ET0

SETB TF0 ; Ép ngắt

SJMP $

CTNGATTIMER0:

RETI END

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SJMP $

CTNGATTIMER1:

RETI END

Practice Problem 2

Write a program using Timer 1 and interrupt to complement P1.2 every 1 sec (Crystal 12 MHz)

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SJMP $

CTNGATTIMER1:

RETI END

Two Square Waves Using Timer Interrupts

Write a program using interrupts to create 7 kHz and 500 Hz square waves on P1.7 and P1.6 (Crystal 12 MHz)

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Two Square Waves Using Timer Interrupts

ORG 0000H LJMP MAIN ORG 000BH LJMP T0ISR ORG 001BH LJMP T1ISR ORG 0030H MAIN: MOV TMOD,#12H

MOV IE,#8AH MOV TH0,#-71 SETB TR0 MOV TH1,#HIGH(-1000) MOV TL1,#LOW(-1000) SETB TR1

CLR TR1 MOV TH1,#HIGH(-1000) MOV TL1,#LOW(-1000) SETB TR1

RETI END

Character Output Using Interrupts

ORG 0000H LJMP MAIN ORG 0023H LJMP SPISR ORG 0030H MAIN: MOV TMOD,#20H

MOV TH1,#-26 SETB TR1 MOV SCON,#42H MOV IE,#90H MOV A,#20H SETB TI SJMP $

Write a program using interrupts to continually transmit the ASCII code set (excluding control codes) to a terminal attached to the 8051’s serial port (1200 baud, 12 MHz crystal) The ASCII codes consist of 95 graphic codes (20H to 7EH) and

33 control codes (00H to 1FH, and 7FH).

SPISR: CJNE A,#7FH,SKIP

MOV A,#20H SKIP: MOV SBUF,A

INC A CLR TI RETI END

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Character Output Using Interrupts (2)Write a program using interrupts to continually transmit the ASCII code set (excluding control codes) to a terminal attached to the 8051’s serial port (1200 baud, 12 MHz crystal) The ASCII codes consist of 95 graphic codes (20H to 7EH) and

Character Output Using Interrupts (2)

ORG 0000H LJMP MAIN ORG 0023H LJMP SPISR ORG 0030H MAIN: MOV SCON,#52H

MOV TMOD,#20H MOV TH1,#-26 SETB TR1 MOV A,#20H MOV IE,#90H SJMP $

Write a program using interrupts to continually transmit the ASCII code set (excluding control codes) to a terminal attached to the 8051’s serial port (1200 baud, 12 MHz crystal) The ASCII codes consist of 95 graphic codes (20H to 7EH) and

SPISR: CLR TI

MOV SBUF,A INC A CJNE A,#7FH,SKIP MOV A,#20H SKIP: RETI

END

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Furnace ControllerUsing interrupts, design an 8051 furnace controller that keeps a building at 20 o C ± 1 o C.

Temperature sensors are connected to /INT0 and /INT1 and provide /HOT and /COLD signals The furnace ON/OFF solenoid is connected to P1.7.

/HOT = 0 if T > 21 o C /COLD = 0 if T < 19 o C P1.7 = 1 : Furnace ON P1.7 = 0 : Furnace OFF

RETI ORG 0013H E1ISR: SETB P1.7 ;turn furnace on

RETI ORG 0030H MAIN: MOV IE,#85H ;enable external 0 & 1 interrupts

SETB IT0 ;negative edge triggered for external 0 SETB IT1 ;negative edge triggered for external 1 SETB P1.7 ;turn furnace on

JB P3.2,SKIP ;if T > 21 degrees, CLR P1.7 ; turn furnace off SKIP: SJMP $ ;do nothing

END

Using interrupts, design an 8051 furnace controller that keeps a building at 20 o C ± 1 o C.

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Intrusion Warning System (1)Design an intrusion warning system using interrupts that sounds a 400 Hz tone using loudspeaker connected to P1.7 whenever a door sensor connected /INT0 makes a high-to-low transition.

P3.2

Intrusion Warning System (1)Design an intrusion warning system using interrupts that sounds a 400 Hz tone using loudspeaker connected to P1.7 whenever a door sensor connected /INT0 makes a high-to-low transition.

ORG 0000H LJMP MAIN ORG 0003H LJMP E0ISR ORG 001BH LJMP T1ISR ORG 0030H MAIN: SETB IT0

MOV TMOD,#10H MOV IE,#81H SJMP $ E0ISR: SETB TF1

SETB ET1 RETI

T1ISR: CLR TR1

MOV TH1,#HIGH(-1250) MOV TL1,#LOW(-1250) CPL P1.7

SETB TR1 RETI END

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Intrusion Warning System (2)

P3.2

50 ms

Design an intrusion warning system using interrupts that sounds a 400 Hz tone for

50 ms (using loudspeaker connected to P1.7) whenever a door sensor connected /INT0 makes a high-to-low transition.

Intrusion Warning System (2)Design an intrusion warning system using interrupts that sounds a 400 Hz tone for

50 ms (using loudspeaker connected to P1.7) whenever a door sensor connected /INT0 makes a high-to-low transition.

ORG 0000H LJMP MAIN ORG 0003H LJMP E0ISR ORG 000BH LJMP T0ISR ORG 001BH LJMP T1ISR ORG 0030H MAIN: SETB IT0

MOV TMOD,#11H MOV IE,#81H SJMP $ E0ISR: MOV TH0,#HIGH(-50000)

MOV TL0,#LOW(-50000) SETB TR0

SETB ET0 SETB ET1 RETI T0ISR: CLR TR0

CLR ET0 CLR ET1 RETI T1ISR: CLR TR1

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Intrusion Warning System (3)Design an intrusion warning system using interrupts that sounds a 400 Hz tone for

1 second (using loudspeaker connected to P1.7) whenever a door sensor connected /INT0 makes a high-to-low transition.

P3.2

Intrusion Warning System (3)

ORG 0000H LJMP MAIN ORG 0003H LJMP E0ISR ORG 000BH LJMP T0ISR ORG 001BH LJMP T1ISR ORG 0030H MAIN: SETB IT0

MOV TMOD,#11H MOV IE,#81H SJMP $ E0ISR: MOV R7,#20

SETB TF0 SETB TF1 SETB ET0

SETB ET1 RETI T0ISR: CLR TR0

DJNZ R7,SKIP CLR ET0 CLR ET1 LJMP EXIT SKIP: MOV TH0,#HIGH(-50000)

MOV TL0,#LOW(-50000) SETB TR0

EXIT: RETI T1ISR: CLR TR1

Design an intrusion warning system using interrupts that sounds a 400 Hz tone for

1 second (using loudspeaker connected to P1.7) whenever a door sensor connected /INT0 makes a high-to-low transition.

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References

Lê Chí Thông

• I Scott Mackenzie, The 8051 Microcontroller

• Các tài liệu trên Internet không trích dẫn hoặc không ghi tác giả

Tiêu đề	The 8051 Microcontroller Chapter 6 Interrupts
Tác giả	Lê Chí Thông
Trường học	ĐH Bách Khoa TP.HCM
Thể loại	Bài giảng
Năm xuất bản	2025
Thành phố	TP.HCM

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