Kiến thức cơ bản về Verilog HDL ngôn ngữ lập trình Verilog HDL Thiết kế vi mạch bằng Verilog-HDL Verilog HDL Programming
Trang 3PART 1 BASIC VERILOG TOPICS 1
1 Overview of Digital Design with Verilog HDL 3
2 Hierarchical Modeling Concepts 11
8 Tasks and Functions 157
9 Useful Modeling Techniques 169
10 Timing and Delays 193
11 Switch- Level Modeling 213
12 User-Defined Primitives 229
13 Programming Language Interface 249
14 Logic Synthesis with Verilog HDL 275
A Strength Modeling and Advanced Net Definitions 321
B List of PLI Rountines 327
C List of Keywords, System Tasks, and Compiler Directives 343
D Formal Syntax Definition 345
E Verilog Tidbits 363
F Verilog Examples 367