Mobile Asia Expo - Synopsys VIP MIPI Overview 16x9 06019012

Synopsys MIPI VIP Next-Generation Discovery VIP for Faster SOC Verification Yuanpeng Su May 2012... © Synopsys 2012 2 Industry Driving Strong Demand for VIP Explosion in number of pro

Synopsys MIPI VIP

Next-Generation Discovery VIP for Faster SOC Verification

Yuanpeng Su

May 2012

© Synopsys 2012 2

Industry Driving Strong Demand for VIP

Explosion in number of protocols

• Rapidly Increasing # of protocols on SoCs

• Highly optimized for end-user applications

– PCIe, USB 3.0, Ethernet 100G, SDIO, SATA6G – MIPI Protocols (CSI, DSI, LLI, DigRF, UniPro ) – New versions; new protocols

• VIP is a key part of the verification solution

Increasing mobile display resolutions

2001 2012

AMBA AHB USB2.0 AMBA APB UART

I2C SDIO

MMC-SD PCI

AMBA4 AXI

USB2.0

AMBA4 ACE UART

HDMI I2C

SDIO MMC-SD GPIO

USB3.0 MIPI DSI

MIPI CSI MIPI LLI SLIM Bus

HDMI HDMI USB OTG SATA

MIPI HSI PCIe

10x Protocols

Challenges with Traditional VIP

Configuration & Test Development

• 3+ man-months to implement coverage and scenarios

Current VIP technology

running out of steam

‘e’ and C based VIP

Vera based VIP

© Synopsys 2012 4

Introducing Synopsys Discovery VIP

Introducing Synopsys Discovery VIP

• What you get is what you know

VIPER Architecture

10X faster configuration

• Protocol Aware, Knowledge-based GUI

• In-line protocol help

Test plans eliminate weeks of coverage

development

• Auto-generated to match configuration

Sequence libraries save weeks of

development time

• Save weeks learning the protocol

• Saves time developing tests

Top-level Plans for all interfaces

Test Plans

Coverage bins

Synopsys Confidential

Higher Performance with Native Simulation

Faster Performance with SystemVerilog VIP

Single kernel, No PLI solution

• Runs natively in all SystemVerilog simulator

• Code size reduced by up to 20% by eliminating

wrappers

Eliminates inefficiency of

methodology mapping

• Wrappers turn a single object into many

call/tasks to map to underlying VIP

Several VIP configurations on Consumer SOC Synopsys (2-4X)

© Synopsys 2012 8

Protocol Aware Debug Environment

Simulator Independent Protocol Analyzer

Simplified viewing of protocol activity

• Visually unravels complex protocol behavior

• Quickly highlights bottlenecks or inactivity

Immediate error identification

• Spotlights errors on protocol-centric view

• Provides on-demand detailed information

Accelerated root-cause analysis

• Highlights relationships across protocol hierarchy of

transfers, packets, handshaking

• Link to DVE and Verdi provides signal-level debug

related to each transaction

Synopsys Confidential

Protocol Analyzer Link to Signal View

Integrated with DVE and Verdi for signal-level debug

• Autoload all protocol

signals in waveform view

• Highlight start and end of

transactions with cursors

• Synchronizes scrolling in

time-domain

Cross Highlighting

© Synopsys 2012 10

Functional Coverage Group in VIP

Built-in Protocol Coverage

Specification to plan to closure

• Protocol specification mapped to verification plan and functional coverage groups

– Eases identification of low coverage protocol features

expertise in developing design IP

• Built-in protocol cover points

• Highlights coverage holes

– Results back-annotated onto built-in verification plan

Protocol Specification

Back Annotated Coverage from Simulation Protocol Verification Sub-Plan

Synopsys Verification IP Portfolio

Synopsys VIP Portfolio

AMBA 4 (AXI, ACE) MIPI CSI

AMBA 3 (AXI, APB) MIPI DSI

AMBA 2 (AHB, APB) MIPI DigRF v4

USB 3.0 MIPI HSI

© Synopsys 2012 12

Synopsys VIP for Verification of

• Features

– Configuration Tool – Verification Plan – Built-in Coverage – Protocol Analyzer

• UVM, OVM, VMM and Verilog

– Runs natively for optimum performance

© Synopsys 2012 13

Synopsys Discovery VIP for MIPI

Next Generation VIPER Architecture

• Support for UVM, VMM and Verilog

• Integrated with Discovery Protocol Analyzer

• Other MIPI protocols coming soon

© Synopsys 2012 14

CSI-2 Discovery Verification IP

Comprehensive CSI-2 Verification

• CSI-2 Transmitter and Receiver

• Built-in Protocol Checks

• Built in Verification Plan and Coverage

• Protocol Layer

– Four virtual channels

– All types of packets (short and long)

– Interleaved and normal frames

– Operative/Inoperative line and frame number

– ECC generation, CRC generation and checking

– Error detection and recording

• Physical Layer

– High Speed, Ultra Low Power, Escape Mode

– High Speed Synchonization

– One to four PHY data lanes

CSI-2 Flow Serial

VIP CSI-2 Protocol + Physical Generator(s)

Serial

Functional Coverage

Phase Control

CSI-2 Flow Parallel

VIP CSI-2 Protocol

D-PHY

PPI

Generator(s)

Functional Coverage

Phase Control

Serial

DSI Discovery Verification IP

Comprehensive DSI Verification

• DSI Transmitter and Receiver

• Built-in Protocol Checks

• Built-in Verification Plan and Coverage

• Protocol Layer

– Four virtual channels

– DCS command, Generic command and Video

– All packet structures

– 16BPP, 18BPP & 24 BPP RGB pixel formats

– ECC generation, CRC generation and checking

– Error detection and recording

• Physical Layer

– One to four PHY data lanes

– High-speed, Low Power and Escape transmission modes

–

DSI Flow Serial

VIP DSI Protocol + Physical Generator(s)

Serial

Functional Coverage

Phase Control

DSI Flow Parallel

VIP DSI Protocol

D-PHY

PPI

Generator(s)

Functional Coverage

Phase Control

Serial

© Synopsys 2012 16

DigRFv4 Verification IP

Comprehensive DigRF Verification

• Built-in Protocol Checks

• Built-in Verification Plan and Coverage

• Protocol Layer

– Configurable high-speed, low-speed and standby

modes (sleep, stall, hibernate)

– ICLC messages, nested frames, dummy frames, idle

symbols, & marker symbols

– Link test modes

– CRC generation, Error detection and Re-transmission

• Physical Layer

– M-PHY serial and parallel RMMI interfaces

– Supports capability, status and configuration attributes

DigRF Flow Serial

VIP DigRF Protocol + Physical Generator(s)

Serial

Functional Coverage

Phase Control

Serial

DigRF Flow Parallel

VIP DSI Protocol

Phase Control

MIPI Debug: Protocol Analyzer

data lane States MIPI DSI Command

selected

HS Long

Transcript of messages, errors, warnings at time

of transaction

MIPI DSI Video packet info detailed Integrated

Docs

© Synopsys 2012 18

Discovery MIPI VIP Deliverables

• Subenv including VIP

Discovery™ Verification IP

• Next-generation architecture

• 100% SystemVerilog

• Native UVM, VMM, and OVM

• Built-in Test Plans & Coverage

• Up to 4x faster

• Protocol-aware debug

• Supports all major simulators

VIPER Architecture

© Synopsys 2012 20

Resources

More VIP

www.synopsys.com/vip

Thank You