Lecture introduction to control systems chapter 6 design of continuous control systems (dr huynh thai hoang)

 IntroductionContent  Introduction  Effect of controllers on system performance  Control systems design using the root locus method  Control systems design using the root locus meth

Lecture Notes

Introduction to Control Systems

Instructor: Dr Huynh Thai Hoang Department of Automatic Control Faculty of Electrical & Electronics Engineering

Ho Chi Minh City University of Technology

Email: hthoang@hcmut.edu.vn

huynhthaihoang@yahoo.com Homepage: www4.hcmut.edu.vn/~hthoang/

Chapter 6

DESIGN OF CONTINUOUS

CONTROL SYSTEMS

 Introduction

Content

 Introduction

 Effect of controllers on system performance

 Control systems design using the root locus method

 Control systems design using the root locus method

 Control systems design in the frequency domain

 Design of PID controllersg

 Control systems design in state-space

 Design of state estimators

Introduction

Introduction to design process

 Design is a process of adding/configuring hardware as well assoftware in a system so that the new system satisfies the

d i d ifi ti

desired specifications

 The controller is connected in series with the plant

 Design method: root locus frequency response

 Design method: root locus, frequency response

State feedback control

 All the states of the system are fed back to calculate the control

 All the states of the system are fed back to calculate the controlrule

+

r(t) u(t)

C y(t)

) ( )

( )

Effects of controller on system Effects of controller on system

performance

 The addition of a pole (in the left-half s-plane) to the

open-Effects of the addition of poles

 The addition of a pole (in the left half s plane) to the openloop transfer function has the effect of pushing the root locus

to the right, tending to lower the system’s relative stability and

to slow down the settling of the response

 The addition of a zero (in the left-half s-plane) to the

open-Effects of the addition of zeros

 The addition of a zero (in the left half s plane) to the openloop transfer function has the effect of pulling the root locus tothe left, tending to make the system more stable and to speed

th ttli f th

up the settling of the response

Effects of lead compensators

 Transfer function:

) 1 (

1

1 )



 ) 20 lg 10 lg ( max  K C 

L

 The lead compensators improve

Lead compensator implementation

 Lead compensator transfer function:

) 1

(

1

1 1

1 )

(

)

(

2 2 1

1

1 1 4

Ts

Ts K

s C R

s C R R

R

R R s

Effects of lag compensators

 Transfer function:

) 1 (

1

1 )

Lag compensator implementation

 Lag compensator transfer function:

) 1

(

1

1 1

1 )

(

)

(

2 2 1

1 2

2

1 1 3

s C R

s C R R

R

R R s

1 (

1

1 1

1 )

2

2 2 1

s T s

T

s

T K

s

 Transfer function:

 Bode diagram

 The lead lag compensators improve transient response and

 The lead-lag compensators improve transient response and

Effects of proportional controller (P)

(

G

)3)(

2(

)(







s s

s

G

Effects of proportional derivative controller (PD)

 Bode diagram

 Transfer function:  Bode diagram

 Transfer function:

)1

()

maximum phase lead is

max=900 at the frequency

max=+

 The PD controller speed up

the response of the system,

however it also makes the

system more sensitive to

system more sensitive to

Effects of proportional derivative controller (PD)

 Note: The larger the derivative constant the faster the

 Note: The larger the derivative constant, the faster theresponse of the system

y(t)

unompensated

PD controller implementation

 PD controller transfer function:

s K K

s C

R R

R

R R s

)

(

1 1

4 2

 PD controller transfer function:

R R s

E ) ( 1 3

E(s)

( ) U(s)

Effects of proportional integral controller (PI)

 Transfer function:  Bode diagram

 Transfer function:

)

11

()

(

s T

K s

K K

s

G

I P

I P

compensator, the minimum

phase lag is min= 900 at

the frequency q y minmin=+

 PI controllers eliminate

stead state error to step

steady state error to step

input, however it can

increase POT and settling

time

Effects of proportional integral controller (PI)

 Note: The larger the integral constant the larger the POT

 Note: The larger the integral constant, the larger the POT

of response of the system

y(t)

uncompensated

PI controller implementation

 PI controller transfer function:

1 )

s C R

s C R R

R

R R s

E(s)

U( )

Effects of proportional integral controller (PID)

K K

( )

s T

K s

K s

Comparison of PI, PD and PID controllers

(t)

y(t)

Uncompensated

Control systems design y y g g using the root locus method

Procedure for designing lead compensator using

Procedure for designing lead compensator using the root locus the root locus

) /

1 (

  T

s

) 1 (

)

/ 1 (

) /

1

( )

T

s K s

 Step 1: Determine the dominant poles from desired

transient response specification:

2 , 1

 Step 2: Determine the deficiency angle so that the dominant

poles lie on the root locus of the compensated system: s1*,2

) arg(

1 ) arg( ) arg(

Procedure for designing lead compensator using the root locus

 Step 3: Determine the pole & zero of the lead compensator

 Step 3: Determine the pole & zero of the lead compensator

Draw 2 arbitrarily rays starting from the dominant pole

such that the angle between the two rays equal to * The

* 1

s

intersection between the two rays and the real axis are the positions of the pole and the zero of the lead compensator Two methods often used for drawing the rays:

 Bisector method

 Pole elimination method

 Step 4: Calculate the gain K C using the formula:

1 )

( )

Example of designing a lead compensator using RL

50



s s

 Objective: j design the compensator Gg p C C (s)( ) so that the

response of the compensated system satisfies: POT<20%;

ts< 0,5sec (2% criterion)

 Solution:

 Because the design objective is to improve the transient

) 1 (

) /

1

( )

G

response, we need to design a lead compensator:

) 1 (

)

/ 1 (

K s

Example of designing a lead compensator using RL (cont’)

 Step 1 Determine the dominant poles

 Step 1: Determine the dominant poles:

2

0 1

* 2 ,

,10

*

j

Example of designing a lead compensator using RL (cont’)

 Step 2: Determine the deficiency angle:

 Step 2: Determine the deficiency angle:

5,

10arctan

5,10

5,

10arctan

1800



  10,5   5,5

)6,117135



j10,5 s

Method 2:

)(

1800 1 2

)6,117135

*

6,72



 

Example of designing a lead compensator using RL (cont’)

 Step 3: Determine the pole and the zero of the compensator

 Step 3: Determine the pole and the zero of the compensator

(bisector method)

s * P x

28 ˆ

2 2

ˆ sin

ˆ sin

OC

, 2

2

ˆ sin

2 2

ˆ sin

OP OC

8



s 8)



 G s K s

Example of designing a lead compensator using RL (cont’)

 Step 4: Determine the gain of the compensator:

 Step 4: Determine the gain of the compensator:

1)

()( s* 

s

C s G s G

1)

55

105

10)(

5105

10(

50

285

105

10

85

,105

,10

j

j

K C

)55

,105

,10)(

5,105

,10(

285

,105

,

185

1115

4120

5079

,

 K C

85,1115

41,

20  

C

7,6



 K C

8 7

6 )

(





s s

GC

Root locus of the system

Root locus of the Root locus of the

uncompensated system compensated system

Transient response of the system

y(t)

uncompensated compensated

Transient response of the systemTransient response of the system

Procedure for designing lag compensator using the root locus

)/

1(

 T

s

)1(

)

/1(

)/

1

()

T

s K s

Lag compensator:

 Step 1: Determine  to meet the steady-state error requirement:

 Step 1: Determine  to meet the steady-state error requirement:

 Step 2: Chose the zero of the lag compensator: 1  Re(s1*2)

 Step 2: Chose the zero of the lag compensator: ( 1,2)

 Step 3: Calculate the pole of the compensator:

 Step 4: Calculate K satisfying the condition: G (s)G(s) * 1

 Step 4: Calculate K C satisfying the condition: ( ) ( ) s* 1

s

C s G s G

Example of designing a lag compensator using RL

3(

10



 s s

s

 Objective: j design the compensator Gg p C C (s) so that the ( )

compensated system satisfies the following performances:

steady state error to ramp input is 0,02 and transient

response of the compensated system is nearly unchanged

response of the compensated system is nearly unchanged

 Solution:

) 1 (

) /

1

( )

( s  K s   T  

G

 The compensator to be design is a lag compensator:

) 1 (

)

/ 1 (

K s

Example of designing a lag compensator using RL (cont’)

 Step 1: Determine 

The velocity constant of uncompensated system :

83

0)

4)(

3(

10lim

)(

,0

*

xl

V

e K

83.0

  0,017



Example of designing a lag compensator using RL (cont’)

 Step 2: Chose the zero of the lag compensator

 Step 2: Chose the zero of the lag compensator

The pole of the uncompensated system:

0)

(

)4)(

3(

101

3

2 , 1

s

j s

 The dominant poles of the uncompensated system: s1,2  1   j

  1Re

1

1 

 s T

017,

0(

11

0)

 K s s

G



0017,

0

)(





s

K s

Example of designing a lag compensator using RL (cont’)

 Step 4: Determine the gain of the compensator

1)

()

1)

4)(

3(

10

0017,

0

1,

0

s s

s K

))(

(7

1)

41

)(

31

)(

1(

10

)00170

1(

)1,01

j j

j

K C

)41

)(

31

)(

1()0017,

01

(  j    j   j    j 

10042

0)

(  s 

s G



0017,

0

)(

Root locus of the system

Root locus of the Root locus of the

uncompensated system compensated system

Transient response of the system

( )

y(t)

uncompensated

t d compensated

Transient response of the system

Procedure for designing lead lag compensator using the RL

The compensator to be designed

)()

()

(s G 1 s G 2 s

The compensator to be designed

phaselead

phaselag

 Step 1: Design the lead compensator G C1 (s) to satisfy thetransient response performances

 Step 2: Let G1(s)= G (s) G C1 (s)

Design the lag compensator G C2 (s) in series with G1(s) tosatisfy the steady-state performances (and not to degrade thetransient response obtained after phase lead compensating)

transient response obtained after phase lead compensating)

Example of designing a lead lag compensator using RL

4



s s

 Objective: j design the compensatorg p G C C (s)( ) so that thecompensated system has the dominant poles with  = 0.5,

n =5 (rad/sec) and the velocity constant K V =80

 Solution

 The compensator to be designed is a lead lag compensatorp g g pbecause the design objective is to improve the transientresponse and to reduce the steady-state error

)()

()

(s G s G s

Example of designing a lead lag compensator using RL (cont’)

 Step 1: Design the lead compensator G C1 (s)

The dominant poles:

2 2

* 2 ,

1    j 1    0 , 5  5  j5 1  0 , 5

33 4 5

1800 1 2

)115120

Example of designing a lead lag compensator using RL (cont’)

Chose the zero of the lead compensator so that it eliminatesthe pole at –0.5 of G(s) (pole elimination method)

50

1

5,01



T



5 , 0



OA

5

4 60

sin

55

sin 76

4 sin

ˆ sin

A PA

AB

5 , 0

OA

A

B

51

1





 OA AB T

–1/T1

5

5,

0)



 K s s

5



s

Example of designing a lead lag compensator using RL (cont’)

Calculate K C1: 1( ) ( ) s* 1

s

C s G s G

1

45

,0



s

)5,0(

.5

,

33 , 4 5 , 2

K

256

K C1  6,25

K

5,

025

,6)

(1

25)

()()

s

Example of designing a lead lag compensator using RL (cont’)

 Step 2: Design the lag compensator G C2 (s)

T s

T K

)(

)5(

lim)

V

K

Example of designing a lead lag compensator using RL (cont’)

 Determine the zero of the lag compensator:

5,2)

33,45

,2Re(

)Re(

.(

16

1

1

(162

01.0

Example of designing a lead lag compensator using RL (cont’)

 CalculateCalculate K K C2 C2 using the gain conditionusing the gain condition:: G C2 2((s))G1 1((s)) s* * 11

s

C s G s G



101

,033

,45

,2

16,033

,45

)16,0

(01,1)

G C

The transfer function of the lag compensator:

)16,0)(

5,0

(31,6)

()

()

s G

s G

s

Final result:

)01,0(s 

)01,0)(

5(

31,6)

()

()



 s s

s G

s G

s

Control system Control system design in y design in g

frequency domain

Procedure for designing lead compensators in frequency domain

1



Ts

)1(

1

1)

s

The lead compensator:

 Step 1: Determine K C to meet the steady-state error requirement:

 Step 1: Determine K C to meet the steady state error requirement:

P P

C K K

K  * / or K C  K V* / K V or K C  K a* / K a

 Step 2: Let G (s)=K G(s) Plot the Bode diagram of G (s)

 Step 2: Let G1(s)=K C G(s). Plot the Bode diagram of G1(s)

 Step 3: Determine the gain crossover frequency of G1(s):

0)

 Step 5: Determine the necessary phase lead angle to be

added to the system:  max  M M *  M M  

Procedure for designing lead compensators in frequency domain

 Step 7: Determine the new gain crossover frequency (of

the compensated open-loop system) using the conditions:

margin? If not, repeat the design procedure from step 5

 Note: It is possible to determine C (step 3), M (step 4) and

’ C (step 7) by using Bode diagram instead of using analytic

 C (step 7) by using Bode diagram instead of using analyticcalculation

Design lead compensator in frequency domain

Design lead compensator in frequency domain Example Example

4



s s

 Objective: j Design the compensatorg p G C C (s)( ) so that thecompensated system satisfies the performances:

;20

)1( 

Design lead compensator in frequency domain

Design lead compensator in frequency domain – – Example (cont’) Example (cont’)

) (

) 2 (

lim )

4

10 )

( )

(

1 s  K G s  s s 

) 1 5

, 0 (

20 )

s G



Draw the Bode diagram of G1(s)

Design lead compensator in frequency domain

Design lead compensator in frequency domain – – Example (cont’) Example (cont’)

-20dB/dec 26

Design lead compensator in frequency domain

Design lead compensator in frequency domain – – Example (cont’) Example (cont’)

 Step 3: The gain crossover frequency of G (s)

 Step 3: The gain crossover frequency of G1(s)

According to the Bode diagram: C  6 (rad/sec)

 Step 4: The phase margin of G1(s)

According to the Bode diagram:





Design lead compensator in frequency domain

Design lead compensator in frequency domain – – Example (cont’) Example (cont’)

 Step 6: Calculate 

 Step 6: Calculate 

0

0 max

37sin1

37sin1

sin1

Design lead compensator in frequency domain

Design lead compensator in frequency domain – – Example (cont’) Example (cont’)

160

M

M * -160

Design lead compensator in frequency domain

Design lead compensator in frequency domain – – Example (cont’) Example (cont’)

 Step 9: Check the gain margin of the compensated system

According to the compensated Bode diagram, GM* = +, thenthe compensated system fulfills the design requirements

the compensated system fulfills the design requirements

 Conclusion: The designed lead compensator is:

s

s s

GC

056 ,

0 1

224 ,

0

1 10 )

(







Design lead compensator in frequency

Design lead compensator in frequency domain domain – – Example 2 Example 2

(

02 0



e G

s

 Objective: Design the compensator G (s) so that the

) 25 10

)(

2 (

s

s G

 Objective: Design the compensator G C (s) so that the

steady-state error to unit step input e*ss  0.05;

Procedure for designing lag compensators in frequency domain

1



 Ts

) 1 (

1

1 )

s

The lag compensator:

 Step 1: Determine K C to meet the steady-state error requirement:

 Step 1: Determine K C to meet the steady state error requirement:

P P

K  * / or KC  KV* / KV or KC  Ka* / Ka

 Step 2: Let G (s)=K G(s) Plot the Bode diagram of G (s)

 Step 2: Let G1(s)=K C G(s). Plot the Bode diagram of G1(s)

 Step 3: Determine the new gain crossover frequency

satisfying the following condition:

C



satisfying the following condition:

is the desired phase margin

G

or

Procedure for designing lag compensators in frequency domain

 Note: It is possible to determine , (step 3),

(step 4) by using Bode diagram instead of using analytic